  e   8  _   (            ?  _p                                                                  $   ,rockchip,rk3229-evb rockchip,rk3229       !   7Rockchip RK3229 Evaluation board       aliases          =/pinctrl/gpio@11110000           C/pinctrl/gpio@11120000           I/pinctrl/gpio@11130000           O/pinctrl/gpio@11140000           U/serial@11010000             ]/serial@11020000             e/serial@11030000             m/spi@11090000            r/mmc@30020000         cpus                                 cpu@f00          wcpu          ,arm,cortex-a7                                                                 @                        psci                                  cpu@f01          wcpu          ,arm,cortex-a7                                                              psci                                  cpu@f02          wcpu          ,arm,cortex-a7                                                              psci                                  cpu@f03          wcpu          ,arm,cortex-a7                                                              psci                                     opp-table-0          ,operating-points-v2                          opp-408000000                Q           ~          @               opp-600000000                #F                 opp-816000000                0,           B@      opp-1008000000               <                 opp-1200000000               G           tx      opp-1296000000               M?d           7      opp-1392000000               R<                 opp-1464000000               WB           \         arm-pmu          ,arm,cortex-a7-pmu         0  $       L          M          N          O           /                  psci             ,arm,psci-1.0 arm,psci-0.2            smc       timer            ,arm,armv7-timer          B      0  $                              
          fn6       oscillator           ,fixed-clock         fn6         vxin24m                          +      display-subsystem            ,rockchip,display-subsystem             	      i2s1@100b0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @         $                  i2s_clk i2s_hclk                   Q                
      
           tx rx           default                  	  disabled          i2s0@100c0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @         $                  i2s_clk i2s_hclk                   P                
      
           tx rx         	  disabled          spdif@100d0000           ,rockchip,rk3228-spdif                         $                         S           
  mclk hclk              
   
        tx          default                  	  disabled          i2s2@100e0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @         $                  i2s_clk i2s_hclk                   R                
       
           tx rx         	  disabled          syscon@11000000       &   ,rockchip,rk3228-grf syscon simple-mfd                                                       ,   io-domains        "   ,rockchip,rk3228-io-voltage-domain           okay                                           power-controller          !   ,rockchip,rk3228-power-controller                                                      2   power-domain@4                    8                                                                                  power-domain@5                                                                      power-domain@6                                                                power-domain@7                                                                                power-domain@8                                                              usb2phy@760          ,rockchip,rk3228-usb2phy            `                          phyclk          vusb480m_phy0                        okay                F   otg-port          $  $       ;          <          =           otg-bvalid otg-id linestate         +            okay                E      host-port           $       >         
  linestate           +            okay            6               G         usb2phy@800          ,rockchip,rk3228-usb2phy                                       phyclk          vusb480m_phy1                        okay                H   otg-port            $       D         
  linestate           +            okay            6               I      host-port           $       E         
  linestate           +            okay            6               J            serial@11010000          ,snps,dw-apb-uart                          $       7           fn6                M     U        baudclk apb_pclk            default                          A           K         	  disabled          serial@11020000          ,snps,dw-apb-uart                          $       8           fn6                N     V        baudclk apb_pclk            default                    A           K         	  disabled          serial@11030000          ,snps,dw-apb-uart                          $       9           fn6                O     W        baudclk apb_pclk            default                    A           K           okay          efuse@11040000           ,rockchip,rk3228-efuse                                G        pclk_efuse                              id@7                         cpu_leakage@17                          i2c@11050000             ,rockchip,rk3228-i2c                       $       $                                     i2c               L        default                  	  disabled          i2c@11060000             ,rockchip,rk3228-i2c                       $       %                                     i2c               M        default                  	  disabled          i2c@11070000             ,rockchip,rk3228-i2c                       $       &                                     i2c               N        default                   	  disabled          i2c@11080000             ,rockchip,rk3228-i2c                       $       '                                     i2c               O        default            !      	  disabled          spi@11090000             ,rockchip,rk3228-spi          	             $       1                                            A     R        spiclk apb_pclk         default            "   #   $   %   &      	  disabled          watchdog@110a0000             ,rockchip,rk3228-wdt snps,dw-wdt          
             $       (                 b      	  disabled          pwm@110b0000             ,rockchip,rk3288-pwm                       X                 ^        default            '      	  disabled          pwm@110b0010             ,rockchip,rk3288-pwm                      X                 ^        default            (        okay                W      pwm@110b0020             ,rockchip,rk3288-pwm                       X                 ^        default            )        okay                X      pwm@110b0030             ,rockchip,rk3288-pwm           0           X                 ^        default            *      	  disabled          timer@110c0000        ,   ,rockchip,rk3228-timer rockchip,rk3288-timer                        $       +                 a   +        pclk timer        clock-controller@110e0000            ,rockchip,rk3228-cru                           +        xin24m          c   ,                   p         H  }                                  k                b      $  #g0, e ррxhррxh                  dma-controller@110f0000          ,arm,pl330 arm,primecell              @         $                                                              	  apb_pclk                
      thermal-zones      cpu-thermal            d                     -       trips      cpu_alert0           p                   ~passive             .      cpu_alert1           $                   ~passive             /      cpu_crit             _                	   ~critical             cooling-maps       map0               .      0                                map1               /      0                             tsadc@11150000           ,rockchip,rk3228-tsadc                         $       :                  H     X        tsadc apb_pclk          }      H                          W      
  #tsadc-apb           init default sleep             0        /   1        9   0        C           Y s        okay            p                -      hdmi-phy@12030000            ,rockchip,rk3228-hdmi-phy                                m   +              sysclk refoclk refpclk                      vhdmiphy_phy         +          	  disabled                7      gpu@20000000          "   ,rockchip,rk3228-mali arm,mali-400                         H  $                                                                    gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core               2                  ~      	  disabled          video-codec@20020000          (   ,rockchip,rk3228-vpu rockchip,rk3399-vpu                        $                 	         
  vepu vdpu                             
  aclk hclk              3           2         iommu@20020800           ,rockchip,iommu                        $       
                               aclk iface             2                           3      video-codec@20030000          *   ,rockchip,rk3228-vdec rockchip,rk3399-vdec                         $                                                   axi ahb cabac core          }                                 4           2         iommu@20030480           ,rockchip,iommu               @    @        $                                      aclk iface             2                           4      vop@20050000             ,rockchip,rk3228-vop                       $                                             aclk_vop dclk_vop hclk_vop                 d      e      f        #axi ahb dclk               5           2         	  disabled       port                                          	   endpoint@0                          6            ;            iommu@20053f00           ,rockchip,iommu            ?            $                                       aclk iface             2                     	  disabled                5      rga@20060000          (   ,rockchip,rk3228-rga rockchip,rk3288-rga                        $       !                                     aclk hclk sclk             2                  k      m      n        #core axi ahb          iommu@20070800           ,rockchip,iommu                        $                                      aclk iface             2                     	  disabled          hdmi@200a0000            ,rockchip,rk3228-dw-hdmi           
             K           $       #           }                 7              l      {              iahb isfr cec           default            8   9   :               `        #hdmi               7        hdmi            c   ,      	  disabled       ports                                port@0                  endpoint               ;            6         port@1                          mmc@30000000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0     @         $                               D      r      v        biu ciu ciu-drive ciu-sample                       default            <   =   >      	  disabled          mmc@30010000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @         $                               E      s      w        biu ciu ciu-drive ciu-sample                       default            ?   @   A      	  disabled          mmc@30020000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @         $                  f<4`        <4`                     G      u      y        biu ciu ciu-drive ciu-sample                                             default            B   C   D               S        #reset           okay                       2      usb@30040000          2   ,rockchip,rk3228-usb rockchip,rk3066-usb snps,dwc2            0             $                                otg         @otg         H           Z          i            @                  E      	  usb2-phy            okay          usb@30080000             ,generic-ehci             0             $                           F           G        usb         okay          usb@300a0000             ,generic-ohci             0
             $                           F           G        usb         okay          usb@300c0000             ,generic-ehci             0             $                           H           I        usb         okay          usb@300e0000             ,generic-ohci             0             $                           H           I        usb         okay          usb@30100000             ,generic-ehci             0             $       B                    H           J        usb         okay          usb@30120000             ,generic-ohci             0             $       C                    H           J        usb         okay          ethernet@30200000            ,rockchip,rk3228-gmac             0              $                  macirq        8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  #stmmaceth           c   ,        okay            }      }      ~           K      }        xinput           6   L        rgmii           default            M           N                             ' B@           0                 qos@31030080             ,rockchip,rk3228-qos syscon           1                       qos@31030100             ,rockchip,rk3228-qos syscon           1                       qos@31030180             ,rockchip,rk3228-qos syscon           1                      qos@31030200             ,rockchip,rk3228-qos syscon           1                       qos@31040000             ,rockchip,rk3228-qos syscon           1                        qos@31050000             ,rockchip,rk3228-qos syscon           1                        qos@31060000             ,rockchip,rk3228-qos syscon           1                        qos@31070000             ,rockchip,rk3228-qos syscon           1                        qos@31070080             ,rockchip,rk3228-qos syscon           1                       interrupt-controller@32010000            ,arm,gic-400                                             2    2      2@     2`             $      	                    pinctrl          ,rockchip,rk3228-pinctrl         c   ,                                     gpio@11110000            ,rockchip,gpio-bank                        $       3                 @                                              gpio@11120000            ,rockchip,gpio-bank                        $       4                 A                                              gpio@11130000            ,rockchip,gpio-bank                        $       5                 B                                                    N      gpio@11140000            ,rockchip,gpio-bank                        $       6                 C                                                    S      pcfg-pull-up             $            R      pcfg-pull-down           1            Q      pcfg-pull-none           @            P      pcfg-pull-none-drv-12ma         M               O      sdmmc      sdmmc-clk           \            O            <      sdmmc-cmd           \            O            =      sdmmc-bus4        @  \            O            O            O            O            >         sdio       sdio-clk            \             O            ?      sdio-cmd            \            O            @      sdio-bus4         @  \            O            O            O            O            A         emmc       emmc-clk            \            P            B      emmc-cmd            \            P            C      emmc-bus8           \            P            P            P            P            P            P            P            P            D         gmac       rgmii-pins          \            P            P            P            O            O            O            O      	      O            O            P            P            P            P            P            P            M      rmii-pins           \            P            P            P            O            O            O            P            P            P            P      phy-pins             \            P            P         hdmi       hdmi-hpd            \             Q            9      hdmii2c-xfer             \             P             P            8      hdmi-cec            \             P            :         i2c0       i2c0-xfer            \              P             P                     i2c1       i2c1-xfer            \             P             P                     i2c2       i2c2-xfer            \            P            P                      i2c3       i2c3-xfer            \             P             P            !         spi0       spi0-clk            \       	      R            "      spi0-cs0            \             R            %      spi0-tx         \             R            #      spi0-rx         \             R            $      spi0-cs1            \            R            &         spi1       spi1-clk            \             R      spi1-cs0            \            R      spi1-rx         \             R      spi1-tx         \            R      spi1-cs1            \            R         i2s1       i2s1-bus            \             P       	      P             P             P             P             P            P            P            P                     pwm0       pwm0-pin            \            P            '         pwm1       pwm1-pin            \             P            (         pwm2       pwm2-pin            \            P            )         pwm3       pwm3-pin            \            P            *         spdif      spdif-tx            \            P                     tsadc      otp-pin         \              P            0      otp-out         \             P            1         uart0      uart0-xfer           \            P            P                  uart0-cts           \            P                  uart0-rts           \             P                     uart1      uart1-xfer           \      	      P      
      P                  uart1-cts           \            P      uart1-rts           \            P         uart2      uart2-xfer           \            R            P                  uart21-xfer          \      
      R      	      P      uart2-cts           \             P      uart2-rts           \             P         keys       pwr-key         \             R            Y         usb    host-vbus-drv           \             P            T            memory@60000000          wmemory           `   @         dc-12v-regulator             ,regulator-fixed         jdc_12v           y                                         V      ext_gmac             ,fixed-clock         fsY@      	  vext_gmac                            K      vcc-host-regulator           ,regulator-fixed                     S               default            T      	  jvcc_host             y                    U                  vcc-phy-regulator            ,regulator-fixed                  jvcc_phy          w@         w@         y                                L      vcc-sys-regulator            ,regulator-fixed         jvcc_sys          y                  LK@         LK@           V            U      vccio-1v8-regulator          ,regulator-fixed       
  jvccio_1v8            w@         w@         y           U                  vccio-3v3-regulator          ,regulator-fixed       
  jvccio_3v3            2Z         2Z         y           U                  vdd-arm-regulator            ,pwm-regulator              W      a              U        jvdd_arm          ~         \         y                           vdd-log-regulator            ,pwm-regulator              X      a              U        jvdd_log          B@                   y               gpio-keys         
   ,gpio-keys                    default            Y   power-key           GPIO Key Power             S                 t           d         1            	#address-cells #size-cells interrupt-parent compatible model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 spi0 mmc0 device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks enable-method cpu-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ports clock-names dmas dma-names pinctrl-names pinctrl-0 status vccio1-supply vccio2-supply vccio4-supply #power-domain-cells pm_qos interrupt-names #phy-cells phy-supply reg-shift reg-io-width #pwm-cells rockchip,grf #reset-cells assigned-clocks assigned-clock-rates #dma-cells arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reset-names pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode power-domains iommus #iommu-cells remote-endpoint assigned-clock-parents phys phy-names fifo-depth max-frequency bus-width rockchip,default-sample-phase cap-mmc-highspeed non-removable dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size clock_in_out phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay interrupt-controller #interrupt-cells ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt enable-active-high vin-supply pwms pwm-supply autorepeat label gpios linux,code debounce-interval wakeup-source 