  f   8  `P   (            I  `                                                                     ,mecer,xms6 rockchip,rk3229           7Mecer Xtreme Mini S6       aliases          =/pinctrl/gpio@11110000           C/pinctrl/gpio@11120000           I/pinctrl/gpio@11130000           O/pinctrl/gpio@11140000           U/serial@11010000             ]/serial@11020000             e/serial@11030000             m/spi@11090000            r/mmc@30000000            w/mmc@30010000            |/mmc@30020000         cpus                                 cpu@f00          cpu          ,arm,cortex-a7                                                                 @                        psci                                  cpu@f01          cpu          ,arm,cortex-a7                                                              psci                                  cpu@f02          cpu          ,arm,cortex-a7                                                              psci                                  cpu@f03          cpu          ,arm,cortex-a7                                                              psci                                     opp-table-0          ,operating-points-v2                          opp-408000000                Q          ~          @         "      opp-600000000                #F                opp-816000000                0,          B@      opp-1008000000               <                opp-1200000000               G          tx      opp-1296000000               M?d          7      opp-1392000000               R<                opp-1464000000               WB          \         arm-pmu          ,arm,cortex-a7-pmu         0  .       L          M          N          O           9                  psci             ,arm,psci-1.0 arm,psci-0.2            smc       timer            ,arm,armv7-timer          L      0  .                              
          pn6       oscillator           ,fixed-clock         pn6         xin24m                          +      display-subsystem            ,rockchip,display-subsystem             	      i2s1@100b0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @         .                  i2s_clk i2s_hclk                   Q                
      
           tx rx           default                  	  disabled          i2s0@100c0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @         .                  i2s_clk i2s_hclk                   P                
      
           tx rx         	  disabled          spdif@100d0000           ,rockchip,rk3228-spdif                         .                         S           
  mclk hclk              
   
        tx          default                  	  disabled          i2s2@100e0000         (   ,rockchip,rk3228-i2s rockchip,rk3066-i2s              @         .                  i2s_clk i2s_hclk                   R                
       
           tx rx         	  disabled          syscon@11000000       &   ,rockchip,rk3228-grf syscon simple-mfd                                                       ,   io-domains        "   ,rockchip,rk3228-io-voltage-domain           okay                                           power-controller          !   ,rockchip,rk3228-power-controller            
                                         2   power-domain@4                    8                                                                       
          power-domain@5                                                           
          power-domain@6                                                     
          power-domain@7                                                                     
          power-domain@8                                                
             usb2phy@760          ,rockchip,rk3228-usb2phy            `                          phyclk          usb480m_phy0                        okay                H   otg-port          $  .       ;          <          =           %otg-bvalid otg-id linestate         5            okay            @               G      host-port           .       >         
  %linestate           5            okay            @               I         usb2phy@800          ,rockchip,rk3228-usb2phy                                       phyclk          usb480m_phy1                        okay                J   otg-port            .       D         
  %linestate           5            okay            @               K      host-port           .       E         
  %linestate           5            okay            @               L            serial@11010000          ,snps,dw-apb-uart                          .       7           pn6                M     U        baudclk apb_pclk            default                          K           U         	  disabled          serial@11020000          ,snps,dw-apb-uart                          .       8           pn6                N     V        baudclk apb_pclk            default                    K           U         	  disabled          serial@11030000          ,snps,dw-apb-uart                          .       9           pn6                O     W        baudclk apb_pclk            default                    K           U           okay          efuse@11040000           ,rockchip,rk3228-efuse                                G        pclk_efuse                              id@7                         cpu_leakage@17                          i2c@11050000             ,rockchip,rk3228-i2c                       .       $                                     i2c               L        default                  	  disabled          i2c@11060000             ,rockchip,rk3228-i2c                       .       %                                     i2c               M        default                  	  disabled          i2c@11070000             ,rockchip,rk3228-i2c                       .       &                                     i2c               N        default                   	  disabled          i2c@11080000             ,rockchip,rk3228-i2c                       .       '                                     i2c               O        default            !      	  disabled          spi@11090000             ,rockchip,rk3228-spi          	             .       1                                            A     R        spiclk apb_pclk         default            "   #   $   %   &      	  disabled          watchdog@110a0000             ,rockchip,rk3228-wdt snps,dw-wdt          
             .       (                 b      	  disabled          pwm@110b0000             ,rockchip,rk3288-pwm                       b                 ^        default            '      	  disabled          pwm@110b0010             ,rockchip,rk3288-pwm                      b                 ^        default            (        okay                X      pwm@110b0020             ,rockchip,rk3288-pwm                       b                 ^        default            )        okay                Y      pwm@110b0030             ,rockchip,rk3288-pwm           0           b                 ^        default            *      	  disabled          timer@110c0000        ,   ,rockchip,rk3228-timer rockchip,rk3288-timer                        .       +                 a   +        pclk timer        clock-controller@110e0000            ,rockchip,rk3228-cru                           +        xin24m          m   ,                   z         H                                    k                b      $  #g0, e ррxhррxh                  dma-controller@110f0000          ,arm,pl330 arm,primecell              @         .                                                              	  apb_pclk                
      thermal-zones      cpu-thermal            d                     -       trips      cpu_alert0           p                   passive             .      cpu_alert1           $                   passive             /      cpu_crit             _                	   critical             cooling-maps       map0               .      0                                map1               /      0                             tsadc@11150000           ,rockchip,rk3228-tsadc                         .       :                  H     X        tsadc apb_pclk                H                          W      
  -tsadc-apb           init default sleep             0        9   1        C   0        M           c s        okay            z                -      hdmi-phy@12030000            ,rockchip,rk3228-hdmi-phy                                m   +              sysclk refoclk refpclk                      hdmiphy_phy         5            okay                8      gpu@20000000          "   ,rockchip,rk3228-mali arm,mali-400                         H  .                                                                    %gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core               2                  ~        okay               3      video-codec@20020000          (   ,rockchip,rk3228-vpu rockchip,rk3399-vpu                        .                 	         
  %vepu vdpu                             
  aclk hclk              4           2         iommu@20020800           ,rockchip,iommu                        .       
                               aclk iface             2                           4      video-codec@20030000          *   ,rockchip,rk3228-vdec rockchip,rk3399-vdec                         .                                                   axi ahb cabac core                                           5           2         iommu@20030480           ,rockchip,iommu               @    @        .                                      aclk iface             2                           5      vop@20050000             ,rockchip,rk3228-vop                       .                                             aclk_vop dclk_vop hclk_vop                 d      e      f        -axi ahb dclk               6           2           okay       port                                          	   endpoint@0                          7            <            iommu@20053f00           ,rockchip,iommu            ?            .                                       aclk iface             2                       okay                6      rga@20060000          (   ,rockchip,rk3228-rga rockchip,rk3288-rga                        .       !                                     aclk hclk sclk             2                  k      m      n        -core axi ahb          iommu@20070800           ,rockchip,iommu                        .                                      aclk iface             2                       okay          hdmi@200a0000            ,rockchip,rk3228-dw-hdmi           
             U           .       #                            8              l      {              iahb isfr cec           default            9   :   ;               `        -hdmi               8        hdmi            m   ,        okay       ports                                port@0                  endpoint               <            7         port@1                          mmc@30000000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0     @         .                               D      r      v        biu ciu ciu-drive ciu-sample                       default            =   >   ?        okay                             mmc@30010000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @         .                               E      s      w        biu ciu ciu-drive ciu-sample                       default            @   A   B        okay                        '         8        E   C         P        ^         mmc@30020000          0   ,rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @         .                  p<4`        k<4`                     G      u      y        biu ciu ciu-drive ciu-sample                       y                      default            D   E   F               S        -reset           okay                       P      usb@30040000          2   ,rockchip,rk3228-usb rockchip,rk3066-usb snps,dwc2            0             .                                otg         otg                                          @                  G      	  usb2-phy            okay          usb@30080000             ,generic-ehci             0             .                           H           I        usb         okay          usb@300a0000             ,generic-ohci             0
             .                           H           I        usb         okay          usb@300c0000             ,generic-ehci             0             .                           J           K        usb         okay          usb@300e0000             ,generic-ohci             0             .                           J           K        usb         okay          usb@30100000             ,generic-ehci             0             .       B                    J           L        usb         okay          usb@30120000             ,generic-ohci             0             .       C                    J           L        usb         okay          ethernet@30200000            ,rockchip,rk3228-gmac             0              .                  %macirq        8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  -stmmaceth           m   ,        okay                  |                output             M        rmii            @   N   mdio             ,snps,dwmac-mdio                              ethernet-phy@0        4   ,ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                                                     ?            M            qos@31030080             ,rockchip,rk3228-qos syscon           1                       qos@31030100             ,rockchip,rk3228-qos syscon           1                       qos@31030180             ,rockchip,rk3228-qos syscon           1                      qos@31030200             ,rockchip,rk3228-qos syscon           1                       qos@31040000             ,rockchip,rk3228-qos syscon           1                        qos@31050000             ,rockchip,rk3228-qos syscon           1                        qos@31060000             ,rockchip,rk3228-qos syscon           1                        qos@31070000             ,rockchip,rk3228-qos syscon           1                        qos@31070080             ,rockchip,rk3228-qos syscon           1                       interrupt-controller@32010000            ,arm,gic-400                                             2    2      2@     2`             .      	                    pinctrl          ,rockchip,rk3228-pinctrl         m   ,                                  (   gpio@11110000            ,rockchip,gpio-bank                        .       3                 @         /        ?                             gpio@11120000            ,rockchip,gpio-bank                        .       4                 A         /        ?                             gpio@11130000            ,rockchip,gpio-bank                        .       5                 B         /        ?                                   T      gpio@11140000            ,rockchip,gpio-bank                        .       6                 C         /        ?                                   S      pcfg-pull-up             K            R      pcfg-pull-down           X            Q      pcfg-pull-none           g            P      pcfg-pull-none-drv-12ma         t               O      sdmmc      sdmmc-clk                       O            =      sdmmc-cmd                       O            >      sdmmc-bus4        @              O            O            O            O            ?         sdio       sdio-clk                         O            @      sdio-cmd                        O            A      sdio-bus4         @              O            O            O            O            B         emmc       emmc-clk                        P            D      emmc-cmd                        P            E      emmc-bus8                       P            P            P            P            P            P            P            P            F         gmac       rgmii-pins                      P            P            P            O            O            O            O      	      O            O            P            P            P            P            P            P      rmii-pins                       P            P            P            O            O            O            P            P            P            P      phy-pins                         P            P         hdmi       hdmi-hpd                         Q            :      hdmii2c-xfer                          P             P            9      hdmi-cec                         P            ;         i2c0       i2c0-xfer                          P             P                     i2c1       i2c1-xfer                         P             P                     i2c2       i2c2-xfer                        P            P                      i2c3       i2c3-xfer                         P             P            !         spi0       spi0-clk                   	      R            "      spi0-cs0                         R            %      spi0-tx                      R            #      spi0-rx                      R            $      spi0-cs1                        R            &         spi1       spi1-clk                         R      spi1-cs0                        R      spi1-rx                      R      spi1-tx                     R      spi1-cs1                        R         i2s1       i2s1-bus                         P       	      P             P             P             P             P            P            P            P                     pwm0       pwm0-pin                        P            '         pwm1       pwm1-pin                         P            (         pwm2       pwm2-pin                        P            )         pwm3       pwm3-pin                        P            *         spdif      spdif-tx                        P                     tsadc      otp-pin                       P            0      otp-out                      P            1         uart0      uart0-xfer                       P            P                  uart0-cts                       P                  uart0-rts                        P                     uart1      uart1-xfer                 	      P      
      P                  uart1-cts                       P      uart1-rts                       P         uart2      uart2-xfer                       R            P      uart21-xfer                
      R      	      P                  uart2-cts                        P      uart2-rts                        P         usb    host-vbus-drv                        P            U            memory@60000000          memory           `   @         dc-12v-regulator             ,regulator-fixed         dc_12v                                                    W      ext_gmac             ,fixed-clock         psY@      	  ext_gmac                      power-led         
   ,gpio-leds      led-0              S               on           sdio-pwrseq          ,mmc-pwrseq-simple           
   T         T                  C      vcc-host-regulator           ,regulator-fixed                  )   S               default            U      	  vcc_host                              .   V                  vcc-phy-regulator            ,regulator-fixed                  vcc_phy          w@         w@                          .               N      vcc-sys-regulator            ,regulator-fixed         vcc_sys                            LK@         LK@        .   W            V      vccio-1v8-regulator          ,regulator-fixed       
  vccio_1v8            w@         w@                 .   V                  vccio-3v3-regulator          ,regulator-fixed       
  vccio_3v3            2Z         2Z                 .   V                  vdd-arm-regulator            ,pwm-regulator           9   X      a           >   V        vdd_arm          ~         \                                    vdd-log-regulator            ,pwm-regulator           9   Y      a           >   V        vdd_log          B@                                        3         	#address-cells #size-cells interrupt-parent compatible model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 spi0 mmc0 mmc1 mmc2 device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks enable-method cpu-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ports clock-names dmas dma-names pinctrl-names pinctrl-0 status vccio1-supply vccio2-supply vccio4-supply #power-domain-cells pm_qos interrupt-names #phy-cells phy-supply reg-shift reg-io-width #pwm-cells rockchip,grf #reset-cells assigned-clocks assigned-clock-rates #dma-cells arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reset-names pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode power-domains mali-supply iommus #iommu-cells remote-endpoint assigned-clock-parents phys phy-names fifo-depth cap-mmc-highspeed disable-wp bus-width cap-sd-highspeed cap-sdio-irq mmc-pwrseq non-removable vqmmc-supply max-frequency rockchip,default-sample-phase dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size clock_in_out phy-handle phy-mode phy-is-integrated interrupt-controller #interrupt-cells ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt gpios default-state reset-gpios enable-active-high gpio vin-supply pwms pwm-supply 