  o   8  |   (            	  D                                                      *   chipspark,popmetal-rk3288 rockchip,rk3288            &            7PopMetal-RK3288    aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /mmc@ff0f0000            /mmc@ff0c0000            /mmc@ff0d0000            /mmc@ff0e0000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                      rockchip,rk3066-smp               cpu@500         #cpu          arm,cortex-a12          /           3               :           N           ]  @        k              r  r           	                 cpu@501         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                 cpu@502         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                 cpu@503         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                    opp-table-0          operating-points-v2                        opp-126000000                              opp-216000000                               opp-312000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                 opp-1608000000              _"          p         reserved-memory                                      dma-unusable@fe000000           /                       oscillator           fixed-clock         n6         xin24m                         
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer           /                              H           k     a   
        1pclk timer        display-subsystem            rockchip,display-subsystem          =            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Cр         k           D      r      v        1biu ciu ciu-drive ciu-sample            Q                               /            @         3              \reset           hokay            o            y                                     default                                                                                     mmc@ff0d0000             rockchip,rk3288-dw-mshc         Cр         k           E      s      w        1biu ciu ciu-drive ciu-sample            Q                   !           /            @         3              \reset         	  hdisabled          mmc@ff0e0000             rockchip,rk3288-dw-mshc         Cр         k           F      t      x        1biu ciu ciu-drive ciu-sample            Q                   "           /            @         3              \reset         	  hdisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Cр         k           G      u      y        1biu ciu ciu-drive ciu-sample            Q                   #           /            @         3              \reset           hokay            o            y                  ,         ;        default                                                 saradc@ff100000          rockchip,saradc         /                             $           I           k      I     [        1saradc apb_pclk         3      W        \saradc-apb        	  hdisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      A     R        1spiclk apb_pclk         [                    `tx rx                   ,           default                             /                                             	  hdisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      B     S        1spiclk apb_pclk         [                    `tx rx                   -           default                      !        /                                             	  hdisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      C     T        1spiclk apb_pclk         [                    `tx rx                   .           default            "   #   $   %        /                                             	  hdisabled          i2c@ff140000             rockchip,rk3288-i2c         /                             >                                     1i2c         k     M        default            &        hokay                ak8963@d             asahi-kasei,ak8975          /            &   '                       default            (        j           u         l3g4200d@69          st,l3g4200d-gyro                       /   i        j                    mma8452@1d           fsl,mma8452         /            &   '                        default            )         i2c@ff150000             rockchip,rk3288-i2c         /                             ?                                     1i2c         k     O        default            *        hokay          i2c@ff160000             rockchip,rk3288-i2c         /                             @                                     1i2c         k     P        default            +        hokay          i2c@ff170000             rockchip,rk3288-i2c         /                             A                                     1i2c         k     Q        default            ,        hokay               s      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             7                                 k      M     U        1baudclk apb_pclk            [                    `tx rx           default            -        hokay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             8                                 k      N     V        1baudclk apb_pclk            [                    `tx rx           default            .        hokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           /    i                         9                                 k      O     W        1baudclk apb_pclk            default            /        hokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             :                                 k      P     X        1baudclk apb_pclk            [                    `tx rx           default            0        hokay          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             ;                                 k      Q     Y        1baudclk apb_pclk            [      	      
        `tx rx           default            1        hokay          dma-controller@ff250000          arm,pl330 arm,primecell         /    %        @                                                                   k            	  1apb_pclk                     thermal-zones      reserve-thermal                                2          cpu-thermal            d                     2      trips      cpu_alert0          % p        1          *passive            3      cpu_alert1          % $        1          *passive            4      cpu_crit            % _        1        	  *critical             cooling-maps       map0            <   3      0  A                              map1            <   4      0  A                        gpu-thermal            d                     2      trips      gpu_alert0          % p        1          *passive            5      gpu_crit            % _        1        	  *critical             cooling-maps       map0            <   5        A   6               tsadc@ff280000           rockchip,rk3288-tsadc           /    (                         %           k      H     Z        1tsadc apb_pclk          3            
  \tsadc-apb           init default sleep             7        P   8        Z   7        d           z   9         s        hokay                                       2      ethernet@ff290000            rockchip,rk3288-gmac            /    )                                              macirq eth_wake_irq         z   9      8  k            f      g      c                 ]      M  1stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            3      B      
  \stmmaceth           hokay               :        rgmii           input              ;                        '      ' B@        <              L   <        default            =        c   0        l         usb@ff500000             generic-ehci            /    P                                    k             u   >        zusb       	  hdisabled          usb@ff520000             generic-ohci            /    R                         )           k             u   >        zusb       	  hdisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    T                                    k             1otg         host            u   ?      	  zusb2-phy                   	  hdisabled          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    X                                    k             1otg         otg                                          @   @            u   @      	  zusb2-phy            hokay          usb@ff5c0000             generic-ehci            /    \                                    k           	  hdisabled          dma-controller@ff600000          arm,pl330 arm,primecell         /    `        @                                                                    k            	  1apb_pclk          	  hdisabled          i2c@ff650000             rockchip,rk3288-i2c         /    e                         <                                     1i2c         k     L        default            A        hokay                pmic@1b          rockchip,rk808          /            &   B                       default            C   D                                     xin32k rk808-clkout2               E           E           E        &   E        2   E        >   E        J   F        V           b           o   E        |                 regulators     DCDC_REG1                              q         p        vdd_arm            	   regulator-state-mem                   DCDC_REG2                              P                 vdd_gpu    regulator-state-mem                   B@         DCDC_REG3                             vcc_ddr    regulator-state-mem                   DCDC_REG4                              2Z         2Z        vcc_io                regulator-state-mem                   2Z         LDO_REG1                               2Z         2Z        vcc_lan            :   regulator-state-mem                   2Z         LDO_REG2                               w@         2Z      	  vccio_sd                  regulator-state-mem                   LDO_REG3                               B@         B@        vdd_10     regulator-state-mem                   B@         LDO_REG4                               w@         w@      
  vcc18_lcd      regulator-state-mem                   w@         LDO_REG5                      w@         2Z        ldo5          LDO_REG6                               B@         B@      
  vdd10_lcd      regulator-state-mem                   B@         LDO_REG7                               w@         w@        vcc_18             F   regulator-state-mem                   w@         LDO_REG8                               2Z         2Z        vcca_33            Z   regulator-state-mem                   2Z         SWITCH_REG1                         	  vccio_wl               \   regulator-state-mem                   SWITCH_REG2                           vcc_lcd    regulator-state-mem                            i2c@ff660000             rockchip,rk3288-i2c         /    f                         =                                     1i2c         k     N        default            G        hokay          pwm@ff680000             rockchip,rk3288-pwm         /    h                 ;           default            H        k     _      	  hdisabled          pwm@ff680010             rockchip,rk3288-pwm         /    h                ;           default            I        k     _      	  hdisabled          pwm@ff680020             rockchip,rk3288-pwm         /    h                 ;           default            J        k     _      	  hdisabled          pwm@ff680030             rockchip,rk3288-pwm         /    h 0               ;           default            K        k     _      	  hdisabled          sram@ff700000         
   mmio-sram           /    p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram            /                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          /    r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           /    s                       power-controller          !   rockchip,rk3288-power-controller            F                                     <      h        L   
           `   power-domain@9          /   	        k                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  Z   L   M   N   O   P   Q   R   S   T        F          power-domain@11         /           k            o      p        Z   U   V        F          power-domain@12         /           k                   Z   W        F          power-domain@13         /           k              Z   X   Y        F             reboot-mode          syscon-reboot-mode          a           hRB         tRB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon         /    t               clock-controller@ff760000            rockchip,rk3288-cru         /    v                 k   
        1xin24m          z   9                            H  <                                  j                k      $  #gׄ e  рxh рxh                 syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           /    w                    9   edp-phy          rockchip,rk3288-dp-phy          k      h        124m                   	  hdisabled               p      io-domains        "   rockchip,rk3288-io-voltage-domain           hokay               Z                      [                      :        	                      '           3           A   \      usbphy           rockchip,rk3288-usb-phy                                   hokay       usb-phy@320                     /           k      ]        1phyclk                      3            
  \phy-reset              @      usb-phy@334                     /  4        k      ^        1phyclk                      3            
  \phy-reset              >      usb-phy@348                     /  H        k      _        1phyclk                      3            
  \phy-reset              ?            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         /                     k     p                O         	  hdisabled          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         /                     M            k      T           
  1mclk hclk           [   ]           `tx                  6           default            ^        z   9      	  hdisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         /                     M                    5           k      R             1i2s_clk i2s_hclk            [   ]       ]           `tx rx           default            _        ^           y         	  hdisabled          crypto@ff8a0000          rockchip,rk3288-crypto          /            @                 0            k                 }              1aclk hclk sclk apb_pclk         3              \crypto-rst        iommu@ff900800           rockchip,iommu          /            @                           k                   1aclk iface                    	  hdisabled          iommu@ff914000           rockchip,iommu           /    @            P                                   k                   1aclk iface                             	  hdisabled          rga@ff920000             rockchip,rk3288-rga         /                                       k                 j        1aclk hclk sclk             `   	        3      i      l      m        \core axi ahb          vop@ff930000             rockchip,rk3288-vop          /                                                   k                         1aclk_vop dclk_vop hclk_vop             `   	        3      d      e      f        \axi ahb dclk               a        hokay       port                                            endpoint@0          /               b           t      endpoint@1          /              c           q      endpoint@2          /              d           k      endpoint@3          /              e           n            iommu@ff930300           rockchip,iommu          /                                       k                   1aclk iface             `   	                    hokay               a      vop@ff940000             rockchip,rk3288-vop          /                                                   k                         1aclk_vop dclk_vop hclk_vop             `   	        3                          \axi ahb dclk               f        hokay       port                                            endpoint@0          /               g           u      endpoint@1          /              h           r      endpoint@2          /              i           l      endpoint@3          /              j           o            iommu@ff940300           rockchip,iommu          /                                       k                   1aclk iface             `   	                    hokay               f      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           /            @                            k      ~     d      	  1ref pclk               `   	        z   9      	  hdisabled       ports                                port@0          /                                 endpoint@0          /               k           d      endpoint@1          /              l           i         port@1          /               lvds@ff96c000            rockchip,rk3288-lvds            /           @         k     g      
  1pclk_lvds           lcdc               m           `   	        z   9      	  hdisabled       ports                                port@0          /                                 endpoint@0          /               n           e      endpoint@1          /              o           j         port@1          /               dp@ff970000          rockchip,rk3288-dp          /            @                 b           k      i     c        1dp pclk         u   p        zdp             `   	        3      o        \dp          z   9      	  hdisabled       ports                                port@0          /                                 endpoint@0          /               q           c      endpoint@1          /              r           h         port@1          /               hdmi@ff980000            rockchip,rk3288-dw-hdmi         /                                        g           k     h      m      n        1iahb isfr cec              `   	        z   9        M            hokay               s   ports                                port@0          /                                 endpoint@0          /               t           b      endpoint@1          /              u           g         port@1          /               video-codec@ff9a0000             rockchip,rk3288-vpu         /                             	          
         
  vepu vdpu           k                 
  1aclk hclk              v           `         iommu@ff9a0800           rockchip,iommu          /                                       k                   1aclk iface                         `              v      iommu@ff9c0440           rockchip,iommu           /    @       @           @                o           k                   1aclk iface                    	  hdisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          /                   $                                         job mmu gpu         k              :   w        N              `         	  hdisabled               6      opp-table-1          operating-points-v2            w   opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon          /                         X      qos@ffaa0080             rockchip,rk3288-qos syscon          /                        Y      qos@ffad0000             rockchip,rk3288-qos syscon          /                         M      qos@ffad0100             rockchip,rk3288-qos syscon          /                        N      qos@ffad0180             rockchip,rk3288-qos syscon          /                       O      qos@ffad0400             rockchip,rk3288-qos syscon          /                        P      qos@ffad0480             rockchip,rk3288-qos syscon          /                       Q      qos@ffad0500             rockchip,rk3288-qos syscon          /                        L      qos@ffad0800             rockchip,rk3288-qos syscon          /                        R      qos@ffad0880             rockchip,rk3288-qos syscon          /                       S      qos@ffad0900             rockchip,rk3288-qos syscon          /    	                    T      qos@ffae0000             rockchip,rk3288-qos syscon          /                         W      qos@ffaf0000             rockchip,rk3288-qos syscon          /                         U      qos@ffaf0080             rockchip,rk3288-qos syscon          /                        V      dma-controller@ffb20000          arm,pl330 arm,primecell         /            @                                                                    k            	  1apb_pclk               ]      efuse@ffb40000           rockchip,rk3288-efuse           /                                               k     q        1pclk_efuse     cpu-id@7            /            cpu_leakage@17          /               interrupt-controller@ffc01000            arm,gic-400                  	                       @  /                              @             `                        	                   pinctrl          rockchip,rk3288-pinctrl         z   9                                                gpio@ff750000            rockchip,gpio-bank          /    u                         Q           k     @         	        	"                    	              B      gpio@ff780000            rockchip,gpio-bank          /    x                         R           k     A         	        	"                    	         gpio@ff790000            rockchip,gpio-bank          /    y                         S           k     B         	        	"                    	         gpio@ff7a0000            rockchip,gpio-bank          /    z                         T           k     C         	        	"                    	         gpio@ff7b0000            rockchip,gpio-bank          /    {                         U           k     D         	        	"                    	              ;      gpio@ff7c0000            rockchip,gpio-bank          /    |                         V           k     E         	        	"                    	         gpio@ff7d0000            rockchip,gpio-bank          /    }                         W           k     F         	        	"                    	         gpio@ff7e0000            rockchip,gpio-bank          /    ~                         X           k     G         	        	"                    	                    gpio@ff7f0000            rockchip,gpio-bank          /                             Y           k     H         	        	"                    	              '      hdmi       hdmi-cec-c0         	.            x      hdmi-cec-c7         	.            x      hdmi-ddc             	.            x            x      hdmi-ddc-unwedge             	.             y            x         pcfg-output-low          	<           y      pcfg-pull-up             	G           z      pcfg-pull-down           	T           {      pcfg-pull-none           	c           x      pcfg-pull-none-12ma          	c        	p              |      suspend    global-pwroff           	.              x           D      ddrio-pwroff            	.             x      ddr0-retention          	.             z      ddr1-retention          	.             z         edp    edp-hpd         	.            {         i2c0       i2c0-xfer            	.             x             x           A         i2c1       i2c1-xfer            	.            x            x           &         i2c2       i2c2-xfer            	.      	      x      
      x           G         i2c3       i2c3-xfer            	.            x            x           *         i2c4       i2c4-xfer            	.            x            x           +         i2c5       i2c5-xfer            	.            x            x           ,         i2s0       i2s0-bus          `  	.             x            x            x            x            x            x           _         lcdc       lcdc-ctl          @  	.            x            x            x            x           m         sdmmc      sdmmc-clk           	.            x                 sdmmc-cmd           	.            z                 sdmmc-cd            	.            z                 sdmmc-bus1          	.            z      sdmmc-bus4        @  	.            z            z            z            z                 sdmmc-pwr           	.             x                    sdio0      sdio0-bus1          	.            z      sdio0-bus4        @  	.            z            z            z            z      sdio0-cmd           	.            z      sdio0-clk           	.            x      sdio0-cd            	.            z      sdio0-wp            	.            z      sdio0-pwr           	.            z      sdio0-bkpwr         	.            z      sdio0-int           	.            z         sdio1      sdio1-bus1          	.            z      sdio1-bus4        @  	.            z            z            z            z      sdio1-cd            	.            z      sdio1-wp            	.            z      sdio1-bkpwr         	.            z      sdio1-int           	.            z      sdio1-cmd           	.            z      sdio1-clk           	.            x      sdio1-pwr           	.      	      z         emmc       emmc-clk            	.            x                 emmc-cmd            	.            z                 emmc-pwr            	.      	      z                 emmc-bus1           	.             z      emmc-bus4         @  	.             z            z            z            z      emmc-bus8           	.             z            z            z            z            z            z            z            z                    spi0       spi0-clk            	.            z                 spi0-cs0            	.            z                 spi0-tx         	.            z                 spi0-rx         	.            z                 spi0-cs1            	.            z         spi1       spi1-clk            	.            z                 spi1-cs0            	.            z           !      spi1-rx         	.            z                  spi1-tx         	.            z                    spi2       spi2-cs1            	.            z      spi2-clk            	.            z           "      spi2-cs0            	.            z           %      spi2-rx         	.            z           $      spi2-tx         	.      	      z           #         uart0      uart0-xfer           	.            z            x           -      uart0-cts           	.            z      uart0-rts           	.            x         uart1      uart1-xfer           	.            z      	      x           .      uart1-cts           	.      
      z      uart1-rts           	.            x         uart2      uart2-xfer           	.            z            x           /         uart3      uart3-xfer           	.            z            x           0      uart3-cts           	.      	      z      uart3-rts           	.      
      x         uart4      uart4-xfer           	.            z            x           1      uart4-cts           	.            z      uart4-rts           	.            x         tsadc      otp-pin         	.       
       x           7      otp-out         	.       
      x           8         pwm0       pwm0-pin            	.             x           H         pwm1       pwm1-pin            	.            x           I         pwm2       pwm2-pin            	.            x           J         pwm3       pwm3-pin            	.            x           K         gmac       rgmii-pins          	.            x            x            x            x            |            |            |            |             x            x            x      	      |            |            x            x           =      rmii-pins           	.            x            x            x            x             x            x            x            x            x            x         spdif      spdif-tx            	.            x           ^         ak8963     comp-int            	.             z           (         buttons    pwrbtn          	.              z           }         dvp    dvp-pwr         	.              x                    ir     ir-int          	.              z           ~         mma8452    gsensor-int         	.              z           )         pmic       pmic-int            	.              z           C            memory@0            #memory          /                     external-gmac-clock          fixed-clock         sY@      	  ext_gmac                           <      gpio-keys         
   gpio-keys            	        default            }   key-power           	   B              	   t        	GPIO Key Power          	                    	   d         ir-receiver          gpio-ir-receiver            	   B              default            ~      flash-regulator          regulator-fixed       
  vcc_flash            w@         w@        	                    sdmmc-regulator          regulator-fixed                          default                    vcc_sd           2Z         2Z        	         	                    vsys-regulator           regulator-fixed         vcc_sys          LK@         LK@                             E      vcc18-dvp-regulator          regulator-fixed       
  vcc18-dvp            w@         w@        	              [      vcc28-dvp-regulator          regulator-fixed          	           B               default                  
  vcc28_dvp            *         *                 	                       	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay disable-wp pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v non-removable #io-channel-cells dmas dma-names vdd-supply vid-supply st,drdy-int-pin vddio-supply reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us assigned-clocks assigned-clock-parents tx_delay rx_delay phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells audio-supply bb-supply dvp-supply flash0-supply flash1-supply gpio30-supply gpio1830-supply lcdc-supply sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength autorepeat gpios linux,code label linux,input-type debounce-interval vin-supply startup-delay-us enable-active-high 