     8     (            \  p                                                         netxeon,r89 rockchip,rk3288          &            7Netxeon R89    aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /mmc@ff0f0000            /mmc@ff0c0000            /mmc@ff0d0000            /mmc@ff0e0000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                      rockchip,rk3066-smp               cpu@500         #cpu          arm,cortex-a12          /           3               :           N           ]  @        k              r  r           	                 cpu@501         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                 cpu@502         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                 cpu@503         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                    opp-table-0          operating-points-v2                        opp-126000000                              opp-216000000                               opp-312000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                 opp-1608000000              _"          p         reserved-memory                                      dma-unusable@fe000000           /                       oscillator           fixed-clock         n6         xin24m                         
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer           /                              H           k     a   
        1pclk timer        display-subsystem            rockchip,display-subsystem          =            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Cр         k           D      r      v        1biu ciu ciu-drive ciu-sample            Q                               /            @         3              \reset           hokay            o            y                                     default                                                 mmc@ff0d0000             rockchip,rk3288-dw-mshc         Cр         k           E      s      w        1biu ciu ciu-drive ciu-sample            Q                   !           /            @         3              \reset         	  hdisabled          mmc@ff0e0000             rockchip,rk3288-dw-mshc         Cр         k           F      t      x        1biu ciu ciu-drive ciu-sample            Q                   "           /            @         3              \reset         	  hdisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Cр         k           G      u      y        1biu ciu ciu-drive ciu-sample            Q                   #           /            @         3              \reset         	  hdisabled          saradc@ff100000          rockchip,saradc         /                             $                      k      I     [        1saradc apb_pclk         3      W        \saradc-apb          hokay                     spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      A     R        1spiclk apb_pclk                             tx rx                   ,           default                             /                                             	  hdisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      B     S        1spiclk apb_pclk                             tx rx                   -           default                             /                                             	  hdisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      C     T        1spiclk apb_pclk                             tx rx                   .           default                              /                                             	  hdisabled          i2c@ff140000             rockchip,rk3288-i2c         /                             >                                     1i2c         k     M        default            !      	  hdisabled          i2c@ff150000             rockchip,rk3288-i2c         /                             ?                                     1i2c         k     O        default            "      	  hdisabled          i2c@ff160000             rockchip,rk3288-i2c         /                             @                                     1i2c         k     P        default            #      	  hdisabled          i2c@ff170000             rockchip,rk3288-i2c         /                             A                                     1i2c         k     Q        default            $        hokay          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             7                      !           k      M     U        1baudclk apb_pclk                                tx rx           default            %        hokay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             8                      !           k      N     V        1baudclk apb_pclk                                tx rx           default            &        hokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           /    i                         9                      !           k      O     W        1baudclk apb_pclk            default            '        hokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             :                      !           k      P     X        1baudclk apb_pclk                                tx rx           default            (        hokay          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             ;                      !           k      Q     Y        1baudclk apb_pclk                  	      
        tx rx           default            )        hokay          dma-controller@ff250000          arm,pl330 arm,primecell         /    %        @                                      .            9         T        k            	  1apb_pclk                     thermal-zones      reserve-thermal         k                       *          cpu-thermal         k   d                     *      trips      cpu_alert0           p                  *passive            +      cpu_alert1           $                  *passive            ,      cpu_crit             _                	  *critical             cooling-maps       map0               +      0                                map1               ,      0                          gpu-thermal         k   d                     *      trips      gpu_alert0           p                  *passive            -      gpu_crit             _                	  *critical             cooling-maps       map0               -           .               tsadc@ff280000           rockchip,rk3288-tsadc           /    (                         %           k      H     Z        1tsadc apb_pclk          3            
  \tsadc-apb           init default sleep             /           0           /                      1         s        hokay                        /               *      ethernet@ff290000            rockchip,rk3288-gmac            /    )                                              Jmacirq eth_wake_irq            1      8  k            f      g      c                 ]      M  1stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            3      B      
  \stmmaceth           hokay            Z   2        ergmii           ninput           {   3                              ' B@                         4        default            5           0                 usb@ff500000             generic-ehci            /    P                                    k                6        usb         hokay          usb@ff520000             generic-ohci            /    R                         )           k                6        usb       	  hdisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    T                                    k             1otg         host               7      	  usb2-phy                     hokay          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    X                                    k             1otg         otg                    /          >            @   @               8      	  usb2-phy            hokay          usb@ff5c0000             generic-ehci            /    \                                    k           	  hdisabled          dma-controller@ff600000          arm,pl330 arm,primecell         /    `        @                                       .            9         T        k            	  1apb_pclk          	  hdisabled          i2c@ff650000             rockchip,rk3288-i2c         /    e                         <                                     1i2c         k     L        default            9        hokay       pmic@40          silergy,syr827          /   @        M           jVDD_CPU         y  ,         P         p          @                              :           	      pmic@41          silergy,syr828          /   A        M           jVDD_GPU         y  ,         P         p          @                              :      rtc@51           haoyu,hym8563           /   Q                    xin32k           &   ;                       default            <      pmic@5a          active-semi,act8846         /   Z        default            =   >            regulators     REG1            jVCC_DDR          O         O               REG2            jVCC_IO           2Z         2Z                    w      REG3            jVDD_LOG          B@         B@               REG4            jVCC_20                                   REG5          	  jVCCIO_SD             2Z         2Z                          REG6          
  jVDD10_LCD            B@         B@               REG7            jVCC_WL           2Z         2Z               REG8            jVCCA_33          2Z         2Z               REG9            jVCC_LAN          2Z         2Z                    2      REG10           jVDD_10           B@         B@               REG11           jVCC_18           w@         w@                          REG12         
  jVCC18_LCD            w@         w@                        i2c@ff660000             rockchip,rk3288-i2c         /    f                         =                                     1i2c         k     N        default            ?      	  hdisabled          pwm@ff680000             rockchip,rk3288-pwm         /    h                 #           default            @        k     _        hokay          pwm@ff680010             rockchip,rk3288-pwm         /    h                #           default            A        k     _      	  hdisabled          pwm@ff680020             rockchip,rk3288-pwm         /    h                 #           default            B        k     _      	  hdisabled          pwm@ff680030             rockchip,rk3288-pwm         /    h 0               #           default            C        k     _      	  hdisabled          sram@ff700000         
   mmio-sram           /    p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram            /                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          /    r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           /    s                       power-controller          !   rockchip,rk3288-power-controller            .                                           h           
           U   power-domain@9          /   	        k                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  B   D   E   F   G   H   I   J   K   L        .          power-domain@11         /           k            o      p        B   M   N        .          power-domain@12         /           k                   B   O        .          power-domain@13         /           k              B   P   Q        .             reboot-mode          syscon-reboot-mode          I           PRB         \RB        jRB	        zRB         syscon@ff740000          rockchip,rk3288-sgrf syscon         /    t               clock-controller@ff760000            rockchip,rk3288-cru         /    v                 k   
        1xin24m             1                            H                                    j                k      $  #gׄ e  рxh рxh                 syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           /    w                    1   edp-phy          rockchip,rk3288-dp-phy          k      h        124m                   	  hdisabled               e      io-domains        "   rockchip,rk3288-io-voltage-domain         	  hdisabled          usbphy           rockchip,rk3288-usb-phy                                   hokay       usb-phy@320                     /           k      ]        1phyclk                      3            
  \phy-reset              8      usb-phy@334                     /  4        k      ^        1phyclk                      3            
  \phy-reset              6      usb-phy@348                     /  H        k      _        1phyclk                      3            
  \phy-reset              7            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         /                     k     p                O           hokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         /                                 k      T           
  1mclk hclk              R           tx                  6           default            S           1      	  hdisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         /                                         5           k      R             1i2s_clk i2s_hclk               R       R           tx rx           default            T                            	  hdisabled          crypto@ff8a0000          rockchip,rk3288-crypto          /            @                 0            k                 }              1aclk hclk sclk apb_pclk         3              \crypto-rst        iommu@ff900800           rockchip,iommu          /            @                           k                   1aclk iface                    	  hdisabled          iommu@ff914000           rockchip,iommu           /    @            P                                   k                   1aclk iface                             	  hdisabled          rga@ff920000             rockchip,rk3288-rga         /                                       k                 j        1aclk hclk sclk          !   U   	        3      i      l      m        \core axi ahb          vop@ff930000             rockchip,rk3288-vop          /                                                   k                         1aclk_vop dclk_vop hclk_vop          !   U   	        3      d      e      f        \axi ahb dclk            /   V        hokay       port                                            endpoint@0          /            6   W           h      endpoint@1          /           6   X           f      endpoint@2          /           6   Y           `      endpoint@3          /           6   Z           c            iommu@ff930300           rockchip,iommu          /                                       k                   1aclk iface          !   U   	                    hokay               V      vop@ff940000             rockchip,rk3288-vop          /                                                   k                         1aclk_vop dclk_vop hclk_vop          !   U   	        3                          \axi ahb dclk            /   [        hokay       port                                            endpoint@0          /            6   \           i      endpoint@1          /           6   ]           g      endpoint@2          /           6   ^           a      endpoint@3          /           6   _           d            iommu@ff940300           rockchip,iommu          /                                       k                   1aclk iface          !   U   	                    hokay               [      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           /            @                            k      ~     d      	  1ref pclk            !   U   	           1      	  hdisabled       ports                                port@0          /                                 endpoint@0          /            6   `           Y      endpoint@1          /           6   a           ^         port@1          /               lvds@ff96c000            rockchip,rk3288-lvds            /           @         k     g      
  1pclk_lvds           lcdc               b        !   U   	           1      	  hdisabled       ports                                port@0          /                                 endpoint@0          /            6   c           Z      endpoint@1          /           6   d           _         port@1          /               dp@ff970000          rockchip,rk3288-dp          /            @                 b           k      i     c        1dp pclk            e        dp          !   U   	        3      o        \dp             1      	  hdisabled       ports                                port@0          /                                 endpoint@0          /            6   f           X      endpoint@1          /           6   g           ]         port@1          /               hdmi@ff980000            rockchip,rk3288-dw-hdmi         /                     !                   g           k     h      m      n        1iahb isfr cec           !   U   	           1                    hokay       ports                                port@0          /                                 endpoint@0          /            6   h           W      endpoint@1          /           6   i           \         port@1          /               video-codec@ff9a0000             rockchip,rk3288-vpu         /                             	          
         
  Jvepu vdpu           k                 
  1aclk hclk           /   j        !   U         iommu@ff9a0800           rockchip,iommu          /                                       k                   1aclk iface                      !   U              j      iommu@ff9c0440           rockchip,iommu           /    @       @           @                o           k                   1aclk iface                    	  hdisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          /                   $                                         Jjob mmu gpu         k              :   k        N           !   U         	  hdisabled               .      opp-table-1          operating-points-v2            k   opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon          /                         P      qos@ffaa0080             rockchip,rk3288-qos syscon          /                        Q      qos@ffad0000             rockchip,rk3288-qos syscon          /                         E      qos@ffad0100             rockchip,rk3288-qos syscon          /                        F      qos@ffad0180             rockchip,rk3288-qos syscon          /                       G      qos@ffad0400             rockchip,rk3288-qos syscon          /                        H      qos@ffad0480             rockchip,rk3288-qos syscon          /                       I      qos@ffad0500             rockchip,rk3288-qos syscon          /                        D      qos@ffad0800             rockchip,rk3288-qos syscon          /                        J      qos@ffad0880             rockchip,rk3288-qos syscon          /                       K      qos@ffad0900             rockchip,rk3288-qos syscon          /    	                    L      qos@ffae0000             rockchip,rk3288-qos syscon          /                         O      qos@ffaf0000             rockchip,rk3288-qos syscon          /                         M      qos@ffaf0080             rockchip,rk3288-qos syscon          /                        N      dma-controller@ffb20000          arm,pl330 arm,primecell         /            @                                       .            9         T        k            	  1apb_pclk               R      efuse@ffb40000           rockchip,rk3288-efuse           /                                               k     q        1pclk_efuse     cpu-id@7            /            cpu_leakage@17          /               interrupt-controller@ffc01000            arm,gic-400          F        [                       @  /                              @             `                        	                   pinctrl          rockchip,rk3288-pinctrl            1                                                gpio@ff750000            rockchip,gpio-bank          /    u                         Q           k     @         l        |            F        [              ;      gpio@ff780000            rockchip,gpio-bank          /    x                         R           k     A         l        |            F        [         gpio@ff790000            rockchip,gpio-bank          /    y                         S           k     B         l        |            F        [         gpio@ff7a0000            rockchip,gpio-bank          /    z                         T           k     C         l        |            F        [         gpio@ff7b0000            rockchip,gpio-bank          /    {                         U           k     D         l        |            F        [              3      gpio@ff7c0000            rockchip,gpio-bank          /    |                         V           k     E         l        |            F        [         gpio@ff7d0000            rockchip,gpio-bank          /    }                         W           k     F         l        |            F        [         gpio@ff7e0000            rockchip,gpio-bank          /    ~                         X           k     G         l        |            F        [              s      gpio@ff7f0000            rockchip,gpio-bank          /                             Y           k     H         l        |            F        [         hdmi       hdmi-cec-c0                     l      hdmi-cec-c7                     l      hdmi-ddc                         l            l      hdmi-ddc-unwedge                          m            l         pcfg-output-low                     m      pcfg-pull-up                        n      pcfg-pull-down                      o      pcfg-pull-none                      l      pcfg-pull-none-12ma                                p      suspend    global-pwroff                         l      ddrio-pwroff                         l      ddr0-retention                       n      ddr1-retention                       n         edp    edp-hpd                     o         i2c0       i2c0-xfer                         l             l           9         i2c1       i2c1-xfer                        l            l           !         i2c2       i2c2-xfer                  	      l      
      l           ?         i2c3       i2c3-xfer                        l            l           "         i2c4       i2c4-xfer                        l            l           #         i2c5       i2c5-xfer                        l            l           $         i2s0       i2s0-bus          `               l            l            l            l            l            l           T         lcdc       lcdc-ctl          @              l            l            l            l           b         sdmmc      sdmmc-clk                       l                 sdmmc-cmd                       n                 sdmmc-cd                        n                 sdmmc-bus1                      n      sdmmc-bus4        @              n            n            n            n                    sdio0      sdio0-bus1                      n      sdio0-bus4        @              n            n            n            n      sdio0-cmd                       n      sdio0-clk                       l      sdio0-cd                        n      sdio0-wp                        n      sdio0-pwr                       n      sdio0-bkpwr                     n      sdio0-int                       n         sdio1      sdio1-bus1                      n      sdio1-bus4        @              n            n            n            n      sdio1-cd                        n      sdio1-wp                        n      sdio1-bkpwr                     n      sdio1-int                       n      sdio1-cmd                       n      sdio1-clk                       l      sdio1-pwr                 	      n         emmc       emmc-clk                        l      emmc-cmd                        n      emmc-pwr                  	      n      emmc-bus1                        n      emmc-bus4         @               n            n            n            n      emmc-bus8                        n            n            n            n            n            n            n            n         spi0       spi0-clk                        n                 spi0-cs0                        n                 spi0-tx                     n                 spi0-rx                     n                 spi0-cs1                        n         spi1       spi1-clk                        n                 spi1-cs0                        n                 spi1-rx                     n                 spi1-tx                     n                    spi2       spi2-cs1                        n      spi2-clk                        n                 spi2-cs0                        n                  spi2-rx                     n                 spi2-tx               	      n                    uart0      uart0-xfer                       n            l           %      uart0-cts                       n      uart0-rts                       l         uart1      uart1-xfer                       n      	      l           &      uart1-cts                 
      n      uart1-rts                       l         uart2      uart2-xfer                       n            l           '         uart3      uart3-xfer                       n            l           (      uart3-cts                 	      n      uart3-rts                 
      l         uart4      uart4-xfer                       n            l           )      uart4-cts                       n      uart4-rts                       l         tsadc      otp-pin                
       l           /      otp-out                
      l           0         pwm0       pwm0-pin                         l           @         pwm1       pwm1-pin                        l           A         pwm2       pwm2-pin                        l           B         pwm3       pwm3-pin                        l           C         gmac       rgmii-pins                      l            l            l            l            p            p            p            p             l            l            l      	      p            p            l            l           5      rmii-pins                       l            l            l            l             l            l            l            l            l            l         spdif      spdif-tx                        l           S         pcfg-output-high                        q      act8846    pmic-vsel                        m           =      pwr-hold                          q           >         buttons    pwrbtn                        n           r         ir     ir-int                        n           t         pmic       pmic-int                          n           <         usb    host-vbus-drv                         l           u      otg-vbus-drv                          l           v            memory@0            #memory          /                     external-gmac-clock          fixed-clock         sY@      	  ext_gmac                           4      gpio-keys         
   gpio-keys                    default            r   key-power              ;                 t        GPIO Key Power                              &   d         ir-receiver          gpio-ir-receiver               s               default            t      vcc-host-regulator           regulator-fixed          8           ;               default            u      	  jvcc_host                            vcc-otg-regulator            regulator-fixed          8           ;               default            v        jvcc_otg                         sdmmc-regulator          regulator-fixed         jsdmmc-supply             2Z         2Z           s              K             w                 sys-regulator            regulator-fixed         jsys-supply           LK@         LK@                             :         	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay disable-wp pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply #io-channel-cells vref-supply dmas dma-names reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us assigned-clocks assigned-clock-parents tx_delay rx_delay phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-enable-ramp-delay regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply system-power-controller #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high autorepeat gpios linux,code label linux,input-type wakeup-source debounce-interval enable-active-high startup-delay-us 