     8     (            	  L                                                      7   radxa,rockpi-n8 vamrs,rk3288-vmarc-som rockchip,rk3288           &            7Radxa ROCK Pi N8       aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /mmc@ff0f0000            /mmc@ff0c0000            /mmc@ff0d0000            /mmc@ff0e0000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                      rockchip,rk3066-smp               cpu@500         #cpu          arm,cortex-a12          /           3               :           N           ]  @        k              r  r                 cpu@501         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r                 cpu@502         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r                 cpu@503         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r                    opp-table-0          operating-points-v2                        opp-126000000                              opp-216000000                               opp-312000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                 opp-1608000000              _"          p         reserved-memory                                      dma-unusable@fe000000           /                       oscillator           fixed-clock         n6         xin24m                         	      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer           /                              H           k     a   	        &pclk timer        display-subsystem            rockchip,display-subsystem          2   
         mmc@ff0c0000             rockchip,rk3288-dw-mshc         8р         k           D      r      v        &biu ciu ciu-drive ciu-sample            F                               /            @         3              Qreset           ]okay            d            n                                     default                           mmc@ff0d0000             rockchip,rk3288-dw-mshc         8р         k           E      s      w        &biu ciu ciu-drive ciu-sample            F                   !           /            @         3              Qreset           ]okay            d                                                          default                                 mmc@ff0e0000             rockchip,rk3288-dw-mshc         8р         k           F      t      x        &biu ciu ciu-drive ciu-sample            F                   "           /            @         3              Qreset         	  ]disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         8р         k           G      u      y        &biu ciu ciu-drive ciu-sample            F                   #           /            @         3              Qreset           ]okay            d            n                          default                                                 saradc@ff100000          rockchip,saradc         /                             $                      k      I     [        &saradc apb_pclk         3      W        Qsaradc-apb        	  ]disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      A     R        &spiclk apb_pclk         )                    .tx rx                   ,           default                             /                                             	  ]disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      B     S        &spiclk apb_pclk         )                    .tx rx                   -           default                !   "   #        /                                             	  ]disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      C     T        &spiclk apb_pclk         )                    .tx rx                   .           default            $   %   &   '        /                                             	  ]disabled          i2c@ff140000             rockchip,rk3288-i2c         /                             >                                     &i2c         k     M        default            (        ]okay                rtc@51           haoyu,hym8563           /   Q         &   )                                   hym8563         default            *                    i2c@ff150000             rockchip,rk3288-i2c         /                             ?                                     &i2c         k     O        default            +      	  ]disabled          i2c@ff160000             rockchip,rk3288-i2c         /                             @                                     &i2c         k     P        default            ,      	  ]disabled          i2c@ff170000             rockchip,rk3288-i2c         /                             A                                     &i2c         k     Q        default            -        ]okay               r      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             7           8           B           k      M     U        &baudclk apb_pclk            )                    .tx rx           default            .   /        ]okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             8           8           B           k      N     V        &baudclk apb_pclk            )                    .tx rx           default            0      	  ]disabled          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           /    i                         9           8           B           k      O     W        &baudclk apb_pclk            default            1        ]okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             :           8           B           k      P     X        &baudclk apb_pclk            )                    .tx rx           default            2      	  ]disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             ;           8           B           k      Q     Y        &baudclk apb_pclk            )      	      
        .tx rx           default            3      	  ]disabled          dma-controller@ff250000          arm,pl330 arm,primecell         /    %        @                                      O            Z         u        k            	  &apb_pclk                     thermal-zones      reserve-thermal                                4          cpu-thermal            d                     4      trips      cpu_alert0           p                  *passive            5      cpu_alert1           $                  *passive            6      cpu_crit             _                	  *critical             cooling-maps       map0               5      0                                map1               6      0                          gpu-thermal            d                     4      trips      gpu_alert0           p                  *passive            7      gpu_crit             _                	  *critical             cooling-maps       map0               7           8               tsadc@ff280000           rockchip,rk3288-tsadc           /    (                         %           k      H     Z        &tsadc apb_pclk          3            
  Qtsadc-apb           init default sleep             9           :           9                      ;        " s      	  ]disabled               4      ethernet@ff290000            rockchip,rk3288-gmac            /    )                                              9macirq eth_wake_irq            ;      8  k            f      g      c                 ]      M  &stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            3      B      
  Qstmmaceth           ]okay            I   <        `input           mrgmii           default            =         v              '  P           (                                               >             usb@ff500000             generic-ehci            /    P                                    k                ?        usb         ]okay          usb@ff520000             generic-ohci            /    R                         )           k                ?        usb         ]okay          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    T                                    k             &otg         host               @      	  usb2-phy                     ]okay          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    X                                    k             &otg         otg                              -            @   @               A      	  usb2-phy            ]okay          usb@ff5c0000             generic-ehci            /    \                                    k           	  ]disabled          dma-controller@ff600000          arm,pl330 arm,primecell         /    `        @                                       O            Z         u        k            	  &apb_pclk          	  ]disabled          i2c@ff650000             rockchip,rk3288-i2c         /    e                         <                                     &i2c         k     L        default            B        ]okay                pmic@1b          rockchip,rk808          /            &   C                       default            D   E         <         ]                   rk808-clkout1 rk808-clkout2         k   F        w   F           F           F           F           F                                 F           F                         regulators     DCDC_REG1           vdd_arm                   "        4 q        L \   regulator-state-mem          d         DCDC_REG2           vdd_gpu                   "        4 P        L         }  p   regulator-state-mem          d         DCDC_REG3           vcc_ddr                   "   regulator-state-mem                   DCDC_REG4           vcc_io                    "        4 2Z        L 2Z              regulator-state-mem                   2Z         LDO_REG1            vcc_tp                    "        4 2Z        L 2Z   regulator-state-mem          d         LDO_REG2            vcca_codec                    "        4 2Z        L 2Z   regulator-state-mem                   2Z         LDO_REG3            vdd_10                    "        4 B@        L B@   regulator-state-mem                   B@         LDO_REG4            vcc_wl                    "        4 w@        L w@           [   regulator-state-mem                   LDO_REG5          	  vccio_sd                      "        4 w@        L 2Z              regulator-state-mem                   2Z         LDO_REG6          
  vdd10_lcd                     "        4 B@        L B@   regulator-state-mem          d         LDO_REG7            vcc_18                    "        4 w@        L w@           Z   regulator-state-mem                   w@         LDO_REG8          
  vcc18_lcd                     "        4 w@        L w@   regulator-state-mem          d         SWITCH_REG1         vcc_sd                    "   regulator-state-mem          d         SWITCH_REG2         vcc_lcd                   "   regulator-state-mem          d                  i2c@ff660000             rockchip,rk3288-i2c         /    f                         =                                     &i2c         k     N        default            G      	  ]disabled          pwm@ff680000             rockchip,rk3288-pwm         /    h                            default            H        k     _        ]okay          pwm@ff680010             rockchip,rk3288-pwm         /    h                           default            I        k     _      	  ]disabled          pwm@ff680020             rockchip,rk3288-pwm         /    h                            default            J        k     _        ]okay          pwm@ff680030             rockchip,rk3288-pwm         /    h 0                          default            K        k     _      	  ]disabled          sram@ff700000         
   mmio-sram           /    p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram            /                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          /    r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           /    s                       power-controller          !   rockchip,rk3288-power-controller                                                       h        I   	           _   power-domain@9          /   	        k                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     L   M   N   O   P   Q   R   S   T                  power-domain@11         /           k            o      p           U   V                  power-domain@12         /           k                      W                  power-domain@13         /           k                 X   Y                     reboot-mode          syscon-reboot-mode                     RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon         /    t               clock-controller@ff760000            rockchip,rk3288-cru         /    v                 k   	        &xin24m             ;                   )         H                                    j                k      $  6#gׄ e  рxh рxh                 syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           /    w                    ;   edp-phy          rockchip,rk3288-dp-phy          k      h        &24m         K          	  ]disabled               o      io-domains        "   rockchip,rk3288-io-voltage-domain           ]okay            V           `           n   Z        ~                         [      usbphy           rockchip,rk3288-usb-phy                                   ]okay       usb-phy@320         K            /           k      ]        &phyclk                      3            
  Qphy-reset              A      usb-phy@334         K            /  4        k      ^        &phyclk                      3            
  Qphy-reset              ?      usb-phy@348         K            /  H        k      _        &phyclk                      3            
  Qphy-reset              @            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         /                     k     p                O         	  ]disabled          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         /                                 k      T           
  &mclk hclk           )   \           .tx                  6           default            ]           ;      	  ]disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         /                                         5           k      R             &i2s_clk i2s_hclk            )   \       \           .tx rx           default            ^                            	  ]disabled          crypto@ff8a0000          rockchip,rk3288-crypto          /            @                 0            k                 }              &aclk hclk sclk apb_pclk         3              Qcrypto-rst        iommu@ff900800           rockchip,iommu          /            @                           k                   &aclk iface                    	  ]disabled          iommu@ff914000           rockchip,iommu           /    @            P                                   k                   &aclk iface                             	  ]disabled          rga@ff920000             rockchip,rk3288-rga         /                                       k                 j        &aclk hclk sclk             _   	        3      i      l      m        Qcore axi ahb          vop@ff930000             rockchip,rk3288-vop          /                                                   k                         &aclk_vop dclk_vop hclk_vop             _   	        3      d      e      f        Qaxi ahb dclk            "   `        ]okay       port                                            endpoint@0          /            )   a           t      endpoint@1          /           )   b           p      endpoint@2          /           )   c           j      endpoint@3          /           )   d           m            iommu@ff930300           rockchip,iommu          /                                       k                   &aclk iface             _   	                    ]okay               `      vop@ff940000             rockchip,rk3288-vop          /                                                   k                         &aclk_vop dclk_vop hclk_vop             _   	        3                          Qaxi ahb dclk            "   e        ]okay       port                                         
   endpoint@0          /            )   f           u      endpoint@1          /           )   g           q      endpoint@2          /           )   h           k      endpoint@3          /           )   i           n            iommu@ff940300           rockchip,iommu          /                                       k                   &aclk iface             _   	                    ]okay               e      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           /            @                            k      ~     d      	  &ref pclk               _   	           ;      	  ]disabled       ports                                port@0          /                                 endpoint@0          /            )   j           c      endpoint@1          /           )   k           h         port@1          /               lvds@ff96c000            rockchip,rk3288-lvds            /           @         k     g      
  &pclk_lvds           lcdc               l           _   	           ;      	  ]disabled       ports                                port@0          /                                 endpoint@0          /            )   m           d      endpoint@1          /           )   n           i         port@1          /               dp@ff970000          rockchip,rk3288-dp          /            @                 b           k      i     c        &dp pclk            o        dp             _   	        3      o        Qdp             ;      	  ]disabled       ports                                port@0          /                                 endpoint@0          /            )   p           b      endpoint@1          /           )   q           g         port@1          /               hdmi@ff980000            rockchip,rk3288-dw-hdmi         /                     B                   g           k     h      m      n        &iahb isfr cec              _   	           ;                    ]okay            9   r        default            s   ports                                port@0          /                                 endpoint@0          /            )   t           a      endpoint@1          /           )   u           f         port@1          /               video-codec@ff9a0000             rockchip,rk3288-vpu         /                             	          
         
  9vepu vdpu           k                 
  &aclk hclk           "   v           _         iommu@ff9a0800           rockchip,iommu          /                                       k                   &aclk iface                         _              v      iommu@ff9c0440           rockchip,iommu           /    @       @           @                o           k                   &aclk iface                    	  ]disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          /                   $                                         9job mmu gpu         k              :   w        N              _         	  ]disabled               8      opp-table-1          operating-points-v2            w   opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon          /                         X      qos@ffaa0080             rockchip,rk3288-qos syscon          /                        Y      qos@ffad0000             rockchip,rk3288-qos syscon          /                         M      qos@ffad0100             rockchip,rk3288-qos syscon          /                        N      qos@ffad0180             rockchip,rk3288-qos syscon          /                       O      qos@ffad0400             rockchip,rk3288-qos syscon          /                        P      qos@ffad0480             rockchip,rk3288-qos syscon          /                       Q      qos@ffad0500             rockchip,rk3288-qos syscon          /                        L      qos@ffad0800             rockchip,rk3288-qos syscon          /                        R      qos@ffad0880             rockchip,rk3288-qos syscon          /                       S      qos@ffad0900             rockchip,rk3288-qos syscon          /    	                    T      qos@ffae0000             rockchip,rk3288-qos syscon          /                         W      qos@ffaf0000             rockchip,rk3288-qos syscon          /                         U      qos@ffaf0080             rockchip,rk3288-qos syscon          /                        V      dma-controller@ffb20000          arm,pl330 arm,primecell         /            @                                       O            Z         u        k            	  &apb_pclk               \      efuse@ffb40000           rockchip,rk3288-efuse           /                                               k     q        &pclk_efuse     cpu-id@7            /            cpu_leakage@17          /               interrupt-controller@ffc01000            arm,gic-400          E        Z                       @  /                              @             `                        	                   pinctrl          rockchip,rk3288-pinctrl            ;                                                gpio@ff750000            rockchip,gpio-bank          /    u                         Q           k     @         k        {            E        Z              C      gpio@ff780000            rockchip,gpio-bank          /    x                         R           k     A         k        {            E        Z         gpio@ff790000            rockchip,gpio-bank          /    y                         S           k     B         k        {            E        Z         gpio@ff7a0000            rockchip,gpio-bank          /    z                         T           k     C         k        {            E        Z         gpio@ff7b0000            rockchip,gpio-bank          /    {                         U           k     D         k        {            E        Z              >      gpio@ff7c0000            rockchip,gpio-bank          /    |                         V           k     E         k        {            E        Z              )      gpio@ff7d0000            rockchip,gpio-bank          /    }                         W           k     F         k        {            E        Z         gpio@ff7e0000            rockchip,gpio-bank          /    ~                         X           k     G         k        {            E        Z         gpio@ff7f0000            rockchip,gpio-bank          /                             Y           k     H         k        {            E        Z         hdmi       hdmi-cec-c0                     x           s      hdmi-cec-c7                     x      hdmi-ddc                         x            x      hdmi-ddc-unwedge                          y            x         pcfg-output-low                     y      pcfg-pull-up                        z      pcfg-pull-down                      {      pcfg-pull-none                      x      pcfg-pull-none-12ma                                ~      suspend    global-pwroff                         x           E      ddrio-pwroff                         x      ddr0-retention                       z      ddr1-retention                       z         edp    edp-hpd                     {         i2c0       i2c0-xfer                         x             x           B         i2c1       i2c1-xfer                        x            x           (         i2c2       i2c2-xfer                  	      x      
      x           G         i2c3       i2c3-xfer                        x            x           +         i2c4       i2c4-xfer                        x            x           ,         i2c5       i2c5-xfer                        x            x           -         i2s0       i2s0-bus          `               x            x            x            x            x            x           ^         lcdc       lcdc-ctl          @              x            x            x            x           l         sdmmc      sdmmc-clk                       |                 sdmmc-cmd                       }                 sdmmc-cd                        z                 sdmmc-bus1                      z      sdmmc-bus4        @              }            }            }            }                    sdio0      sdio0-bus1                      z      sdio0-bus4        @              z            z            z            z                 sdio0-cmd                       z                 sdio0-clk                       x                 sdio0-cd                        z      sdio0-wp                        z      sdio0-pwr                       z      sdio0-bkpwr                     z      sdio0-int                       z         sdio1      sdio1-bus1                      z      sdio1-bus4        @              z            z            z            z      sdio1-cd                        z      sdio1-wp                        z      sdio1-bkpwr                     z      sdio1-int                       z      sdio1-cmd                       z      sdio1-clk                       x      sdio1-pwr                 	      z         emmc       emmc-clk                        x                 emmc-cmd                        z                 emmc-pwr                  	      z                 emmc-bus1                        z      emmc-bus4         @               z            z            z            z      emmc-bus8                        z            z            z            z            z            z            z            z                    spi0       spi0-clk                        z                 spi0-cs0                        z                 spi0-tx                     z                 spi0-rx                     z                 spi0-cs1                        z         spi1       spi1-clk                        z                  spi1-cs0                        z           #      spi1-rx                     z           "      spi1-tx                     z           !         spi2       spi2-cs1                        z      spi2-clk                        z           $      spi2-cs0                        z           '      spi2-rx                     z           &      spi2-tx               	      z           %         uart0      uart0-xfer                       z            x           .      uart0-cts                       z           /      uart0-rts                       x         uart1      uart1-xfer                       z      	      x           0      uart1-cts                 
      z      uart1-rts                       x         uart2      uart2-xfer                       z            x           1         uart3      uart3-xfer                       z            x           2      uart3-cts                 	      z      uart3-rts                 
      x         uart4      uart4-xfer                       z            x           3      uart4-cts                       z      uart4-rts                       x         tsadc      otp-pin                
       x           9      otp-out                
      x           :         pwm0       pwm0-pin                         x           H         pwm1       pwm1-pin                        x           I         pwm2       pwm2-pin                        x           J         pwm3       pwm3-pin                        x           K         gmac       rgmii-pins                      x            x            x            x            ~            ~            ~            ~             x            x            x      	      ~            ~            x            x           =      rmii-pins                       x            x            x            x             x            x            x            x            x            x         spdif      spdif-tx                        x           ]         hym8563    hym8563-int                      z           *         pcfg-pull-none-drv-8ma                        |      pcfg-pull-up-drv-8ma                                   }      pmic       pmic-int                          z           D         sdio-pwrseq    wifi-enable-h                        x                    vbus_host      usb1-en-oc                        z                    vbus_typec     usb0-en-oc                        z                       external-gmac-clock          fixed-clock         sY@        clkin_gmac                         <      sdio-pwrseq          mmc-pwrseq-simple           k         
  &ext_clock           default                       >                       vcc12v-dcin-regulator            regulator-fixed         vcc12v_dcin                   "        4          L                   vcc5v0-sys-regulator             regulator-fixed         vcc5v0_sys                    "        4 LK@        L LK@                      F      vbus-host            regulator-fixed         default                  
  vbus_host                       F                    C             vbus-typec           regulator-fixed         default                    vbus_typec                      F                    C             vccio-flash-regulator            regulator-fixed         vccio_flash         4 w@        L w@                               	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vqmmc-supply pinctrl-names pinctrl-0 cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 vmmc-supply #io-channel-cells dmas dma-names reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp interrupt-names assigned-clock-parents clock_in_out phy-mode snps,reset-active-low snps,reset-delays-us tx_delay rx_delay assigned-clocks phy-supply snps,reset-gpio phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vddio-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-off-in-suspend regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply flash0-supply gpio1830-supply gpio30-supply sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength reset-gpios vin-supply enable-active-high 