  á   8  ,   (            u                                                          google,veyron-speedy-rev9 google,veyron-speedy-rev8 google,veyron-speedy-rev7 google,veyron-speedy-rev6 google,veyron-speedy-rev5 google,veyron-speedy-rev4 google,veyron-speedy-rev3 google,veyron-speedy-rev2 google,veyron-speedy google,veyron rockchip,rk3288           &            7Google Speedy      aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /mmc@ff0f0000            /mmc@ff0c0000            /mmc@ff0d0000            /mmc@ff0e0000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000            /mmc@ff0c0000            /spi@ff110000/ec@0/i2c-tunnel         arm-pmu          arm,cortex-a12-pmu        0                                                                     cpus                                      rockchip,rk3066-smp         &      cpu@500         3cpu          arm,cortex-a12          ?           C               J           ^           m  @        {                r           	                 cpu@501         3cpu          arm,cortex-a12          ?          C              J           ^           m  @        {                r                 cpu@502         3cpu          arm,cortex-a12          ?          C              J           ^           m  @        {                r                 cpu@503         3cpu          arm,cortex-a12          ?          C              J           ^           m  @        {                r                    opp-table-0          operating-points-v2                        opp-126000000                              opp-216000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                opp-1608000000              _"                 opp-1704000000              e          p      opp-1800000000              kI          \         reserved-memory                                      dma-unusable@fe000000           ?                       oscillator           fixed-clock         n6         xin24m                         
      timer            arm,armv7-timer                0                                 
          n6          +      timer@ff810000           rockchip,rk3288-timer           ?                              H           {     a   
        Bpclk timer        display-subsystem            rockchip,display-subsystem          N            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Tр         {           D      r      v        Bbiu ciu ciu-drive ciu-sample            b                               ?            @         C              mreset           yokay                                                                        Z                                                        '            4        ?default         M                     mmc@ff0d0000             rockchip,rk3288-dw-mshc         Tр         {           E      s      w        Bbiu ciu ciu-drive ciu-sample            b                   !           ?            @         C              mreset           yokay                                 W         d        z                    ?default         M                                                                 '         mmc@ff0e0000             rockchip,rk3288-dw-mshc         Tр         {           F      t      x        Bbiu ciu ciu-drive ciu-sample            b                   "           ?            @         C              mreset         	  ydisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Tр         {           G      u      y        Bbiu ciu ciu-drive ciu-sample            b                   #           ?            @         C              mreset           yokay                                            4                 z                    ?default         M               saradc@ff100000          rockchip,saradc         ?                             $                      {      I     [        Bsaradc apb_pclk         C      W        msaradc-apb        	  ydisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         {      A     R        Bspiclk apb_pclk                             tx rx                   ,           ?default         M       !   "   #        ?                                               yokay       ec@0             google,cros-ec-spi          ?                        &                          ?default         M   $         -   i2c-tunnel           google,cros-ec-i2c-tunnel                                            sbs-battery@b            sbs,sbs-battery         ?                                  keyboard-controller          google,cros-ec-keyb         -           =            P     D  j  ; < = > ? @ A	 B	 C  D  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	  + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         {      B     S        Bspiclk apb_pclk                             tx rx                   -           ?default         M   %   &   '   (        ?                                             	  ydisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         {      C     T        Bspiclk apb_pclk                             tx rx                   .           ?default         M   )   *   +   ,        ?                                               yokay            w      flash@0          jedec,spi-nor                   ?             i2c@ff140000             rockchip,rk3288-i2c         ?                             >                                     Bi2c         {     M        ?default         M   -        yokay                        2           d   tpm@20           infineon,slb9645tt          ?                      i2c@ff150000             rockchip,rk3288-i2c         ?                             ?                                     Bi2c         {     O        ?default         M   .      	  ydisabled          i2c@ff160000             rockchip,rk3288-i2c         ?                             @                                     Bi2c         {     P        ?default         M   /        yokay                        2          ,   ts3a227e@3b          ti,ts3a227e         ?   ;         &   0                       ?default         M   1                            trackpad@15          elan,ekth3000           ?            &                          ?default         M   2           3                  i2c@ff170000             rockchip,rk3288-i2c         ?                             A                                     Bi2c         {     Q        ?default         M   4      	  ydisabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           ?                             7                                 {      M     U        Bbaudclk apb_pclk                                tx rx           ?default         M   5   6   7        yokay       bluetooth           ?default         M   8   9   :         brcm,bcm43540-bt               ;                  ;               -   ;               A -        K             serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           ?                             8                                 {      N     V        Bbaudclk apb_pclk                                tx rx           ?default         M   <        yokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           ?    i                         9                                 {      O     W        Bbaudclk apb_pclk            ?default         M   =        yokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           ?                             :                                 {      P     X        Bbaudclk apb_pclk                                tx rx           ?default         M   >      	  ydisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           ?                             ;                                 {      Q     Y        Bbaudclk apb_pclk                  	      
        tx rx           ?default         M   ?      	  ydisabled          dma-controller@ff250000          arm,pl330 arm,primecell         ?    %        @                                      b            m                 {            	  Bapb_pclk                     thermal-zones      reserve-thermal                                @          cpu-thermal            d                     @      trips      cpu_alert0                              :passive            A      cpu_alert1           p                  :passive            B      cpu_crit             _                	  :critical             cooling-maps       map0               A      0                                map1               B      0                          gpu-thermal            d                     @      trips      gpu_alert0           8                  :passive            C      gpu_crit             _                	  :critical             cooling-maps       map0               C           D               tsadc@ff280000           rockchip,rk3288-tsadc           ?    (                         %           {      H     Z        Btsadc apb_pclk          C            
  mtsadc-apb           ?init default sleep          M   E           F           E                   (   G        5 H        yokay            L           c              @      ethernet@ff290000            rockchip,rk3288-gmac            ?    )                                              ~macirq eth_wake_irq         (   G      8  {            f      g      c                 ]      M  Bstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            C      B      
  mstmmaceth         	  ydisabled          usb@ff500000             generic-ehci            ?    P                                    {                H        usb         yokay                   usb@ff520000             generic-ohci            ?    R                         )           {                H        usb       	  ydisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           ?    T                                    {             Botg         host               I      	  usb2-phy                     yokay                   usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           ?    X                                    {             Botg         host                                 
            @   @               J      	  usb2-phy            yokay                  z        )   J               usb@ff5c0000             generic-ehci            ?    \                                    {           	  ydisabled          dma-controller@ff600000          arm,pl330 arm,primecell         ?    `        @                                       b            m                 {            	  Bapb_pclk          	  ydisabled          i2c@ff650000             rockchip,rk3288-i2c         ?    e                         <                                     Bi2c         {     L        ?default         M   K        yokay                        2           d   pmic@1b          rockchip,rk808          ?           xin32k wifibt_32kin          &   0                       ?default         M   L         @                            a           m           y                         M                                            3                      M           M              regulators     DCDC_REG1           vdd_arm                           * q        B          Z  q           	   regulator-state-mem          o         DCDC_REG2           vdd_gpu                           * 5         B         Z  q              regulator-state-mem          o         DCDC_REG3           vcc135_ddr                       regulator-state-mem                   DCDC_REG4           vcc_18                            * w@        B w@              regulator-state-mem                   w@         LDO_REG1          	  vcc33_io                              * 2Z        B 2Z           3   regulator-state-mem                   2Z         LDO_REG3            vdd_10                            * B@        B B@   regulator-state-mem                   B@         LDO_REG7            vdd10_lcd_pwren_h                             * &%        B &%   regulator-state-mem          o         SWITCH_REG1       
  vcc33_lcd                                c   regulator-state-mem          o         LDO_REG6            vcc18_codec                           * w@        B w@           d   regulator-state-mem          o         LDO_REG4          	  vccio_sd            * w@        B 2Z              regulator-state-mem          o         LDO_REG5          	  vcc33_sd            * 2Z        B 2Z              regulator-state-mem          o         LDO_REG8          
  vcc33_ccd                             * 2Z        B 2Z   regulator-state-mem          o                  i2c@ff660000             rockchip,rk3288-i2c         ?    f                         =                                     Bi2c         {     N        ?default         M   N        yokay                        2              max98090@10          maxim,max98090          ?            &   O                       Bmclk            {      q        ?default         M   P                    pwm@ff680000             rockchip,rk3288-pwm         ?    h                            ?default         M   Q        {     _        yokay                     pwm@ff680010             rockchip,rk3288-pwm         ?    h                           ?default         M   R        {     _        yokay                     pwm@ff680020             rockchip,rk3288-pwm         ?    h                            ?default         M   S        {     _      	  ydisabled          pwm@ff680030             rockchip,rk3288-pwm         ?    h 0                          ?default         M   T        {     _      	  ydisabled          sram@ff700000         
   mmio-sram           ?    p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram            ?                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          ?    r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           ?    s                       power-controller          !   rockchip,rk3288-power-controller                                                       h        )   
           h   power-domain@9          ?   	        {                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     U   V   W   X   Y   Z   [   \   ]                  power-domain@11         ?           {            o      p           ^   _                  power-domain@12         ?           {                      `                  power-domain@13         ?           {                 a   b                     reboot-mode          syscon-reboot-mode                     RB         RB        	RB	        	RB         syscon@ff740000          rockchip,rk3288-sgrf syscon         ?    t               clock-controller@ff760000            rockchip,rk3288-cru         ?    v                 {   
        Bxin24m          (   G                   	         H                                    j                k      $  	,#gׄ e  рxh рxh                 syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           ?    w                    G   edp-phy          rockchip,rk3288-dp-phy          {      h        B24m         	A            yokay               x      io-domains        "   rockchip,rk3288-io-voltage-domain           yokay            	L   3        	V           	a           	o   3        	   3        	   c        	           	   d        	         usbphy           rockchip,rk3288-usb-phy                                   yokay       usb-phy@320         	A            ?           {      ]        Bphyclk                      C            
  mphy-reset              J      usb-phy@334         	A            ?  4        {      ^        Bphyclk                      C            
  mphy-reset              H      usb-phy@348         	A            ?  H        {      _        Bphyclk                      C            
  mphy-reset              I            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         ?                     {     p                O           yokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         ?                     	            {      T           
  Bmclk hclk              e           tx                  6           ?default         M   f        (   G      	  ydisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         ?                     	                    5           {      R             Bi2s_clk i2s_hclk               e       e           tx rx           ?default         M   g        	           	           yokay                     crypto@ff8a0000          rockchip,rk3288-crypto          ?            @                 0            {                 }              Baclk hclk sclk apb_pclk         C              mcrypto-rst        iommu@ff900800           rockchip,iommu          ?            @                           {                   Baclk iface          
          	  ydisabled          iommu@ff914000           rockchip,iommu           ?    @            P                                   {                   Baclk iface          
             
      	  ydisabled          rga@ff920000             rockchip,rk3288-rga         ?                                       {                 j        Baclk hclk sclk          
.   h   	        C      i      l      m        mcore axi ahb          vop@ff930000             rockchip,rk3288-vop          ?                                                   {                         Baclk_vop dclk_vop hclk_vop          
.   h   	        C      d      e      f        maxi ahb dclk            
<   i        yokay       port                                            endpoint@0          ?            
C   j           ~      endpoint@1          ?           
C   k           y      endpoint@2          ?           
C   l           s      endpoint@3          ?           
C   m           v            iommu@ff930300           rockchip,iommu          ?                                       {                   Baclk iface          
.   h   	        
            yokay               i      vop@ff940000             rockchip,rk3288-vop          ?                                                   {                         Baclk_vop dclk_vop hclk_vop          
.   h   	        C                          maxi ahb dclk            
<   n        yokay       port                                            endpoint@0          ?            
C   o                 endpoint@1          ?           
C   p           z      endpoint@2          ?           
C   q           t      endpoint@3          ?           
C   r           w            iommu@ff940300           rockchip,iommu          ?                                       {                   Baclk iface          
.   h   	        
            yokay               n      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           ?            @                            {      ~     d      	  Bref pclk            
.   h   	        (   G      	  ydisabled       ports                                port@0          ?                                 endpoint@0          ?            
C   s           l      endpoint@1          ?           
C   t           q         port@1          ?               lvds@ff96c000            rockchip,rk3288-lvds            ?           @         {     g      
  Bpclk_lvds           ?lcdc            M   u        
.   h   	        (   G      	  ydisabled       ports                                port@0          ?                                 endpoint@0          ?            
C   v           m      endpoint@1          ?           
C   w           r         port@1          ?               dp@ff970000          rockchip,rk3288-dp          ?            @                 b           {      i     c        Bdp pclk            x        dp          
.   h   	        C      o        mdp          (   G        yokay             
S   ports                                port@0          ?                                 endpoint@0          ?            
C   y           k      endpoint@1          ?           
C   z           p         port@1          ?                                endpoint@0          ?            
C   {                          hdmi@ff980000            rockchip,rk3288-dw-hdmi         ?                                        g           {     h      m      n        Biahb isfr cec           
.   h   	        (   G        	            yokay            ?default unwedge         M   |           }              ports                                port@0          ?                                 endpoint@0          ?            
C   ~           j      endpoint@1          ?           
C              o         port@1          ?               video-codec@ff9a0000             rockchip,rk3288-vpu         ?                             	          
         
  ~vepu vdpu           {                 
  Baclk hclk           
<           
.   h         iommu@ff9a0800           rockchip,iommu          ?                                       {                   Baclk iface          
            
.   h                    iommu@ff9c0440           rockchip,iommu           ?    @       @           @                o           {                   Baclk iface          
          	  ydisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          ?                   $                                         ~job mmu gpu         {              J           ^           
.   h           yokay            
]              D      opp-table-1          operating-points-v2               opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon          ?                         a      qos@ffaa0080             rockchip,rk3288-qos syscon          ?                        b      qos@ffad0000             rockchip,rk3288-qos syscon          ?                         V      qos@ffad0100             rockchip,rk3288-qos syscon          ?                        W      qos@ffad0180             rockchip,rk3288-qos syscon          ?                       X      qos@ffad0400             rockchip,rk3288-qos syscon          ?                        Y      qos@ffad0480             rockchip,rk3288-qos syscon          ?                       Z      qos@ffad0500             rockchip,rk3288-qos syscon          ?                        U      qos@ffad0800             rockchip,rk3288-qos syscon          ?                        [      qos@ffad0880             rockchip,rk3288-qos syscon          ?                       \      qos@ffad0900             rockchip,rk3288-qos syscon          ?    	                    ]      qos@ffae0000             rockchip,rk3288-qos syscon          ?                         `      qos@ffaf0000             rockchip,rk3288-qos syscon          ?                         ^      qos@ffaf0080             rockchip,rk3288-qos syscon          ?                        _      dma-controller@ffb20000          arm,pl330 arm,primecell         ?            @                                       b            m                 {            	  Bapb_pclk               e      efuse@ffb40000           rockchip,rk3288-efuse           ?                                               {     q        Bpclk_efuse     cpu-id@7            ?            cpu_leakage@17          ?               interrupt-controller@ffc01000            arm,gic-400          
i        
~                       @  ?                              @             `                        	                   pinctrl          rockchip,rk3288-pinctrl         (   G        &                                             ?default sleep           M                                   gpio@ff750000            rockchip,gpio-bank          ?    u                         Q           {     @         
        
            
i        
~           
PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L AP_LID_INT_L EC_IN_RW AC_PRESENT_AP RECOVERY_SW_L OTP_OUT HOST1_PWR_EN USBOTG_PWREN_H AP_WARM_RESET_H nFALUT2 I2C0_SDA_PMIC I2C0_SCL_PMIC SUSPEND_L USB_INT             0      gpio@ff780000            rockchip,gpio-bank          ?    x                         R           {     A         
        
            
i        
~         gpio@ff790000            rockchip,gpio-bank          ?    y                         S           {     B         
        
            
i        
~         Z  
CONFIG0 CONFIG1 CONFIG2     CONFIG3 PWRLIMIT#_CPU EMMC_RST_L   BL_PWR_EN AVDD_1V8_DISP_EN                    gpio@ff7a0000            rockchip,gpio-bank          ?    z                         T           {     C         
        
            
i        
~           
FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7         FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO         gpio@ff7b0000            rockchip,gpio-bank          ?    {                         U           {     D         
        
            
i        
~           
                UART0_RXD UART0_TXD UART0_CTS UART0_RTS SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE             ;      gpio@ff7c0000            rockchip,gpio-bank          ?    |                         V           {     E         
        
            
i        
~         A  
            SPI0_CLK SPI0_CS0 SPI0_TXD SPI0_RXD    VCC50_HDMI_EN                     gpio@ff7d0000            rockchip,gpio-bank          ?    }                         W           {     F         
        
            
i        
~           
I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H ALS_INT INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     SDMMC_D0 SDMMC_D1 SDMMC_D2 SDMMC_D3 SDMMC_CLK SDMMC_CMD            O      gpio@ff7e0000            rockchip,gpio-bank          ?    ~                         X           {     G         
        
            
i        
~           
LCDC_BL PWM_LOG BL_EN TRACKPAD_INT TPM_INT_H SDMMC_DET_L AP_FLASH_WP_L EC_INT CPU_NMI DVS_OK  EDP_HOTPLUG DVS1 nFALUT1 LCD_EN DVS2 VCC5V_GOOD_H I2C4_SDA_TP I2C4_SCL_TP I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD                   gpio@ff7f0000            rockchip,gpio-bank          ?                             Y           {     H         
        
            
i        
~         ^  
RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         
                  hdmi-cec-c7         
                  hdmi-ddc             
                                   |      hdmi-ddc-unwedge             
                                    }      vcc50-hdmi-en           
                                 pcfg-output-low          
                 pcfg-pull-up             
                 pcfg-pull-down           
                 pcfg-pull-none           
                 pcfg-pull-none-12ma          
        
                    suspend    global-pwroff           
                               ddrio-pwroff            
                              ddr0-retention          
                              ddr1-retention          
                   suspend-l-wake          
                               suspend-l-sleep         
                                  edp    edp-hpd         
                     i2c0       i2c0-xfer            
                                     K         i2c1       i2c1-xfer            
                                   -         i2c2       i2c2-xfer            
      	            
                 N         i2c3       i2c3-xfer            
                                   .         i2c4       i2c4-xfer            
                                   /         i2c5       i2c5-xfer            
                                   4         i2s0       i2s0-bus          `  
                                                                                    g         lcdc       lcdc-ctl          @  
                                                           u         sdmmc      sdmmc-clk           
                             sdmmc-cmd           
                             sdmmc-cd            
                  sdmmc-bus1          
                  sdmmc-bus4        @  
                                                                 sdmmc-cd-disabled           
                              sdmmc-cd-pin            
                                 sdio0      sdio0-bus1          
                  sdio0-bus4        @  
                                                                 sdio0-cmd           
                             sdio0-clk           
                             sdio0-cd            
                  sdio0-wp            
                  sdio0-pwr           
                  sdio0-bkpwr         
                  sdio0-int           
                  wifienable-h            
                              bt-enable-l         
                        9      bt-host-wake            
                   bt-host-wake-l          
                        8      bt-dev-wake-sleep           
                   bt-dev-wake-awake           
                   bt-dev-wake         
                        :         sdio1      sdio1-bus1          
                  sdio1-bus4        @  
                                                      sdio1-cd            
                  sdio1-wp            
                  sdio1-bkpwr         
                  sdio1-int           
                  sdio1-cmd           
                  sdio1-clk           
                  sdio1-pwr           
      	               emmc       emmc-clk            
                             emmc-cmd            
                             emmc-pwr            
      	            emmc-bus1           
                   emmc-bus4         @  
                                                       emmc-bus8           
                                                                                                                  emmc-reset          
      	                           spi0       spi0-clk            
                              spi0-cs0            
                       #      spi0-tx         
                       !      spi0-rx         
                       "      spi0-cs1            
                     spi1       spi1-clk            
                       %      spi1-cs0            
                       (      spi1-rx         
                       '      spi1-tx         
                       &         spi2       spi2-cs1            
                  spi2-clk            
                       )      spi2-cs0            
                       ,      spi2-rx         
                       +      spi2-tx         
      	                 *         uart0      uart0-xfer           
                                   5      uart0-cts           
                       6      uart0-rts           
                       7         uart1      uart1-xfer           
                  	                 <      uart1-cts           
      
            uart1-rts           
                     uart2      uart2-xfer           
                                   =         uart3      uart3-xfer           
                                   >      uart3-cts           
      	            uart3-rts           
      
               uart4      uart4-xfer           
                                   ?      uart4-cts           
                  uart4-rts           
                     tsadc      otp-pin         
       
                  E      otp-out         
       
                 F         pwm0       pwm0-pin            
                        Q         pwm1       pwm1-pin            
                       R         pwm2       pwm2-pin            
                       S         pwm3       pwm3-pin            
                       T         gmac       rgmii-pins          
                                                                                                                                           	                                                rmii-pins           
                                                                                                                                  spdif      spdif-tx            
                       f         pcfg-pull-none-drv-8ma           
        
                    pcfg-pull-up-drv-8ma             
        
         pcfg-output-high                              buttons    pwr-key-l           
                               ap-lid-int-l            
                                  pmic       pmic-int-l          
                         L      dvs-1           
                   dvs-2           
                      reboot     ap-warm-reset-h         
                                  recovery-switch    rec-mode-l          
       	                tpm    tpm-int-h           
                      write-protect      fw-wp-ap            
                      codec      hp-det          
                              int-codec           
                        P      mic-det         
                                 headset    ts3a227e-int-l          
                         1         backlight      bl_pwr_en           
                              bl-en           
                                 lcd    lcd-en          
                              avdd-1v8-disp-en            
                                 charger    ac-present-ap           
                                  cros-ec    ec-int          
                        $         trackpad       trackpad-int            
                        2         usb-host       host1-pwr-en            
                               usbotg-pwren-h          
                                  buck-5v    drv-5v          
                                    chosen          serial2:115200n8          memory          3memory          ?                     power-button          
   gpio-keys           ?default         M      key-power           $Power              0              *   t        5   d                  gpio-restart             gpio-restart               0               ?default         M           G         emmc-pwrseq          mmc-pwrseq-emmc         M           ?default         P      	                     sdio-pwrseq          mmc-pwrseq-simple           {            
  Bext_clock           ?default         M           P   ;                       vcc-5v           regulator-fixed         vcc_5v                            * LK@        B LK@        \            g        z                  ?default         M              M      vcc33-sys            regulator-fixed       
  vcc33_sys                             * 2Z        B 2Z        \                    vcc50-hdmi           regulator-fixed         vcc50_hdmi                            \   M         g        z                  ?default         M         vdd-logic            pwm-regulator         
  vdd_logic                                              {                                         * ~        B p        Z        sound         !   rockchip,rockchip-audio-max98090            ?default         M              VEYRON-I2S                                   O                  O                         6         backlight-regulator          regulator-fixed          g        z                  ?default         M           backlight_regulator         \           J  :                 panel-regulator          regulator-fixed          g        z                  ?default         M           panel_regulator         \                    vcc18-lcd            regulator-fixed          g        z                  ?default         M         
  vcc18_lcd                             \         backlight            pwm-backlight           [               m                                        ?default         M                   B@               
           
                            panel            innolux,n116bge         yokay                             panel-timing            l          V                      <                                          '           4           @           J          ports      port       endpoint            
C              {               gpio-charger             gpio-charger            Wmains              0               ?default         M         lid-switch        
   gpio-keys           ?default         M      switch-lid          $Lid            0                       *            d           5            vccsys           regulator-fixed         vccsys                                     vcc5-host1-regulator             regulator-fixed          g        z   0               ?default         M           vcc5_host1                          vcc5v-otg-regulator          regulator-fixed          g        z   0               ?default         M           vcc5_host2                             	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 i2c20 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay cd-gpios rockchip,default-sample-phase sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply disable-wp pinctrl-names pinctrl-0 cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable mmc-hs200-1_8v #io-channel-cells dmas dma-names google,cros-ec-spi-pre-delay spi-max-frequency google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap rx-sample-delay-ns i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended ti,micbias vcc-supply wakeup-source reg-shift reg-io-width host-wakeup-gpios shutdown-gpios device-wakeup-gpios max-speed brcm,bt-pcm-int-params #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size assigned-clocks assigned-clock-parents rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply vcc9-supply vcc11-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply sdcard-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint force-hpd mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios vin-supply enable-active-high gpio pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec startup-delay-us brightness-levels num-interpolated-steps default-brightness-level enable-gpios post-pwm-on-delay-ms pwm-off-delay-ms power-supply backlight hactive hfront-porch hback-porch hsync-len hsync-active vactive vfront-porch vback-porch vsync-len vsync-active charger-type linux,input-type 