     8  H   (                                                                      google,veyron-tiger-rev8 google,veyron-tiger-rev7 google,veyron-tiger-rev6 google,veyron-tiger-rev5 google,veyron-tiger-rev4 google,veyron-tiger-rev3 google,veyron-tiger-rev2 google,veyron-tiger-rev1 google,veyron-tiger-rev0 google,veyron-tiger google,veyron rockchip,rk3288           &            7Google Tiger       aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /mmc@ff0f0000            /mmc@ff0c0000            /mmc@ff0d0000            /mmc@ff0e0000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                      rockchip,rk3066-smp               cpu@500         (cpu          arm,cortex-a12          4           8               ?           S           b  @        p              w  r           	                 cpu@501         (cpu          arm,cortex-a12          4          8              ?           S           b  @        p              w  r                 cpu@502         (cpu          arm,cortex-a12          4          8              ?           S           b  @        p              w  r                 cpu@503         (cpu          arm,cortex-a12          4          8              ?           S           b  @        p              w  r                    opp-table-0          operating-points-v2                        opp-126000000                              opp-216000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                opp-1608000000              _"                 opp-1704000000              e          p      opp-1800000000              kI          \         reserved-memory                                      dma-unusable@fe000000           4                       oscillator           fixed-clock         n6         xin24m                         
      timer            arm,armv7-timer                0                                 
          n6                 timer@ff810000           rockchip,rk3288-timer           4                              H           p     a   
        7pclk timer        display-subsystem            rockchip,display-subsystem          C            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Iр         p           D      r      v        7biu ciu ciu-drive ciu-sample            W                               4            @         8              breset         	  ndisabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         Iр         p           E      s      w        7biu ciu ciu-drive ciu-sample            W                   !           4            @         8              breset           nokay            u                                                          default                                                                         %                                btmrvl@2             marvell,sd8897-bt           4            &                          2           default                     mmc@ff0e0000             rockchip,rk3288-dw-mshc         Iр         p           F      t      x        7biu ciu ciu-drive ciu-sample            W                   "           4            @         8              breset         	  ndisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Iр         p           G      u      y        7biu ciu ciu-drive ciu-sample            W                   #           4            @         8              breset           nokay            u            E        W            u                                     default                        saradc@ff100000          rockchip,saradc         4                             $                      p      I     [        7saradc apb_pclk         8      W        bsaradc-apb        	  ndisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         p      A     R        7spiclk apb_pclk                             tx rx                   ,           default                             4                                             	  ndisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         p      B     S        7spiclk apb_pclk                             tx rx                   -           default                      !        4                                             	  ndisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         p      C     T        7spiclk apb_pclk                             tx rx                   .           default            "   #   $   %        4                                               nokay                  flash@0          jedec,spi-nor                   4             i2c@ff140000             rockchip,rk3288-i2c         4                             >                                     7i2c         p     M        default            &        nokay                        2           d   tpm@20           infineon,slb9645tt          4                      i2c@ff150000             rockchip,rk3288-i2c         4                             ?                                     7i2c         p     O        default            '        nokay                        2          ,   touchscreen@10           elan,ekth3500           4            &   (                       default            )   *           (              (   +        5   +         B         i2c@ff160000             rockchip,rk3288-i2c         4                             @                                     7i2c         p     P        default            ,        nokay                        2          ,   ts3a227e@3b          ti,ts3a227e         4   ;         &   -                       default            .        P                       i2c@ff170000             rockchip,rk3288-i2c         4                             A                                     7i2c         p     Q        default            /      	  ndisabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           4                             7           [           e           p      M     U        7baudclk apb_pclk                                tx rx           default            0   1   2        nokay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           4                             8           [           e           p      N     V        7baudclk apb_pclk                                tx rx           default            3        nokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           4    i                         9           [           e           p      O     W        7baudclk apb_pclk            default            4        nokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           4                             :           [           e           p      P     X        7baudclk apb_pclk                                tx rx           default            5      	  ndisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           4                             ;           [           e           p      Q     Y        7baudclk apb_pclk                  	      
        tx rx           default            6      	  ndisabled          dma-controller@ff250000          arm,pl330 arm,primecell         4    %        @                                      r            }                 p            	  7apb_pclk                     thermal-zones      reserve-thermal                                7          cpu-thermal            d                     7      trips      cpu_alert0           p                  /passive            8      cpu_alert1           $                  /passive            9      cpu_crit                             	  /critical             cooling-maps       map0               8      0                                map1               9      0                          gpu-thermal            d                     7      trips      gpu_alert0           4                  /passive            :      gpu_crit                             	  /critical             cooling-maps       map0               :           ;               tsadc@ff280000           rockchip,rk3288-tsadc           4    (                         %           p      H     Z        7tsadc apb_pclk          8            
  btsadc-apb           init default sleep             <           =           <        "           8   >        E H        nokay            \           s              7      ethernet@ff290000            rockchip,rk3288-gmac            4    )                                              macirq eth_wake_irq         8   >      8  p            f      g      c                 ]      M  7stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            8      B      
  bstmmaceth           nokay                             ?        input              @        rgmii              A        default            B   C   D   E                      0                                   )      '  u0         B   mdio0            snps,dwmac-mdio                              ethernet-phy@1          4              @            usb@ff500000             generic-ehci            4    P                                    p             >   F        Cusb         nokay             M      usb@ff520000             generic-ohci            4    R                         )           p             >   F        Cusb       	  ndisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           4    T                                    p             7otg         chost            >   G      	  Cusb2-phy             k        nokay                   usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           4    X                                    p             7otg         chost                                             @   @            >   H      	  Cusb2-phy            nokay                  z           H               usb@ff5c0000             generic-ehci            4    \                                    p           	  ndisabled          dma-controller@ff600000          arm,pl330 arm,primecell         4    `        @                                       r            }                 p            	  7apb_pclk          	  ndisabled          i2c@ff650000             rockchip,rk3288-i2c         4    e                         <                                     7i2c         p     L        default            I        nokay                        2           d   pmic@1b          rockchip,rk808          4           xin32k wifibt_32kin          &   -                       default            J   K   L                  B                                                                          &           2           >           K   +        X           e   M          M               o   N              regulators     DCDC_REG1           |vdd_arm                            q                    q           	   regulator-state-mem                   DCDC_REG2           |vdd_gpu                            5                    q              regulator-state-mem                   DCDC_REG3           |vcc135_ddr                       regulator-state-mem                   DCDC_REG4           |vcc_18                             w@         w@              regulator-state-mem                  ' w@         LDO_REG3            |vdd_10                             B@         B@   regulator-state-mem                  ' B@         LDO_REG7          
  |vdd10_lcd                              B@         B@   regulator-state-mem                   SWITCH_REG1       
  |vcc33_lcd                                d   regulator-state-mem                   LDO_REG6            |vcc18_codec                            w@         w@           e   regulator-state-mem                   LDO_REG2                               w@         w@        |vdd18_lcdt     regulator-state-mem                   LDO_REG8                               2Z         2Z      
  |vcc33_ccd      regulator-state-mem                   SWITCH_REG2       
  |vcc33_lan              A               i2c@ff660000             rockchip,rk3288-i2c         4    f                         =                                     7i2c         p     N        default            O        nokay                        2              max98090@10          maxim,max98090          4            &   P                       7mclk            p      q        default            Q                    pwm@ff680000             rockchip,rk3288-pwm         4    h                 C           default            R        p     _        nokay                     pwm@ff680010             rockchip,rk3288-pwm         4    h                C           default            S        p     _        nokay                     pwm@ff680020             rockchip,rk3288-pwm         4    h                 C           default            T        p     _      	  ndisabled          pwm@ff680030             rockchip,rk3288-pwm         4    h 0               C           default            U        p     _      	  ndisabled          sram@ff700000         
   mmio-sram           4    p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram            4                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          4    r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           4    s                       power-controller          !   rockchip,rk3288-power-controller            N                                           h           
           i   power-domain@9          4   	        p                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  b   V   W   X   Y   Z   [   \   ]   ^        N          power-domain@11         4           p            o      p        b   _   `        N          power-domain@12         4           p                   b   a        N          power-domain@13         4           p              b   b   c        N             reboot-mode          syscon-reboot-mode          i           pRB         |RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon         4    t               clock-controller@ff760000            rockchip,rk3288-cru         4    v                 p   
        7xin24m          8   >                            H                                    j                k      $  #gׄ e  рxh рxh                 syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           4    w                    >   edp-phy          rockchip,rk3288-dp-phy          p      h        724m                     nokay               y      io-domains        "   rockchip,rk3288-io-voltage-domain           nokay               +                                 +        	   +        	   d        	            	,   e      usbphy           rockchip,rk3288-usb-phy                                   nokay       usb-phy@320                     4           p      ]        7phyclk                      8            
  bphy-reset              H      usb-phy@334                     4  4        p      ^        7phyclk                      8            
  bphy-reset              F      usb-phy@348                     4  H        p      _        7phyclk                      8            
  bphy-reset              G            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         4                     p     p                O           nokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         4                     	9            p      T           
  7mclk hclk              f           tx                  6           default            g        8   >      	  ndisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         4                     	9                    5           p      R             7i2s_clk i2s_hclk               f       f           tx rx           default            h        	J           	e           nokay                     crypto@ff8a0000          rockchip,rk3288-crypto          4            @                 0            p                 }              7aclk hclk sclk apb_pclk         8              bcrypto-rst        iommu@ff900800           rockchip,iommu          4            @                           p                   7aclk iface          	          	  ndisabled          iommu@ff914000           rockchip,iommu           4    @            P                                   p                   7aclk iface          	             	      	  ndisabled          rga@ff920000             rockchip,rk3288-rga         4                                       p                 j        7aclk hclk sclk          	   i   	        8      i      l      m        bcore axi ahb          vop@ff930000             rockchip,rk3288-vop          4                                                   p                         7aclk_vop dclk_vop hclk_vop          	   i   	        8      d      e      f        baxi ahb dclk            	   j        nokay       port                                            endpoint@0          4            	   k                 endpoint@1          4           	   l           {      endpoint@2          4           	   m           t      endpoint@3          4           	   n           w            iommu@ff930300           rockchip,iommu          4                                       p                   7aclk iface          	   i   	        	            nokay               j      vop@ff940000             rockchip,rk3288-vop          4                                                   p                         7aclk_vop dclk_vop hclk_vop          	   i   	        8                          baxi ahb dclk            	   o        nokay       port                                            endpoint@0          4            	   p                 endpoint@1          4           	   q           |      endpoint@2          4           	   r           u      endpoint@3          4           	   s           x            iommu@ff940300           rockchip,iommu          4                                       p                   7aclk iface          	   i   	        	            nokay               o      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           4            @                            p      ~     d      	  7ref pclk            	   i   	        8   >      	  ndisabled       ports                                port@0          4                                 endpoint@0          4            	   t           m      endpoint@1          4           	   u           r         port@1          4               lvds@ff96c000            rockchip,rk3288-lvds            4           @         p     g      
  7pclk_lvds           lcdc               v        	   i   	        8   >      	  ndisabled       ports                                port@0          4                                 endpoint@0          4            	   w           n      endpoint@1          4           	   x           s         port@1          4               dp@ff970000          rockchip,rk3288-dp          4            @                 b           p      i     c        7dp pclk         >   y        Cdp          	   i   	        8      o        bdp          8   >        nokay            default            z   ports                                port@0          4                                 endpoint@0          4            	   {           l      endpoint@1          4           	   |           q         port@1          4                                endpoint@0          4            	   }                          hdmi@ff980000            rockchip,rk3288-dw-hdmi         4                     e                   g           p     h      m      n        7iahb isfr cec           	   i   	        8   >        	9            nokay            default unwedge            ~                         ports                                port@0          4                                 endpoint@0          4            	              k      endpoint@1          4           	              p         port@1          4               video-codec@ff9a0000             rockchip,rk3288-vpu         4                             	          
         
  vepu vdpu           p                 
  7aclk hclk           	           	   i         iommu@ff9a0800           rockchip,iommu          4                                       p                   7aclk iface          	            	   i                    iommu@ff9c0440           rockchip,iommu           4    @       @           @                o           p                   7aclk iface          	          	  ndisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          4                   $                                         job mmu gpu         p              ?           S           	   i           nokay            	              ;      opp-table-1          operating-points-v2               opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon          4                         b      qos@ffaa0080             rockchip,rk3288-qos syscon          4                        c      qos@ffad0000             rockchip,rk3288-qos syscon          4                         W      qos@ffad0100             rockchip,rk3288-qos syscon          4                        X      qos@ffad0180             rockchip,rk3288-qos syscon          4                       Y      qos@ffad0400             rockchip,rk3288-qos syscon          4                        Z      qos@ffad0480             rockchip,rk3288-qos syscon          4                       [      qos@ffad0500             rockchip,rk3288-qos syscon          4                        V      qos@ffad0800             rockchip,rk3288-qos syscon          4                        \      qos@ffad0880             rockchip,rk3288-qos syscon          4                       ]      qos@ffad0900             rockchip,rk3288-qos syscon          4    	                    ^      qos@ffae0000             rockchip,rk3288-qos syscon          4                         a      qos@ffaf0000             rockchip,rk3288-qos syscon          4                         _      qos@ffaf0080             rockchip,rk3288-qos syscon          4                        `      dma-controller@ffb20000          arm,pl330 arm,primecell         4            @                                       r            }                 p            	  7apb_pclk               f      efuse@ffb40000           rockchip,rk3288-efuse           4                                               p     q        7pclk_efuse     cpu-id@7            4            cpu_leakage@17          4               interrupt-controller@ffc01000            arm,gic-400          	        	                       @  4                              @             `                        	                   pinctrl          rockchip,rk3288-pinctrl         8   >                                                     default sleep                                                                gpio@ff750000            rockchip,gpio-bank          4    u                         Q           p     @         	        
            	        	           
PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L HUB_USB1_nFALUT PHY_PMEB PHY_INT RECOVERY_SW_L OTP_OUT  USB_OTG_POWER_EN AP_WARM_RESET_H USB_OTG_nFALUT I2C0_SDA_PMIC I2C0_SCL_PMIC DEVMODE_L USB_INT               -      gpio@ff780000            rockchip,gpio-bank          4    x                         R           p     A         	        
            	        	         gpio@ff790000            rockchip,gpio-bank          4    y                         S           p     B         	        
            	        	         i  
CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L   BL_PWR_EN  TOUCH_INT TOUCH_RST I2C3_SCL_TP I2C3_SDA_TP               (      gpio@ff7a0000            rockchip,gpio-bank          4    z                         T           p     C         	        
            	        	           
FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7 VCC5V_GOOD_H        FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO      PHY_TXD2 PHY_TXD3 MAC_RXD2 MAC_RXD3 PHY_TXD0 PHY_TXD1 MAC_RXD0 MAC_RXD1        gpio@ff7b0000            rockchip,gpio-bank          4    {                         U           p     D         	        
            	        	           
MAC_MDC MAC_RXDV MAC_RXER MAC_CLK PHY_TXEN MAC_MDIO MAC_RXCLK  PHY_RST PHY_TXCLK       UART0_RXD UART0_TXD UART0_CTS_L UART0_RTS_L SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE                    gpio@ff7c0000            rockchip,gpio-bank          4    |                         V           p     E         	        
            	        	           
            USB_OTG_CTL1 HUB_USB2_CTL1 HUB_USB2_PWR_EN HUB_USB_ILIM_SEL USB_OTG_STATUS_L HUB_USB1_CTL1 HUB_USB1_PWR_EN VCC50_HDMI_EN                     gpio@ff7d0000            rockchip,gpio-bank          4    }                         W           p     F         	        
            	        	           
I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H  INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     HUB_USB2_nFALUT USB_OTG_ILIM_SEL              P      gpio@ff7e0000            rockchip,gpio-bank          4    ~                         X           p     G         	        
            	        	           
LCD_BL_PWM PWM_LOG BL_EN PWR_LED1 TPM_INT_H SPK_ON AP_FLASH_WP_L  CPU_NMI DVSOK  EDP_HPD DVS1  LCD_EN DVS2 HDMI_CEC I2C4_SDA I2C4_SCL I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD               M      gpio@ff7f0000            rockchip,gpio-bank          4                             Y           p     H         	        
            	        	         ^  
RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         
*                  hdmi-cec-c7         
*                  hdmi-ddc             
*                                   ~      hdmi-ddc-unwedge             
*                                          vcc50-hdmi-en           
*                                 pcfg-output-low          
8                 pcfg-pull-up             
C                 pcfg-pull-down           
P                 pcfg-pull-none           
_                 pcfg-pull-none-12ma          
_        
l                    suspend    global-pwroff           
*                               ddrio-pwroff            
*                              ddr0-retention          
*                              ddr1-retention          
*                      edp    edp-hpd         
*                       z         i2c0       i2c0-xfer            
*                                     I         i2c1       i2c1-xfer            
*                                   &         i2c2       i2c2-xfer            
*      	            
                 O         i2c3       i2c3-xfer            
*                                   '         i2c4       i2c4-xfer            
*                                   ,         i2c5       i2c5-xfer            
*                                   /         i2s0       i2s0-bus          `  
*                                                                                    h         lcdc       lcdc-ctl          @  
*                                                           v         sdmmc      sdmmc-clk           
*                  sdmmc-cmd           
*                  sdmmc-cd            
*                  sdmmc-bus1          
*                  sdmmc-bus4        @  
*                                                         sdio0      sdio0-bus1          
*                  sdio0-bus4        @  
*                                                                 sdio0-cmd           
*                             sdio0-clk           
*                             sdio0-cd            
*                  sdio0-wp            
*                  sdio0-pwr           
*                  sdio0-bkpwr         
*                  sdio0-int           
*                  wifienable-h            
*                              bt-enable-l         
*                   bt-host-wake            
*                   bt-host-wake-l          
*                              bt-dev-wake-sleep           
*                              bt-dev-wake-awake           
*                              bt-dev-wake         
*                      sdio1      sdio1-bus1          
*                  sdio1-bus4        @  
*                                                      sdio1-cd            
*                  sdio1-wp            
*                  sdio1-bkpwr         
*                  sdio1-int           
*                  sdio1-cmd           
*                  sdio1-clk           
*                  sdio1-pwr           
*      	               emmc       emmc-clk            
*                             emmc-cmd            
*                             emmc-pwr            
*      	            emmc-bus1           
*                   emmc-bus4         @  
*                                                       emmc-bus8           
*                                                                                                                  emmc-reset          
*      	                           spi0       spi0-clk            
*                             spi0-cs0            
*                             spi0-tx         
*                             spi0-rx         
*                             spi0-cs1            
*                     spi1       spi1-clk            
*                             spi1-cs0            
*                       !      spi1-rx         
*                              spi1-tx         
*                                spi2       spi2-cs1            
*                  spi2-clk            
*                       "      spi2-cs0            
*                       %      spi2-rx         
*                       $      spi2-tx         
*      	                 #         uart0      uart0-xfer           
*                                   0      uart0-cts           
*                       1      uart0-rts           
*                       2         uart1      uart1-xfer           
*                  	                 3      uart1-cts           
*      
            uart1-rts           
*                     uart2      uart2-xfer           
*                                   4         uart3      uart3-xfer           
*                                   5      uart3-cts           
*      	            uart3-rts           
*      
               uart4      uart4-xfer           
*                                   6      uart4-cts           
*                  uart4-rts           
*                     tsadc      otp-pin         
*       
                  <      otp-out         
*       
                 =         pwm0       pwm0-pin            
*                        R         pwm1       pwm1-pin            
*                       S         pwm2       pwm2-pin            
*                       T         pwm3       pwm3-pin            
*                       U         gmac       rgmii-pins          
*                                                                                                                                           	                                                     B      rmii-pins           
*                                                                                                                               phy-rst         
*                        C      phy-pmeb            
*                         D      phy-int         
*                         E         spdif      spdif-tx            
*                       g         pcfg-pull-none-drv-8ma           
_        
l                    pcfg-pull-up-drv-8ma             
C        
l         pcfg-output-high             
{                 buttons    pwr-key-l           
*                                  pmic       pmic-int-l          
*                         J      dvs-1           
*                        K      dvs-2           
*                        L         reboot     ap-warm-reset-h         
*                                  recovery-switch    rec-mode-l          
*       	                tpm    tpm-int-h           
*                      write-protect      fw-wp-ap            
*                      codec      hp-det          
*                              int-codec           
*                        Q      mic-det         
*                                 headset    ts3a227e-int-l          
*                         .         buck-5v    drv-5v          
*                                 leds       pwr-led1-on         
*                              pwr-led1-blink          
*                                 usb-bc12       usb-otg-ilim-sel            
*                              usb-usb-ilim-sel            
*                                 usb-host       hub_usb1_pwr_en         
*                              hub_usb2_pwr_en         
*                              usb_otg_pwr_en          
*                                  backlight      bl_pwr_en           
*                              bl-en           
*                                 lcd    lcd-en          
*                                 touchscreen    touch-int           
*                        )      touch-rst           
*                        *            chosen          
serial2:115200n8          memory          (memory          4                     power-button          
   gpio-keys           default               key-power           
Power           "   -              
   t        
   d         B         gpio-restart             gpio-restart            "   -               default                    
         emmc-pwrseq          mmc-pwrseq-emmc                    default            (   	                     sdio-pwrseq          mmc-pwrseq-simple           p            
  7ext_clock           default                                              vcc-5v           regulator-fixed         |vcc_5v                             LK@         LK@         
           M               default                       N      vcc33-sys            regulator-fixed       
  |vcc33_sys                              2Z         2Z                 vcc50-hdmi           regulator-fixed         |vcc50_hdmi                            
   N         
                          default                  vdd-logic            pwm-regulator         
  |vdd_logic           
                     
           
   {                                          ~         p                sound         !   rockchip,rockchip-audio-max98090            default                       VEYRON-I2S          #           ;           P   P               f   P              }                    vccsys           regulator-fixed         |vccsys                                     vcc33-io             regulator-fixed                         	  |vcc33_io               +      vcc5-host1-regulator             regulator-fixed          
                          default                    |vcc5_host1                          vcc5-host2-regulator             regulator-fixed          
                          default                    |vcc5_host2                          vcc5v-otg-regulator          regulator-fixed          
           -               default                  	  |vcc5_otg                            external-gmac-clock          fixed-clock                     sY@      	  ext_gmac               ?      backlight-regulator          regulator-fixed          
           (               default                    |backlight_regulator         
             :                 panel-regulator          regulator-fixed          
           M               default                    |panel_regulator         
                    backlight            pwm-backlight                                                  M               default                    
        B@               
           
        .                    panel            auo,b101ean01           nokay            .           ;      panel-timing            @        E           M           Z           f            p           x                               ports      port       endpoint            	              }                  	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply marvell,wakeup-pin cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended reset-gpios vcc33-supply vccio-supply wakeup-source ti,micbias reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-handle phy-mode phy-supply rx_delay tx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply dvs-gpios vcc11-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority enable-active-high vin-supply pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec startup-delay-us brightness-levels num-interpolated-steps default-brightness-level enable-gpios post-pwm-on-delay-ms pwm-off-delay-ms power-supply backlight hactive hfront-porch hback-porch hsync-len vactive vfront-porch vback-porch vsync-len 