  9   8     (            	I                                                        %   amarula,vyasa-rk3288 rockchip,rk3288             &            7Amarula Vyasa-RK3288       aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /mmc@ff0f0000            /mmc@ff0c0000            /mmc@ff0d0000            /mmc@ff0e0000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                      rockchip,rk3066-smp               cpu@500         #cpu          arm,cortex-a12          /           3               :           N           ]  @        k              r  r           	                 cpu@501         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                 cpu@502         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                 cpu@503         #cpu          arm,cortex-a12          /          3              :           N           ]  @        k              r  r           	                    opp-table-0          operating-points-v2                        opp-126000000                              opp-216000000                               opp-312000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                 opp-1608000000              _"          p         reserved-memory                                      dma-unusable@fe000000           /                       oscillator           fixed-clock         n6         xin24m                         
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer           /                              H           k     a   
        1pclk timer        display-subsystem            rockchip,display-subsystem          =            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Cр         k           D      r      v        1biu ciu ciu-drive ciu-sample            Q                               /            @         3              \reset           hokay            o            y                                     default                                                 mmc@ff0d0000             rockchip,rk3288-dw-mshc         Cр         k           E      s      w        1biu ciu ciu-drive ciu-sample            Q                   !           /            @         3              \reset         	  hdisabled          mmc@ff0e0000             rockchip,rk3288-dw-mshc         Cр         k           F      t      x        1biu ciu ciu-drive ciu-sample            Q                   "           /            @         3              \reset         	  hdisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Cр         k           G      u      y        1biu ciu ciu-drive ciu-sample            Q                   #           /            @         3              \reset           hokay            o            y                 default                                      saradc@ff100000          rockchip,saradc         /                             $                      k      I     [        1saradc apb_pclk         3      W        \saradc-apb        	  hdisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      A     R        1spiclk apb_pclk         
                    tx rx                   ,           default                             /                                             	  hdisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      B     S        1spiclk apb_pclk         
                    tx rx                   -           default                              /                                             	  hdisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         k      C     T        1spiclk apb_pclk         
                    tx rx                   .           default            !   "   #   $        /                                             	  hdisabled          i2c@ff140000             rockchip,rk3288-i2c         /                             >                                     1i2c         k     M        default            %      	  hdisabled          i2c@ff150000             rockchip,rk3288-i2c         /                             ?                                     1i2c         k     O        default            &      	  hdisabled          i2c@ff160000             rockchip,rk3288-i2c         /                             @                                     1i2c         k     P        default            '      	  hdisabled          i2c@ff170000             rockchip,rk3288-i2c         /                             A                                     1i2c         k     Q        default            (        hokay               q      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             7                      #           k      M     U        1baudclk apb_pclk            
                    tx rx           default            )      	  hdisabled          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             8                      #           k      N     V        1baudclk apb_pclk            
                    tx rx           default            *      	  hdisabled          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           /    i                         9                      #           k      O     W        1baudclk apb_pclk            default            +        hokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             :                      #           k      P     X        1baudclk apb_pclk            
                    tx rx           default            ,      	  hdisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           /                             ;                      #           k      Q     Y        1baudclk apb_pclk            
      	      
        tx rx           default            -      	  hdisabled          dma-controller@ff250000          arm,pl330 arm,primecell         /    %        @                                      0            ;         V        k            	  1apb_pclk                     thermal-zones      reserve-thermal         m                       .          cpu-thermal         m   d                     .      trips      cpu_alert0           p                  *passive            /      cpu_alert1           $                  *passive            0      cpu_crit             _                	  *critical             cooling-maps       map0               /      0                                map1               0      0                          gpu-thermal         m   d                     .      trips      gpu_alert0           p                  *passive            1      gpu_crit             _                	  *critical             cooling-maps       map0               1           2               tsadc@ff280000           rockchip,rk3288-tsadc           /    (                         %           k      H     Z        1tsadc apb_pclk          3            
  \tsadc-apb           init default sleep             3           4           3                      5         s        hokay                       1              .      ethernet@ff290000            rockchip,rk3288-gmac            /    )                                              Lmacirq eth_wake_irq            5      8  k            f      g      c                 ]      M  1stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            3      B      
  \stmmaceth           hokay            \              l   6        input           default            7   8   9   :           ;        rgmii                          ' B@           <                 0                 usb@ff500000             generic-ehci            /    P                                    k                =        usb         hokay          usb@ff520000             generic-ohci            /    R                         )           k                =        usb       	  hdisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    T                                    k             1otg          host               >      	  usb2-phy                     hokay            default            ?      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           /    X                                    k             1otg          otg                    1          @            @   @               @      	  usb2-phy            hokay            O   A      usb@ff5c0000             generic-ehci            /    \                                    k           	  hdisabled          dma-controller@ff600000          arm,pl330 arm,primecell         /    `        @                                       0            ;         V        k            	  1apb_pclk          	  hdisabled          i2c@ff650000             rockchip,rk3288-i2c         /    e                         <                                     1i2c         k     L        default            B        hokay                pmic@1b          rockchip,rk808          /            &   C                                  xin32k rk808-clkout2            default            D   E         [         |           F           F           F           F           F           F                      F           F           F              regulators     DCDC_REG1           vdd_arm           q        8 p         P         d           	   regulator-state-mem          v         DCDC_REG2           vdd_gpu           P        8          P         d           v   regulator-state-mem                   B@         DCDC_REG3           vcc_ddr          P         d   regulator-state-mem                   DCDC_REG4           vcc_io            2Z        8 2Z         P         d              regulator-state-mem                   2Z         LDO_REG1            vcc_tp            2Z        8 2Z         P         d   regulator-state-mem                   2Z         LDO_REG2          
  vcc_codec             2Z        8 2Z         P         d   regulator-state-mem          v         LDO_REG3            vdd_10            B@        8 B@         P         d   regulator-state-mem                   B@         LDO_REG4            vcc_gps           w@        8 w@         P         d   regulator-state-mem                   w@         LDO_REG5          	  vccio_sd              w@        8 2Z         P         d              regulator-state-mem                   2Z         LDO_REG6          
  vdd10_lcd             B@        8 B@         P         d   regulator-state-mem                   B@         LDO_REG7            vcc_18            w@        8 w@         P         d           Z   regulator-state-mem                   w@         LDO_REG8          
  vcc18_lcd             w@        8 w@         P         d   regulator-state-mem                   w@         SWITCH_REG1         vcc_sd            2Z        8 2Z         P         d              regulator-state-mem                   SWITCH_REG2         vcc_lan           2Z        8 2Z         P         d           ;   regulator-state-mem                            i2c@ff660000             rockchip,rk3288-i2c         /    f                         =                                     1i2c         k     N        default            G      	  hdisabled          pwm@ff680000             rockchip,rk3288-pwm         /    h                            default            H        k     _      	  hdisabled          pwm@ff680010             rockchip,rk3288-pwm         /    h                           default            I        k     _      	  hdisabled          pwm@ff680020             rockchip,rk3288-pwm         /    h                            default            J        k     _      	  hdisabled          pwm@ff680030             rockchip,rk3288-pwm         /    h 0                          default            K        k     _      	  hdisabled          sram@ff700000         
   mmio-sram           /    p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram            /                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          /    r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           /    s                       power-controller          !   rockchip,rk3288-power-controller                                                 \      h        l   
           ^   power-domain@9          /   	        k                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     L   M   N   O   P   Q   R   S   T                  power-domain@11         /           k            o      p           U   V                  power-domain@12         /           k                      W                  power-domain@13         /           k                 X   Y                     reboot-mode          syscon-reboot-mode                     RB         RB        
RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon         /    t               clock-controller@ff760000            rockchip,rk3288-cru         /    v                 k   
        1xin24m             5                   &         H  \                                  j                k      $  3#gׄ e  рxh рxh                 syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           /    w                    5   edp-phy          rockchip,rk3288-dp-phy          k      h        124m         H          	  hdisabled               n      io-domains        "   rockchip,rk3288-io-voltage-domain           hokay            S   Z        `           j           u   Z           ;                                                       Z      usbphy           rockchip,rk3288-usb-phy                                   hokay       usb-phy@320         H            /           k      ]        1phyclk                      3            
  \phy-reset              @      usb-phy@334         H            /  4        k      ^        1phyclk                      3            
  \phy-reset              =      usb-phy@348         H            /  H        k      _        1phyclk                      3            
  \phy-reset              >            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         /                     k     p                O           hokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         /                                 k      T           
  1mclk hclk           
   [           tx                  6           default            \           5      	  hdisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         /                                         5           k      R             1i2s_clk i2s_hclk            
   [       [           tx rx           default            ]                            	  hdisabled          crypto@ff8a0000          rockchip,rk3288-crypto          /            @                 0            k                 }              1aclk hclk sclk apb_pclk         3              \crypto-rst        iommu@ff900800           rockchip,iommu          /            @                           k                   1aclk iface                    	  hdisabled          iommu@ff914000           rockchip,iommu           /    @            P                                   k                   1aclk iface                       (      	  hdisabled          rga@ff920000             rockchip,rk3288-rga         /                                       k                 j        1aclk hclk sclk          C   ^   	        3      i      l      m        \core axi ahb          vop@ff930000             rockchip,rk3288-vop          /                                                   k                         1aclk_vop dclk_vop hclk_vop          C   ^   	        3      d      e      f        \axi ahb dclk            Q   _        hokay       port                                            endpoint@0          /            X   `           r      endpoint@1          /           X   a           o      endpoint@2          /           X   b           i      endpoint@3          /           X   c           l            iommu@ff930300           rockchip,iommu          /                                       k                   1aclk iface          C   ^   	                    hokay               _      vop@ff940000             rockchip,rk3288-vop          /                                                   k                         1aclk_vop dclk_vop hclk_vop          C   ^   	        3                          \axi ahb dclk            Q   d        hokay       port                                            endpoint@0          /            X   e           s      endpoint@1          /           X   f           p      endpoint@2          /           X   g           j      endpoint@3          /           X   h           m            iommu@ff940300           rockchip,iommu          /                                       k                   1aclk iface          C   ^   	                    hokay               d      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           /            @                            k      ~     d      	  1ref pclk            C   ^   	           5      	  hdisabled       ports                                port@0          /                                 endpoint@0          /            X   i           b      endpoint@1          /           X   j           g         port@1          /               lvds@ff96c000            rockchip,rk3288-lvds            /           @         k     g      
  1pclk_lvds           lcdc               k        C   ^   	           5      	  hdisabled       ports                                port@0          /                                 endpoint@0          /            X   l           c      endpoint@1          /           X   m           h         port@1          /               dp@ff970000          rockchip,rk3288-dp          /            @                 b           k      i     c        1dp pclk            n        dp          C   ^   	        3      o        \dp             5      	  hdisabled       ports                                port@0          /                                 endpoint@0          /            X   o           a      endpoint@1          /           X   p           f         port@1          /               hdmi@ff980000            rockchip,rk3288-dw-hdmi         /                     #                   g           k     h      m      n        1iahb isfr cec           C   ^   	           5                    hokay            h   q   ports                                port@0          /                                 endpoint@0          /            X   r           `      endpoint@1          /           X   s           e         port@1          /               video-codec@ff9a0000             rockchip,rk3288-vpu         /                             	          
         
  Lvepu vdpu           k                 
  1aclk hclk           Q   t        C   ^         iommu@ff9a0800           rockchip,iommu          /                                       k                   1aclk iface                      C   ^              t      iommu@ff9c0440           rockchip,iommu           /    @       @           @                o           k                   1aclk iface                    	  hdisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          /                   $                                         Ljob mmu gpu         k              :   u        N           C   ^           hokay            t   v           2      opp-table-1          operating-points-v2            u   opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon          /                         X      qos@ffaa0080             rockchip,rk3288-qos syscon          /                        Y      qos@ffad0000             rockchip,rk3288-qos syscon          /                         M      qos@ffad0100             rockchip,rk3288-qos syscon          /                        N      qos@ffad0180             rockchip,rk3288-qos syscon          /                       O      qos@ffad0400             rockchip,rk3288-qos syscon          /                        P      qos@ffad0480             rockchip,rk3288-qos syscon          /                       Q      qos@ffad0500             rockchip,rk3288-qos syscon          /                        L      qos@ffad0800             rockchip,rk3288-qos syscon          /                        R      qos@ffad0880             rockchip,rk3288-qos syscon          /                       S      qos@ffad0900             rockchip,rk3288-qos syscon          /    	                    T      qos@ffae0000             rockchip,rk3288-qos syscon          /                         W      qos@ffaf0000             rockchip,rk3288-qos syscon          /                         U      qos@ffaf0080             rockchip,rk3288-qos syscon          /                        V      dma-controller@ffb20000          arm,pl330 arm,primecell         /            @                                       0            ;         V        k            	  1apb_pclk               [      efuse@ffb40000           rockchip,rk3288-efuse           /                                               k     q        1pclk_efuse     cpu-id@7            /            cpu_leakage@17          /               interrupt-controller@ffc01000            arm,gic-400                                         @  /                              @             `                        	                   pinctrl          rockchip,rk3288-pinctrl            5                                                gpio@ff750000            rockchip,gpio-bank          /    u                         Q           k     @                                                   C      gpio@ff780000            rockchip,gpio-bank          /    x                         R           k     A                                              gpio@ff790000            rockchip,gpio-bank          /    y                         S           k     B                                              gpio@ff7a0000            rockchip,gpio-bank          /    z                         T           k     C                                              gpio@ff7b0000            rockchip,gpio-bank          /    {                         U           k     D                                                   <      gpio@ff7c0000            rockchip,gpio-bank          /    |                         V           k     E                                              gpio@ff7d0000            rockchip,gpio-bank          /    }                         W           k     F                                              gpio@ff7e0000            rockchip,gpio-bank          /    ~                         X           k     G                                                   ~      gpio@ff7f0000            rockchip,gpio-bank          /                             Y           k     H                                                         hdmi       hdmi-cec-c0                     w      hdmi-cec-c7                     w      hdmi-ddc                         w            w      hdmi-ddc-unwedge                          x            w      vcc50-hdmi-en                        w                    pcfg-output-low                     x      pcfg-pull-up                        y      pcfg-pull-down                      z      pcfg-pull-none                      w      pcfg-pull-none-12ma                  	              {      suspend    global-pwroff                         w           E      ddrio-pwroff                         w      ddr0-retention                       y      ddr1-retention                       y         edp    edp-hpd                     z         i2c0       i2c0-xfer                         w             w           B         i2c1       i2c1-xfer                        w            w           %         i2c2       i2c2-xfer                  	      w      
      w           G         i2c3       i2c3-xfer                        w            w           &         i2c4       i2c4-xfer                        w            w           '         i2c5       i2c5-xfer                        w            w           (         i2s0       i2s0-bus          `               w            w            w            w            w            w           ]         lcdc       lcdc-ctl          @              w            w            w            w           k         sdmmc      sdmmc-clk                       w                 sdmmc-cmd                       y                 sdmmc-cd                        y                 sdmmc-bus1                      y      sdmmc-bus4        @              y            y            y            y                    sdio0      sdio0-bus1                      y      sdio0-bus4        @              y            y            y            y      sdio0-cmd                       y      sdio0-clk                       w      sdio0-cd                        y      sdio0-wp                        y      sdio0-pwr                       y      sdio0-bkpwr                     y      sdio0-int                       y         sdio1      sdio1-bus1                      y      sdio1-bus4        @              y            y            y            y      sdio1-cd                        y      sdio1-wp                        y      sdio1-bkpwr                     y      sdio1-int                       y      sdio1-cmd                       y      sdio1-clk                       w      sdio1-pwr                 	      y         emmc       emmc-clk                        w                 emmc-cmd                        y                 emmc-pwr                  	      y                 emmc-bus1                        y      emmc-bus4         @               y            y            y            y      emmc-bus8                        y            y            y            y            y            y            y            y                    spi0       spi0-clk                        y                 spi0-cs0                        y                 spi0-tx                     y                 spi0-rx                     y                 spi0-cs1                        y         spi1       spi1-clk                        y                 spi1-cs0                        y                  spi1-rx                     y                 spi1-tx                     y                    spi2       spi2-cs1                        y      spi2-clk                        y           !      spi2-cs0                        y           $      spi2-rx                     y           #      spi2-tx               	      y           "         uart0      uart0-xfer                       y            w           )      uart0-cts                       y      uart0-rts                       w         uart1      uart1-xfer                       y      	      w           *      uart1-cts                 
      y      uart1-rts                       w         uart2      uart2-xfer                       y            w           +         uart3      uart3-xfer                       y            w           ,      uart3-cts                 	      y      uart3-rts                 
      w         uart4      uart4-xfer                       y            w           -      uart4-cts                       y      uart4-rts                       w         tsadc      otp-pin                
       w           3      otp-out                
      w           4         pwm0       pwm0-pin                         w           H         pwm1       pwm1-pin                        w           I         pwm2       pwm2-pin                        w           J         pwm3       pwm3-pin                        w           K         gmac       rgmii-pins                      w            w            w            w            {            {            {            {             w            w            w      	      {            {            w            w           7      rmii-pins                       w            w            w            w             w            w            w            w            w            w      phy-int                	       y           :      phy-pmeb                          y           9      phy-rst                      |           8         spdif      spdif-tx                        w           \         pcfg-output-high             	           |      pmic       pmic-int                          y           D         usb_host       phy-pwr-en                	       |           ?      usb2-pwr-en               	       w                    usb_otg    otg-vbus-drv                          w                       chosen          	/serial@ff690000          memory          /                       #memory        dc12-vbat            regulator-fixed       
  dc12_vbat                      8           P         d           }      vboot-3v3            regulator-fixed       
  vboot_3v3             2Z        8 2Z         P         d        	+   }      vsys-regulator           regulator-fixed         vcc_sys           8u         8 8u          P         d        	+   }           F      vboot-5v             regulator-fixed       	  vboot_sv              LK@        8 LK@         P         d        	+   }      v3g-3v3          regulator-fixed         v3g_3v3           2Z        8 2Z         P         d        	+   }      vsus-5v          regulator-fixed         vsus_5v           LK@        8 LK@         P         d        	+                    vcc50-hdmi           regulator-fixed         vcc50_hdmi           	6           ~               default                     P         d        	+         vusb1-5v             regulator-fixed       	  vusb1_5v             	6           C               default                      LK@        8 LK@        	+              A      vusb2-5v             regulator-fixed       	  vusb2_5v             	6              	            default                      LK@        8 LK@         P         d        	+         external-gmac-clock          fixed-clock                     sY@      	  ext_gmac               6         	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay disable-wp pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply non-removable #io-channel-cells dmas dma-names reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-supply phy-mode snps,reset-active-low snps,reset-delays-us snps,reset-gpio tx_delay rx_delay phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size vbus-supply rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells audio-supply bb-supply dvp-supply flash0-supply flash1-supply gpio30-supply gpio1830-supply lcdc-supply sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path vin-supply enable-active-high 