Ðþí  M@   8  FÀ   (            €  Fˆ                                                          elgin,rv1108-r1 rockchip,rv1108          &            7Elgin RV1108 R1 board      aliases          =/i2c@20000000            B/i2c@10240000            G/i2c@10250000            L/i2c@10260000            Q/serial@10230000             Y/serial@10220000             a/serial@10210000             i/mmc@30110000         cpus                                 cpu@f00          ncpu          arm,cortex-a7            z            ~  œ@         Œ               “            ¢   K         ¼            Ð            Û            opp-table-0          operating-points-v2          Û      opp-408000000            ã    Q–          ê à˜         ø  œ@      opp-600000000            ã    #ÃF          ê à˜         ø  œ@      opp-816000000            ã    0£,          ê £è         ø  œ@      opp-1008000000           ã    <Ü          ê Œ0         ø  œ@         arm-pmu          arm,cortex-a7-pmu           	       L         timer            arm,armv7-timer         	                                 8n6       oscillator           fixed-clock         8n6         Hxin24m          [             Û         sram@10080000         
   mmio-sram            z                                       h                serial@10210000       &   rockchip,rv1108-uart snps,dw-apb-uart            z!             	       .           o           y           8n6          Œ      J             †baudclk apb_pclk            ’                    —default         ¥           ¯okay          serial@10220000       &   rockchip,rv1108-uart snps,dw-apb-uart            z"             	       -           o           y           8n6          Œ      I     
        †baudclk apb_pclk            ’                    —default         ¥         	  ¯disabled          serial@10230000       &   rockchip,rv1108-uart snps,dw-apb-uart            z#             	       ,           o           y           8n6          Œ      H     	        †baudclk apb_pclk            ’                    —default         ¥           ¯okay          i2c@10240000             rockchip,rv1108-i2c          z$             	                                             Œ      v           	  †i2c pclk            —default         ¥   	        ¶   
      	  ¯disabled          i2c@10250000             rockchip,rv1108-i2c          z%             	                                              Œ      w           	  †i2c pclk            —default         ¥           ¶   
      	  ¯disabled          i2c@10260000             rockchip,rv1108-i2c          z&             	       !                                      Œ      x           	  †i2c pclk            —default         ¥           ¶   
      	  ¯disabled          spi@10270000             rockchip,rv1108-spi          z'             	       %            Œ      l             †spiclk apb_pclk         ’            	        Ãtx rx                                     ¯okay            —default         ¥               display@0            elgin,jg10309-01             z            Ín6          ß         è         pwm@10280000          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z(              Œ      y           	  †pwm pclk            —default         ¥           ñ         	  ¯disabled          pwm@10280010          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z(             Œ      y           	  †pwm pclk            —default         ¥           ñ         	  ¯disabled          pwm@10280020          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z(              Œ      y           	  †pwm pclk            —default         ¥           ñ         	  ¯disabled          pwm@10280030          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z( 0            Œ      y           	  †pwm pclk            —default         ¥           ñ         	  ¯disabled          dma-controller@102a0000          arm,pl330 arm,primecell          z*    @         	                   ü                     "         Œ      À      	  †apb_pclk             Û         syscon@10300000       &   rockchip,rv1108-grf syscon simple-mfd            z0                                       Û   
   io-domains        "   rockchip,rv1108-io-voltage-domain         	  ¯disabled          usb2phy@100          rockchip,rv1108-usb2phy          z               Œ      {        †phyclk          [            Husbphy          9           ¯okay             Û   +   otg-port            	       0           Iotg-mux         Y            ¯okay             Û   -      host-port           	       3         
  Ilinestate           Y            ¯okay             Û   ,            timer@10350000        ,   rockchip,rv1108-timer rockchip,rk3288-timer          z5              	       #            Œ                †pclk timer        watchdog@10360000             rockchip,rv1108-wdt snps,dw-wdt          z6             	       "            Œ           	  ¯disabled          thermal-zones      soc-thermal         d           z  è        ˆ   2        š          trips      trip-point0         ª p        ¶  Ð         upassive       trip-point1         ª L        ¶  Ð         upassive          Û         soc-crit            ª s        ¶  Ð      	   ucritical             cooling-maps       map0            Á           Æ   ÿÿÿÿÿÿÿÿ        Õ                  tsadc@10370000           rockchip,rv1108-tsadc            z7             	       /           â      n        ò q°         Œ      n             †tsadc apb_pclk          —init default sleep          ¥                                       H      
  "tsadc-apb           . ÔÀ        E         	  ¯disabled             Û         adc@1038c000          .   rockchip,rv1108-saradc rockchip,rk3399-saradc            z8À            	                  [            Œ      m             †saradc apb_pclk       	  ¯disabled          i2c@20000000             rockchip,rv1108-i2c          z               	                                             Œ      [           	  †i2c pclk            —default         ¥           ¶   
        ¯okay            8 €        m          „      pmic@18          rockchip,rk805           z            &           	               œ        [            ½           É           Õ           á           í           ù      regulators     DCDC_REG1         	  vdd_core             
®`        , ã`         D         X         Û      regulator-state-mem          j        ‚ »          DCDC_REG2         
  vdd_buck2            !‘À        , !‘À         D         X         Û      regulator-state-mem          ž         DCDC_REG3           vcc_ddr          D         X   regulator-state-mem          j         DCDC_REG4           vcc_io           2Z         , 2Z          D         X   regulator-state-mem          j        ‚ 2Z          LDO_REG1            vdd_10           B@        , B@         D         X   regulator-state-mem          ž         LDO_REG2            vcc_18           w@        , w@         D         X   regulator-state-mem          ž         LDO_REG3          
  vdd10_pmu            B@        , B@         D         X   regulator-state-mem          j        ‚ B@                  pwm@20040000          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z               Œ      Z           	  †pwm pclk            —default         ¥            ñ         	  ¯disabled          pwm@20040010          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z              Œ      Z           	  †pwm pclk            —default         ¥   !        ñ         	  ¯disabled          pwm@20040020          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z               Œ      Z           	  †pwm pclk            —default         ¥   "        ñ         	  ¯disabled          pwm@20040030          (   rockchip,rv1108-pwm rockchip,rk3288-pwm          z  0            Œ      Z           	  †pwm pclk            —default         ¥   #        ñ         	  ¯disabled          syscon@20060000       )   rockchip,rv1108-pmugrf syscon simple-mfd             z               Û   3   io-domains        &   rockchip,rv1108-pmu-io-voltage-domain         	  ¯disabled             syscon@202a0000          rockchip,rv1108-usbgrf syscon            z *              Û         clock-controller@20200000            rockchip,rv1108-cru          z                Œ           †xin24m          ¶   
        [           ·            Û         nand-controller@30100000             rockchip,rv1108-nfc          z0             	                   Œ     C      C        †ahb nfc         â      C        òðÑ€      	  ¯disabled          mmc@30110000          0   rockchip,rv1108-dw-mshc rockchip,rk3288-dw-mshc          z0    @         	                    Œ     F      G      S      V        †biu ciu ciu-drive ciu-sample            Ä           ÑðÑ€        ¯okay            Ï            Ù         ë         ñ         ù                          —default         ¥   $   %   &      mmc@30120000          0   rockchip,rv1108-dw-mshc rockchip,rk3288-dw-mshc          z0    @         	                    Œ     E      E      R      U        †biu ciu ciu-drive ciu-sample            Ä           ÑðÑ€      	  ¯disabled          mmc@30130000          0   rockchip,rv1108-dw-mshc rockchip,rk3288-dw-mshc          z0    @         	                    Œ     D      D      Q      T        †biu ciu ciu-drive ciu-sample            Ä           Ñõá         —default         ¥   '   (   )   *      	  ¯disabled          usb@30140000             generic-ehci             z0             	                   Œ     S   +        #   ,        (usb         ¯okay          usb@30160000             generic-ohci             z0             	                   Œ     S   +        #   ,        (usb         ¯okay          usb@30180000          2   rockchip,rv1108-usb rockchip,rk3066-usb snps,dwc2            z0             	                   Œ     T        †otg         2otg         :           L          [      €   €   @               #   -      	  (usb2-phy            ¯okay          spi@301c0000             rockchip,sfc             z0    @         	       8            Œ      P     H        †clk_sfc hclk_sfc            ¥   .   /   0        —default       	  ¯disabled          ethernet@30200000            rockchip,rv1108-gmac             z0              	                            Imacirq eth_wake_irq       8   Œ      p      q      q      r      s      Ò           M  †stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            jrmii            —default         ¥   1        ¶   
        ¯okay            soutput          €   2                     interrupt-controller@32010000            arm,gic-400          ¦        »                           z2    2      2@     2`             	      	           Û         pinctrl          rockchip,rv1108-pinctrl         ¶   
        Ì   3                                  h   gpio@20030000            rockchip,gpio-bank           z              	       (            Œ              Ù        é            ¦        »            Û         gpio@10310000            rockchip,gpio-bank           z1             	       )            Œ               Ù        é            ¦        »            Û   2      gpio@10320000            rockchip,gpio-bank           z2             	       *            Œ              Ù        é            ¦        »         gpio@10330000            rockchip,gpio-bank           z3             	       +            Œ              Ù        é            ¦        »         pcfg-pull-up             õ         Û   9      pcfg-pull-down                 pcfg-pull-none                    Û   6      pcfg-pull-none-drv-8ma                      Û   5      pcfg-pull-none-drv-12ma                     Û   7      pcfg-pull-none-smt                    -         Û   8      pcfg-pull-up-drv-8ma             õ                    Û   4      pcfg-pull-none-drv-4ma                      Û   :      pcfg-pull-up-drv-4ma             õ                    Û   ;      pcfg-output-high             B      pcfg-output-low          N      pcfg-input-high          õ         Y      emmc       emmc-bus8         €  f             4            4            4            4            4            4            4            4         Û   &      emmc-clk            f            5         Û   $      emmc-cmd            f            4         Û   %         sfc    sfc-bus4          @  f             6            6            6            6         Û   0      sfc-bus2             f             6            6      sfc-cs0         f            6         Û   /      sfc-clk         f            6         Û   .         gmac       rmii-pins            f            6            6            6      
      7            7            7            6            6            6            6         Û   1         i2c0       i2c0-xfer            f       	      8       
      8         Û            i2c1       i2c1-xfer            f            9            9         Û   	         i2c2m1     i2c2m1-xfer          f             6             6         Û         i2c2m1-pins          f              6              6         i2c2m05v       i2c2m05v-xfer            f            6            6      i2c2m05v-pins            f             6             6         i2c3       i2c3-xfer            f             6             6         Û            pwm0       pwm0-pin            f             6         Û             pwm1       pwm1-pin            f             6         Û   !         pwm2       pwm2-pin            f             6         Û   "         pwm3       pwm3-pin            f             6         Û   #         pwm4       pwm4-pin            f            6         Û            pwm5       pwm5-pin            f            6         Û            pwm6       pwm6-pin            f            6         Û            pwm7       pwm7-pin            f      	      6         Û            sdmmc      sdmmc-clk           f            :         Û   '      sdmmc-cmd           f            ;         Û   (      sdmmc-cd            f             ;         Û   )      sdmmc-bus1          f            ;      sdmmc-bus4        @  f            ;            ;            ;            ;         Û   *         spim0      spim0-clk           f            9      spim0-cs0           f            9      spim0-tx            f            9      spim0-rx            f            9         spim1      spim1-clk           f             9         Û         spim1-cs0           f             9         Û         spim1-rx            f             9         Û         spim1-tx            f             9         Û            tsadc      otp-out         f             6         Û         otp-pin         f              6         Û            uart0      uart0-xfer           f            9            6         Û         uart0-cts           f            6      uart0-rts           f            6      uart0-rts-pin           f             6         uart1      uart1-xfer           f            9            6         Û         uart1-cts           f            6      uart1-rts           f            6         uart2m0    uart2m0-xfer             f            9            6         Û            uart2m1    uart2m1-xfer             f            9            6         uart2_5v       uart2_5v-cts            f            6      uart2_5v-rts            f            6            memory@60000000          nmemory           z`            chosen          tserial2:1500000n8         vsys-regulator           regulator-fixed         vsys             LK@        , LK@         X         Û            	#address-cells #size-cells compatible interrupt-parent model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 mmc0 device_type reg clock-latency clocks #cooling-cells dynamic-power-coefficient operating-points-v2 cpu-supply phandle opp-hz opp-microvolt clock-latency-ns interrupts arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges reg-shift reg-io-width clock-names dmas pinctrl-names pinctrl-0 status rockchip,grf dma-names spi-max-frequency spi-cpha spi-cpol #pwm-cells #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst rockchip,usbgrf interrupt-names #phy-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-1 pinctrl-2 resets reset-names rockchip,hw-tshut-temp #thermal-sensor-cells #io-channel-cells i2c-scl-rising-time-ns i2c-scl-falling-time-ns rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend #reset-cells fifo-depth bus-width cap-mmc-highspeed no-sd no-sdio non-removable mmc-ddr-1_8v mmc-hs200-1_8v phys phy-names dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode clock_in_out snps,reset-gpio snps,reset-active-low interrupt-controller #interrupt-cells rockchip,pmu gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path 