  J   8  F   (              E                                                         Altera SOCFPGA Arria 10       =   !altr,socfpga-arria10-socdk altr,socfpga-arria10 altr,socfpga       cpus                                       ,altr,socfpga-a10-smp       cpu@0            !arm,cortex-a9            :cpu          F             J            [         cpu@1            !arm,cortex-a9            :cpu          F            J            [            pmu@ff111000             !arm,cortex-a9-pmu            c            t       |          }                           F    0          interrupt-controller@ffffd000            !arm,cortex-a9-gic                                  F                 [         soc                                   !simple-bus           :soc          c                amba             !simple-bus                                        pdma@ffda1000            !arm,pl330 arm,primecell          F          l   t       S          T          U          V          W          X          Y          Z          [                                 	   apb_pclk                   0      5         dma dma-ocp          [   "         base_fpga_region                                      !fpga-region                   clkmgr@ffd04000          !altr,clk-mgr             F@       clocks                               cb_intosc_hs_div2_clk                         !fixed-clock          [         cb_intosc_ls_clk                          !fixed-clock          [   	      f2s_free_clk                          !fixed-clock          [   
      osc1                          !fixed-clock         }x@         [         main_pll@40                                                 !altr,socfpga-a10-pll-clock                 	   
         F   @         [      main_mpu_base_clk                         !altr,socfpga-a10-perip-clk                        @                [         main_noc_base_clk                         !altr,socfpga-a10-perip-clk                        D                [         main_emaca_clk@68                         !altr,socfpga-a10-perip-clk                       F   h      main_emacb_clk@6c                         !altr,socfpga-a10-perip-clk                       F   l      main_emac_ptp_clk@70                          !altr,socfpga-a10-perip-clk                       F   p      main_gpio_db_clk@74                       !altr,socfpga-a10-perip-clk                       F   t      main_sdmmc_clk@78                         !altr,socfpga-a10-perip-clk                       F   x         [         main_s2f_usr0_clk@7c                          !altr,socfpga-a10-perip-clk                       F   |      main_s2f_usr1_clk@80                          !altr,socfpga-a10-perip-clk                       F            [         main_hmc_pll_ref_clk@84                       !altr,socfpga-a10-perip-clk                       F         main_periph_ref_clk@9c                        !altr,socfpga-a10-perip-clk                       F            [            periph_pll@c0                                                   !altr,socfpga-a10-pll-clock                 	   
            F            [      peri_mpu_base_clk                         !altr,socfpga-a10-perip-clk                        @               [         peri_noc_base_clk                         !altr,socfpga-a10-perip-clk                        D               [         peri_emaca_clk@e8                         !altr,socfpga-a10-perip-clk                       F         peri_emacb_clk@ec                         !altr,socfpga-a10-perip-clk                       F         peri_emac_ptp_clk@f0                          !altr,socfpga-a10-perip-clk                       F            [         peri_gpio_db_clk@f4                       !altr,socfpga-a10-perip-clk                       F         peri_sdmmc_clk@f8                         !altr,socfpga-a10-perip-clk                       F            [         peri_s2f_usr0_clk@fc                          !altr,socfpga-a10-perip-clk                       F         peri_s2f_usr1_clk@100                         !altr,socfpga-a10-perip-clk                       F            [         peri_hmc_pll_ref_clk@104                          !altr,socfpga-a10-perip-clk                       F           mpu_free_clk@60                       !altr,socfpga-a10-perip-clk                          
         F   `         [         noc_free_clk@64                       !altr,socfpga-a10-perip-clk                          
         F   d         [         s2f_user1_free_clk@104                        !altr,socfpga-a10-perip-clk                          
         F        sdmmc_free_clk@f8                         !altr,socfpga-a10-perip-clk                          
                    F            [         l4_sys_free_clk                       !altr,socfpga-a10-perip-clk                                  [   -      l4_main_clk                       !altr,socfpga-a10-gate-clk                                         ,   H            [         l4_mp_clk                         !altr,socfpga-a10-gate-clk                                        ,   H            [         l4_sp_clk                         !altr,socfpga-a10-gate-clk                                        ,   H            [         mpu_periph_clk                        !altr,socfpga-a10-gate-clk                                  ,   H             [   ,      sdmmc_clk                         !altr,socfpga-a10-gate-clk                       ,               [   $      qspi_clk                          !altr,socfpga-a10-gate-clk                       ,               [   +      nand_x_clk                        !altr,socfpga-a10-gate-clk                       ,      
         [         nand_ecc_clk                          !altr,socfpga-a10-gate-clk                       ,      
         [   &      nand_clk                          !altr,socfpga-a10-gate-clk                                  ,      
         [   %      spi_m_clk                         !altr,socfpga-a10-gate-clk                       ,      	         [   !      usb_clk                       !altr,socfpga-a10-gate-clk                       ,               [   .      s2f_usr1_clk                          !altr,socfpga-a10-gate-clk                       ,                  stmmac-axi-config           5           E           U                                    [         ethernet@ff800000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         _      D             F               t       \           rmacirq                                                             @                         stmmaceth ptp_ref                         (         stmmaceth stmmaceth-ocp                    okay            rgmii                   
                        $            1            >          K          X          e          r              D                                       [   (      ethernet@ff802000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         _      H            F               t       ]           rmacirq                                                             @                         stmmaceth ptp_ref                  !      )         stmmaceth stmmaceth-ocp                  	  disabled          ethernet@ff804000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         _      L            F@              t       ^           rmacirq                                                             @                         stmmaceth ptp_ref                  "      *         stmmaceth stmmaceth-ocp                  	  disabled          gpio@ffc02900                                      !snps,dw-apb-gpio             F)                   X      	  disabled       gpio-controller@0            !snps,dw-apb-gpio-port                                           F                                   t       p            gpio@ffc02a00                                      !snps,dw-apb-gpio             F*                   Y        okay       gpio-controller@0            !snps,dw-apb-gpio-port                                           F                                   t       q            [   #         gpio@ffc02b00                                      !snps,dw-apb-gpio             F+                   Z      	  disabled       gpio-controller@0            !snps,dw-apb-gpio-port                                           F                                   t       r            fpga-mgr@ffd03000            !altr,socfpga-a10-fpga-mgr            F0                                             fpgamgr          [         i2c@ffc02200                                       !snps,designware-i2c          F"             t       i                              H      	  disabled          i2c@ffc02300                                       !snps,designware-i2c          F#             t       j                              I        okay                       p          p   adc@14           !lltc,ltc2497             F                     adc@16           !lltc,ltc2497             F                     eeprom@51            !atmel,24c32          F   Q                  rtc@68           !dallas,ds1339            F   h      ltc@5c           !ltc2977          F   \      temp@4c          !maxim,max1619            F   L         i2c@ffc02400                                       !snps,designware-i2c          F$             t       k                              J      	  disabled          i2c@ffc02500                                       !snps,designware-i2c          F%             t       l                              K      	  disabled          i2c@ffc02600                                       !snps,designware-i2c          F&             t       m                              L      	  disabled          spi@ffda4000             !snps,dw-apb-ssi                                    F@             t       e           "               !               1         spi       	  disabled          spi@ffda5000             !snps,dw-apb-ssi                                    FP             t       f           "           )   "           8   "               !               2         spi         okay       resource-manager@0           !altr,a10sr           F            G          c   #         t                               gpio-controller          !altr,a10sr-gpio                              [   0      reset-controller             !altr,a10sr-reset            Y               sdr@ffcfb100             !altr,sdr-ctl syscon          Fϱ             [   '      cache-controller@fffff000            !arm,pl310-cache          F             t                   f        t                                           [         mmc@ff808000                                       !altr,socfpga-dw-mshc             F             t       b                             $         biu ciu                '        _      (         	  disabled             [   )      nand-controller@ffb90000                                       !altr,socfpga-denali-nand             F                  nand_data denali_reg             t       c               %      &         nand nand_x ecc                %        okay       nand@0           F                                partition@0         Boot and fpga data           F    P        partition@1c00000           Root Filesystem - JFFS2          FP  P              sram@ffe00000         
   !mmio-sram            F           eccmgr           !altr,socfpga-a10-ecc-manager            _                                     t                                                        sdramedac            !altr,sdram-edac-a10            '         t         1         l2-ecc@ffd06010          !altr,socfpga-a10-l2-ecc          F`            t                    ocram-ecc@ff8c3000           !altr,socfpga-a10-ocram-ecc           F0             t         !         emac0-rx-ecc@ff8c0800            !altr,socfpga-eth-mac-ecc             F               (         t         $         emac0-tx-ecc@ff8c0c00            !altr,socfpga-eth-mac-ecc             F               (         t         %         sdmmca-ecc@ff8c2c00          !altr,socfpga-sdmmc-ecc           F,               )          t         /            0         dma-ecc@ff8c8000             !altr,socfpga-dma-ecc             F               "         t   
      *         usb0-ecc@ff8c8800            !altr,socfpga-usb-ecc             F               *         t         "            spi@ff809000          !   !intel,socfpga-qspi cdns,qspi-nor                                       F                  t       d                                                 +               &      .         qspi qspi-ocp         	  disabled          rstmgr@ffd05000         Y            !altr,rst-mgr             FP                         [         snoop-control-unit@ffffc000          !arm,cortex-a9-scu            F          sysmgr@ffd06000          !altr,sys-mgr syscon          F`            )b0         [         timer@ffffc600           !arm,cortex-a9-twd-timer          F             t                    ,      timer0@ffc02700          !snps,dw-apb-timer            t       s            F'                         timer                  D         timer         timer1@ffc02800          !snps,dw-apb-timer            t       t            F(                         timer                  E         timer         timer2@ffd00000          !snps,dw-apb-timer            t       u            F                 -         timer                  B         timer         timer3@ffd00100          !snps,dw-apb-timer            t       v            F                -         timer                  C         timer         serial@ffc02000          !snps,dw-apb-uart             F              t       n           9           C                              P      	  disabled          serial@ffc02100          !snps,dw-apb-uart             F!             t       o           9           C                              Q        okay          usbphy          P             !usb-nop-xceiv           okay             [   /      usb@ffb00000          
   !snps,dwc2            F             t       _               .         otg                #         dwc2            [   /      	  `usb2-phy            okay             j         [   *      usb@ffb40000          
   !snps,dwc2            F             t       `               .         otg                $         dwc2            [   /      	  `usb2-phy          	  disabled          watchdog@ffd00200            !snps,dw-wdt          F             t       w               -               @      	  disabled          watchdog@ffd00300            !snps,dw-wdt          F             t       x               -               A        okay             aliases         /soc/ethernet@ff800000          /soc/serial@ffc02100          chosen          earlyprintk         serial0:115200n8          memory@0             :memory           F    @         a10leds       
   !gpio-leds      a10sr_led0          a10sr-led0             0             a10sr_led1          a10sr-led1             0            a10sr_led2          a10sr-led2             0            a10sr_led3          a10sr-led3             0               033-v-ref            !regulator-fixed         0.33V            	         	         [             	#address-cells #size-cells model compatible enable-method device_type reg next-level-cache phandle interrupt-parent interrupts interrupt-affinity #interrupt-cells interrupt-controller ranges #dma-cells clocks clock-names resets reset-names fpga-mgr #clock-cells clock-frequency div-reg fixed-divider clk-gate snps,wr_osr_lmt snps,rd_osr_lmt snps,blen altr,sysmgr-syscon interrupt-names mac-address snps,multicast-filter-bins snps,perfect-filter-entries tx-fifo-depth rx-fifo-depth snps,axi-config status phy-mode phy-addr txd0-skew-ps txd1-skew-ps txd2-skew-ps txd3-skew-ps rxd0-skew-ps rxd1-skew-ps rxd2-skew-ps rxd3-skew-ps txen-skew-ps txc-skew-ps rxdv-skew-ps rxc-skew-ps max-frame-size gpio-controller #gpio-cells snps,nr-gpios i2c-sda-falling-time-ns i2c-scl-falling-time-ns vref-supply pagesize num-cs tx-dma-channel rx-dma-channel spi-max-frequency #reset-cells cache-unified cache-level prefetch-data prefetch-instr arm,shared-override reg-names label altr,sdr-syscon altr,ecc-parent cdns,fifo-depth cdns,fifo-width cdns,trigger-address altr,modrst-offset cpu1-start-addr reg-shift reg-io-width #phy-cells phys phy-names disable-over-current ethernet0 serial0 bootargs stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt 