  d   8  `<   (              `                                                                      ,Merrii A20 Hummingbird        +   2merrii,a20-hummingbird allwinner,sun7i-a20     aliases          =/soc/ethernet@1c50000            G/soc/serial@1c28000          O/soc/serial@1c28800          W/soc/serial@1c28c00          _/soc/serial@1c29000          g/soc/serial@1c29400       chosen                                     o         vserial0:115200n8       framebuffer-lcd0-hdmi         0   2allwinner,simple-framebuffer simple-framebuffer          de_be0-lcd0-hdmi          8         8      <      >                              	   disabled          framebuffer-lcd0          0   2allwinner,simple-framebuffer simple-framebuffer          de_be0-lcd0       (         8      >                        	   disabled          framebuffer-lcd0-tve0         0   2allwinner,simple-framebuffer simple-framebuffer          de_be0-lcd0-tve0          8         6      8      >                              	   disabled             cpus                                 cpu@0            2arm,cortex-a7            cpu                                             8      \  \ /    
 O    B@ 2 B@                              cpu@1            2arm,cortex-a7            cpu                                            8      \  \ /    
 O    B@ 2 B@                                 thermal-zones      cpu-thermal                                      cooling-maps       map0                       "               trips      cpu-alert0          1 $        =           passive                   cpu-crit            1         =        	   critical                   reserved-memory                                    o   default-pool             2shared-dma-pool         H           M@               Z         c         timer            2arm,armv7-timer       0  u                              
        pmu          2arm,cortex-a7-pmu           u       x          y         clocks                                     o   clk-24M                      2fixed-clock         n6         osc24M              #      clk-32k                      2fixed-clock                    osc32k              $      clk-mii-phy-tx                       2fixed-clock         }x@        mii_phy_tx                    clk-gmac-int-tx                      2fixed-clock         sY@        gmac_int_tx                   clk@1c20164                      2allwinner,sun7i-a20-gmac-clk             d                          gmac_tx             3         display-engine        #   2allwinner,sun7i-a20-display-engine             	   
      	   disabled          soc          2simple-bus                                     o   system-control@1c00000        F   2allwinner,sun7i-a20-system-control allwinner,sun4i-a10-system-control                 0                                   o   sram@0        
   2mmio-sram                                                     o              sram-section@8000         >   2allwinner,sun7i-a20-sram-a3-a4 allwinner,sun4i-a10-sram-a3-a4                 @       	   disabled                         sram@10000        
   2mmio-sram                                                    o             sram-section@0        6   2allwinner,sun7i-a20-sram-d allwinner,sun4i-a10-sram-d                         	   disabled                         sram@1d00000          
   2mmio-sram                                                   o            sram-section@0        8   2allwinner,sun7i-a20-sram-c1 allwinner,sun4i-a10-sram-c1                                         interrupt-controller@1c00030             2allwinner,sun7i-a20-sc-nmi                                0           u                       /      dma-controller@1c02000           2allwinner,sun4i-a10-dma                       u                                                       nand-controller@1c03000          2allwinner,sun4i-a10-nand             0            u       %                  '      `        ahb mod                          rxtx          	   disabled                                    spi@1c05000          2allwinner,sun4i-a10-spi          P            u       
                  ,      p        ahb mod                                   rx tx         	   disabled                                               spi@1c06000          2allwinner,sun4i-a10-spi          `            u                         -      q        ahb mod                  	                 rx tx         	   disabled                                               csi@1c09000          2allwinner,sun7i-a20-csi0                         u       *                  :                    bus isp ram                     	   disabled          ethernet@1c0b000             2allwinner,sun4i-a10-emac                         u       7                  *                    	   disabled          mdio@1c0b080             2allwinner,sun4i-a10-mdio                      	   disabled                                    lcd-controller@1c0c000        3   2allwinner,sun7i-a20-tcon0 allwinner,sun7i-a20-tcon                       u       ,                             	  -lcd lvds                   8                    ahb tcon-ch0 tcon-ch1           tcon0-pixel-clock                                   ports                                port@0                                            endpoint@0                       9               A      endpoint@1                      9               =         port@1                                           endpoint@1                      9           I                              lcd-controller@1c0d000        3   2allwinner,sun7i-a20-tcon1 allwinner,sun7i-a20-tcon                       u       -                         -lcd                9                    ahb tcon-ch0 tcon-ch1           tcon1-pixel-clock                                   ports                                port@0                                            endpoint@0                       9               B      endpoint@1                      9               >         port@1                                           endpoint@1                      9           I                              video-codec@1c0e000       !   2allwinner,sun7i-a20-video-engine                                4                    ahb mod ram                       u       5                       mmc@1c0f000          2allwinner,sun7i-a20-mmc                              "      b      c      d        ahb mmc output sample           u                   `default         n            okay                                      x                                        mmc@1c10000          2allwinner,sun7i-a20-mmc                               #      e      f      g        ahb mmc output sample           u       !         	   disabled                                    mmc@1c11000          2allwinner,sun7i-a20-mmc                              $      h      i      j        ahb mmc output sample           u       "           `default         n         	   disabled                                    mmc@1c12000          2allwinner,sun7i-a20-mmc                               %      k      l      m        ahb mmc output sample           u       #           `default         n            okay                                      x                             usb@1c13000          2allwinner,sun4i-a10-musb             0                           u       &           mc                         usb                                      otg       	   disabled          phy@1c13400                     2allwinner,sun7i-a20-usb-phy          4    H                phy_ctrl pmu1 pmu2                 }        usb_phy                                 !  -usb0_reset usb1_reset usb2_reset             okay                                            usb@1c14000       &   2allwinner,sun7i-a20-ehci generic-ehci            @            u       '                                        usb          okay          usb@1c14400       &   2allwinner,sun7i-a20-ohci generic-ohci            D            u       @                  {                            usb          okay          crypto-engine@1c15000         6   2allwinner,sun7i-a20-crypto allwinner,sun4i-a10-crypto            P            u       V                        o        ahb mod       hdmi@1c16000          3   2allwinner,sun7i-a20-hdmi allwinner,sun5i-a10s-hdmi           `            u       :                   <            	              ahb mod pll-0 pll-1       $                                       ddc-tx ddc-rx audio-tx        	   disabled       ports                                port@0                                            endpoint@0                       9                     endpoint@1                      9                        port@1                          spi@1c17000          2allwinner,sun4i-a10-spi          p            u                         .      r        ahb mod                                   rx tx            okay                                                 `default         n       !      sata@1c18000             2allwinner,sun4i-a10-ahci                         u       8                  1      z         okay            
   "      usb@1c1c000       &   2allwinner,sun7i-a20-ehci generic-ehci                        u       (                                        usb          okay          usb@1c1c400       &   2allwinner,sun7i-a20-ohci generic-ohci                        u       A                  |                            usb          okay          csi@1c1d000       2   2allwinner,sun7i-a20-csi1 allwinner,sun4i-a10-csi1                        u       +                  ;              bus ram                     	   disabled          spi@1c1f000          2allwinner,sun4i-a10-spi                      u       2                  /              ahb mod                                   rx tx         	   disabled                                               clock@1c20000            2allwinner,sun7i-a20-ccu                           #   $      
  hosc losc                                           pinctrl@1c20800          2allwinner,sun7i-a20-pinctrl                      u                         J   #   $        apb hosc losc            %                            5                  gmac-rgmii-pins       B  APA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA10 PA11 PA12 PA13 PA15 PA16           Fgmac            O   (            4      i2c0-pins           APB0 PB1         Fi2c0                .      i2c1-pins         
  APB18 PB19           Fi2c1                0      i2c2-pins         
  APB20 PB21           Fi2c2                1      i2c3-pins           API0 PI1         Fi2c3                2      ir0-rx-pin          APB4         Fir0             &      mmc0-pins           APF0 PF1 PF2 PF3 PF4 PF5         Fmmc0            O            ^                  mmc2-pins           APC6 PC7 PC8 PC9 PC10 PC11           Fmmc2            O            ^                  mmc3-pins           API4 PI5 PI6 PI7 PI8 PI9         Fmmc3            O            ^                  pwm0-pin            APB2         Fpwm             %      spi2-pb-pins            APB15 PB16 PB17          Fspi2                       spi2-cs0-pb-pin         APB14            Fspi2                !      uart0-pb-pins         
  APB22 PB23           Fuart0               '      uart2-pi-pins         
  API18 PI19           Fuart2               (      uart2-cts-rts-pi-pins         
  API16 PI17           Fuart2               )      uart3-pg-pins           APG6 PG7         Fuart3               *      uart3-cts-rts-pg-pins           APG8 PG9         Fuart3               +      uart4-pg-pins         
  APG10 PG11           Fuart4               ,      uart5-pi-pins         
  API10 PI11           Fuart5               -         timer@1c20c00            2allwinner,sun4i-a10-timer                      H  u                                               C          D               #      watchdog@1c20c90             2allwinner,sun4i-a10-wdt                     u                      #      rtc@1c20d00          2allwinner,sun7i-a20-rtc                       u                pwm@1c20e00          2allwinner,sun7i-a20-pwm                          #        k            okay            `default         n   %      spdif@1c21000           v             2allwinner,sun4i-a10-spdif                        u                         F      x      
  apb spdif                                       rx tx         	   disabled          ir@1c21800           2allwinner,sun4i-a10-ir                 K      t        apb ir          u                       @         okay            `default         n   &      ir@1c21c00           2allwinner,sun4i-a10-ir                 L      u        apb ir          u                       @      	   disabled          i2s@1c22000         v             2allwinner,sun4i-a10-i2s                       u       W                  I              apb mod                                     rx tx         	   disabled          i2s@1c22400         v             2allwinner,sun4i-a10-i2s          $            u                         G      v        apb mod                                     rx tx         	   disabled          lradc@1c22800            2allwinner,sun4i-a10-lradc-keys           (            u                	   disabled          codec@1c22c00           v             2allwinner,sun7i-a20-codec            ,    @        u                         E            
  apb codec                                       rx tx         	   disabled          eeprom@1c23800           2allwinner,sun7i-a20-sid          8          i2s@1c24400         v             2allwinner,sun4i-a10-i2s          D            u       Z                  M              apb mod                                     rx tx         	   disabled          rtp@1c25000          2allwinner,sun5i-a13-ts           P            u                                        serial@1c28000           2snps,dw-apb-uart                         u                                               X         okay            `default         n   '      serial@1c28400           2snps,dw-apb-uart                         u                                               Y      	   disabled          serial@1c28800           2snps,dw-apb-uart                         u                                               Z         okay            `default         n   (   )      serial@1c28c00           2snps,dw-apb-uart                         u                                               [         okay            `default         n   *   +      serial@1c29000           2snps,dw-apb-uart                         u                                               \         okay            `default         n   ,      serial@1c29400           2snps,dw-apb-uart                         u                                               ]         okay            `default         n   -      serial@1c29800           2snps,dw-apb-uart                         u                                               ^      	   disabled          serial@1c29c00           2snps,dw-apb-uart                         u                                               _      	   disabled          ps2@1c2a000          2allwinner,sun4i-a10-ps2                       u       >                  U      	   disabled          ps2@1c2a400          2allwinner,sun4i-a10-ps2          ¤            u       ?                  V      	   disabled          i2c@1c2ac00       0   2allwinner,sun7i-a20-i2c allwinner,sun4i-a10-i2c          ¬            u                         O        `default         n   .         okay                                 pmic@34          2x-powers,axp209             4             /        u                                    i2c@1c2b000       0   2allwinner,sun7i-a20-i2c allwinner,sun4i-a10-i2c          °            u                         P        `default         n   0         okay                                    i2c@1c2b400       0   2allwinner,sun7i-a20-i2c allwinner,sun4i-a10-i2c          ´            u       	                  Q        `default         n   1         okay                                    i2c@1c2b800       0   2allwinner,sun7i-a20-i2c allwinner,sun4i-a10-i2c          ¸            u       X                  R        `default         n   2         okay                                    can@1c2bc00       0   2allwinner,sun7i-a20-can allwinner,sun4i-a10-can          ¼            u                         S      	   disabled          i2c@1c2c000       0   2allwinner,sun7i-a20-i2c allwinner,sun4i-a10-i2c                      u       Y                  W      	   disabled                                    gpu@1c40000       &   2allwinner,sun7i-a20-mali arm,mali-400                       T  u       E          F          G          H          J          K          I         #  gp gpmmu pp0 ppmmu0 pp1 ppmmu1 pmu                 D            	  bus core                                        `       ethernet@1c50000             2allwinner,sun7i-a20-gmac                          u       U           macirq                 B   3        stmmaceth allwinner_gmac_tx                                       okay            `default         n   4        
   5        rgmii              6   mdio             2snps,dwmac-mdio                              ethernet-phy@1                      )                     5  '        E B@            5            hstimer@1c60000          2allwinner,sun7i-a20-hstimer                     0  u       Q          R          S          T                  3      interrupt-controller@1c81000             2arm,gic-400                     @     `                                 u      	                    display-frontend@1e00000          %   2allwinner,sun7i-a20-display-frontend                          u       /                  @                    ahb mod ram                           	   ports                                port@1                                           endpoint@0                       9   7            ?      endpoint@1                      9   8            ;               display-frontend@1e20000          %   2allwinner,sun7i-a20-display-frontend                          u       0                  A                    ahb mod ram                           
   ports                                port@1                                           endpoint@0                       9   9            @      endpoint@1                      9   :            <               display-backend@1e40000       $   2allwinner,sun7i-a20-display-backend                       u       0                  ?                    ahb mod ram                  ports                                port@0                                            endpoint@0                       9   ;            8      endpoint@1                      9   <            :         port@1                                           endpoint@0                       9   =                  endpoint@1                      9   >                           display-backend@1e60000       $   2allwinner,sun7i-a20-display-backend                       u       /                  >                    ahb mod ram                  ports                                port@0                                            endpoint@0                       9   ?            7      endpoint@1                      9   @            9         port@1                                           endpoint@0                       9   A                  endpoint@1                      9   B                              ahci-5v          2regulator-fixed         Wahci-5v         f LK@        ~ LK@                                                okay                "      usb0-vbus            2regulator-fixed       
  Wusb0-vbus           f LK@        ~ LK@                          	          	   disabled          usb1-vbus            2regulator-fixed       
  Wusb1-vbus           f LK@        ~ LK@                                                okay                      usb2-vbus            2regulator-fixed       
  Wusb2-vbus           f LK@        ~ LK@                                                okay                      vcc3v0           2regulator-fixed         Wvcc3v0          f -        ~ -                  vcc3v3           2regulator-fixed         Wvcc3v3          f 2Z        ~ 2Z      vcc5v0           2regulator-fixed         Wvcc5v0          f LK@        ~ LK@      regulator-mmc3-vdd           2regulator-fixed       	  Wmmc3_vdd            f -        ~ -                          	                      regulator-gmac-vdd           2regulator-fixed       	  Wgmac_vdd            f -        ~ -                                          6         	interrupt-parent #address-cells #size-cells model compatible ethernet0 serial0 serial1 serial2 serial3 serial4 ranges stdout-path allwinner,pipeline clocks status device_type reg clock-latency operating-points #cooling-cells phandle polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis size alloc-ranges reusable linux,cma-default interrupts #clock-cells clock-frequency clock-output-names allwinner,pipelines interrupt-controller #interrupt-cells #dma-cells clock-names dmas dma-names num-cs resets allwinner,sram reset-names remote-endpoint allwinner,tcon-channel pinctrl-names pinctrl-0 vmmc-supply bus-width cd-gpios non-removable interrupt-names phys phy-names extcon dr_mode #phy-cells reg-names usb1_vbus-supply usb2_vbus-supply target-supply #reset-cells gpio-controller #gpio-cells pins function drive-strength bias-pull-up #pwm-cells #sound-dai-cells #thermal-sensor-cells reg-shift reg-io-width assigned-clocks assigned-clock-rates snps,pbl snps,fixed-burst snps,force_sf_dma_mode phy-handle phy-mode phy-supply reset-gpios reset-assert-us reset-deassert-us regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on enable-active-high gpio 