  	   8  T   (                                                                                 4   ,samsung,smdk4412 samsung,exynos4412 samsung,exynos4       2   7Samsung SMDK evaluation board based on Exynos4412      aliases          =/soc/spi@13920000            B/soc/spi@13930000            G/soc/spi@13940000            L/soc/i2c@13860000            Q/soc/i2c@13870000            V/soc/i2c@13880000            [/soc/i2c@13890000            `/soc/i2c@138a0000            e/soc/i2c@138b0000            j/soc/i2c@138c0000            o/soc/i2c@138d0000            t/soc/i2c@138e0000            y/soc/camera/csis@11880000            /soc/camera/csis@11890000            /soc/camera/fimc@11800000            /soc/camera/fimc@11810000            /soc/camera/fimc@11820000            /soc/camera/fimc@11830000            /soc/serial@13800000             /soc/serial@13810000             /soc/serial@13820000             /soc/serial@13830000             /soc/pinctrl@11400000            /soc/pinctrl@11000000            /soc/pinctrl@3860000             /soc/pinctrl@106e0000            /soc/camera/fimc-lite@12390000           /soc/camera/fimc-lite@123a0000           /soc/mmc@12550000         pmu          ,arm,cortex-a9-pmu                         okay                                                               soc          ,simple-bus                                    "   clock-controller@3810000             ,samsung,exynos4210-audss-clock          )             -            :                              &  Apll_ref pll_in sclk_audio sclk_pcm_in           M         i2s@3830000          ,samsung,s5pv210-i2s         )             :                          Aiis i2s_opclk0 i2s_opclk1           -           Ui2s_cdclk0          h   	      	      	   
        mtx rx tx-sec            w                    	   disabled          chipid@10000000          ,samsung,exynos4210-chipid           )            snoop-control-unit@10500000          ,arm,cortex-a9-scu           )P            memory-controller@12570000           ,samsung,exynos4210-srom         )W           video-phy            ,samsung,s5pv210-mipi-video-phy                        
        M         power-domain@10023c40            ,samsung,exynos4210-pd           )<@                        MFC         M   &      power-domain@10023c60            ,samsung,exynos4210-pd           )<`                        G3D         M   #      power-domain@10023c80            ,samsung,exynos4210-pd           )<                        LCD0            M         power-domain@10023c20            ,samsung,exynos4210-pd           )<                                    TV          M   :      power-domain@10023c00            ,samsung,exynos4210-pd           )<                         CAM         M         power-domain@10023ce0            ,samsung,exynos4210-pd           )<                        GPS       power-domain@10023d00            ,samsung,exynos4210-pd           )=                       
  GPS alive         interrupt-controller@10490000            ,arm,cortex-a9-gic                               )I     H               @         M         interrupt-controller@10440000            ,samsung,exynos4210-combiner                             )D                                                                                                                          	          
                                                            k          l          0          *           M         syscon@10010000          ,samsung,exynos4-sysreg syscon           )             M         system-controller@10020000           ,samsung,exynos4412-pmu syscon           )    @                                        8  Aclkout0 clkout1 clkout2 clkout3 clkout4 clkout8 clkout9       8  :                                                  -           M   
   syscon-poweroff          ,syscon-poweroff            
          3           R       syscon-reboot            ,syscon-reboot              
                                dsi@11c80000             ,samsung,exynos4210-mipi-dsi         )                    O                      %              *dsim            :                   Abus_clk sclk_mipi         	   disabled                                    camera           ,samsung,fimc simple-bus       	   disabled                                     -           Ucam_a_clkout cam_b_clkout            "         :                 _     `      *  Asclk_cam0 sclk_cam1 pxl_async0 pxl_async1      fimc@11800000            ,samsung,exynos4212-fimc         )                    T           :                    Afimc sclk_fimc                     4           C         	   disabled            J                   ]         t               fimc@11810000            ,samsung,exynos4212-fimc         )                    U           :                   Afimc sclk_fimc                     4           C         	   disabled            J                   ]         t               fimc@11820000            ,samsung,exynos4212-fimc         )                    V           :                   Afimc sclk_fimc                     4           C         	   disabled            J                   ]         t                        fimc@11830000            ,samsung,exynos4212-fimc         )                    W           :                   Afimc sclk_fimc                     4           C         	   disabled            J        V                       ]         t               csis@11880000            ,samsung,exynos4210-csis         )    @                N           :                   Acsis sclk_csis                                %               *csis          	   disabled                                    csis@11890000            ,samsung,exynos4210-csis         )    @                P           :                   Acsis sclk_csis                                %              *csis          	   disabled                                    fimc-lite@12390000           ,samsung,exynos4212-fimc-lite            )9                    i                      :              Aflite           C         	   disabled          fimc-lite@123a0000           ,samsung,exynos4212-fimc-lite            ):                    j                      :              Aflite           C         	   disabled          fimc-is@12000000             ,samsung,exynos4212-fimc-is          )    &                 Z          _                      :                                                                                                                          ~        Alite0 lite1 ppmuispx ppmuispmx isp drc fd mcuisp gicisp mcuctl_isp pwm_isp ispdiv0 ispdiv1 mcuispdiv0 mcuispdiv1 mpll aclk200 aclk400mcuisp div_aclk200 div_aclk400mcuisp uart          C                    isp drc fd mcuctl                                     "      	   disabled       pmu@10020000            )    0       i2c-isp@12140000             ,samsung,exynos4212-i2c-isp          )             :              Ai2c_isp                                       rtc@10070000             ,samsung,s3c6410-rtc         )                  
               ,          -           :     Z           Artc rtc_src       	   disabled          keypad@100a0000          ,samsung,s5pv210-keypad          )
                    m           :     [        Akeypad           okay                                                    $              .default    key-1           <           G           U         key-2           <           G           U         key-3           <           G           U         key-4           <           G           U         key-5           <           G           U         key-A           <           G           U         key-B           <           G           U   0      key-C           <            G           U   .      key-D           <           G           U          key-E           <            G           U            sdhci@12510000           ,samsung,exynos4210-sdhci            )Q                    I           :     )              Ahsmmc mmc_busclk.2        	   disabled          sdhci@12520000           ,samsung,exynos4210-sdhci            )R                    J           :     *              Ahsmmc mmc_busclk.2        	   disabled          sdhci@12530000           ,samsung,exynos4210-sdhci            )S                    K           :     +              Ahsmmc mmc_busclk.2           okay                       $             !        .default       sdhci@12540000           ,samsung,exynos4210-sdhci            )T                    L           :     ,              Ahsmmc mmc_busclk.2        	   disabled          exynos-usbphy@125b0000           ,samsung,exynos4x12-usb2-phy         )[             `   
        :     1              Aphy ref                  	   disabled            w           M   "      hsotg@12480000           ,samsung,s3c6400-hsotg           )H                    G           :     1        Aotg         %   "          	  *usb2-phy          	   disabled          usb@12580000             ,samsung,exynos4210-ehci         )X                    F           :     0        Ausbhost       	   disabled            %   "      "      "           *host hsic0 hsic1          usb@12590000             ,samsung,exynos4210-ohci         )Y                    F           :     0        Ausbhost       	   disabled            %   "           *host          gpu@13000000          %   ,samsung,exynos4210-mali arm,mali-400            )              :                 	  Abus core               #      	   disabled                             z          {          v          |          w          }          x          ~          y          u         9  gp gpmmu pp0 ppmmu0 pp1 ppmmu1 pp2 ppmmu2 pp3 ppmmu3 pmu               $   opp-table            ,operating-points-v2         M   $   opp-160000000               	h          Y      opp-267000000                              opp-350000000               ܓ         ~      opp-440000000               9                      i2s@13960000             ,samsung,s3c6410-i2s         )             :     J        Aiis         -           Ui2s_cdclk1          h   %      %           mtx rx                    	   disabled          i2s@13970000             ,samsung,s3c6410-i2s         )             :     K        Aiis         -           Ui2s_cdclk2          h   	      	           mtx rx                    	   disabled          codec@13400000           ,samsung,mfc-v5          )@                    ^              &        :                   Amfc sclk_mfc            C   '   (        left right             )   *      serial@13800000          ,samsung,exynos4210-uart         )                    4           :     8              Auart clk_uart_baud0         h   	      	           mrx tx            okay          serial@13810000          ,samsung,exynos4210-uart         )                    5           :     9              Auart clk_uart_baud0         h   %      %           mrx tx            okay          serial@13820000          ,samsung,exynos4210-uart         )                    6           :     :              Auart clk_uart_baud0         h   	      	           mrx tx            okay          serial@13830000          ,samsung,exynos4210-uart         )                    7           :     ;              Auart clk_uart_baud0         h   %      %           mrx tx            okay          i2c@13860000                                       ,samsung,s3c2440-i2c         )                    :           :     =        Ai2c         .default         $   +      	   disabled          i2c@13870000                                       ,samsung,s3c2440-i2c         )                    ;           :     >        Ai2c         .default         $   ,      	   disabled          i2c@13880000                                       ,samsung,s3c2440-i2c         )                    <           :     ?        Ai2c         .default         $   -      	   disabled          i2c@13890000                                       ,samsung,s3c2440-i2c         )                    =           :     @        Ai2c         .default         $   .      	   disabled          i2c@138a0000                                       ,samsung,s3c2440-i2c         )                    >           :     A        Ai2c         .default         $   /      	   disabled          i2c@138b0000                                       ,samsung,s3c2440-i2c         )                    ?           :     B        Ai2c         .default         $   0      	   disabled          i2c@138c0000                                       ,samsung,s3c2440-i2c         )                    @           :     C        Ai2c         .default         $   1      	   disabled          i2c@138d0000                                       ,samsung,s3c2440-i2c         )                    A           :     D        Ai2c         .default         $   2      	   disabled          i2c@138e0000                                       ,samsung,s3c2440-hdmiphy-i2c         )                    ]           :     E        Ai2c       	   disabled       hdmiphy@38           ,exynos4210-hdmiphy          )   8        M   9         spi@13920000             ,samsung,exynos4210-spi          )                    B           h   	      	           mtx rx                                     :     G              Aspi spi_busclk0         .default         $   3      	   disabled          spi@13930000             ,samsung,exynos4210-spi          )                    C           h   %      %           mtx rx                                     :     H              Aspi spi_busclk0         .default         $   4      	   disabled          spi@13940000             ,samsung,exynos4210-spi          )                    D           h   	   	   	           mtx rx                                     :     I              Aspi spi_busclk0         .default         $   5      	   disabled          pwm@139d0000             ,samsung,exynos4210-pwm          )           <         %          &          '          (          )           :     P        Atimers                   	   disabled          dma-controller@12680000          ,arm,pl330 arm,primecell         )h                    #           :     $      	  Aapb_pclk                       M   	      dma-controller@12690000          ,arm,pl330 arm,primecell         )i                    $           :     %      	  Aapb_pclk                       M   %      dma-controller@12850000          ,arm,pl330 arm,primecell         )                    "           :           	  Aapb_pclk                     fimd@11c00000            ,samsung,exynos4210-fimd                      )             fifo vsync lcd_sys                                     :                   Asclk_fimd fimd                     C   6        4         	   disabled          tmu@100c0000                         )                         	   disabled                         ,samsung,exynos4412-tmu          :           
  Atmu_apbif           M   H      jpeg-codec@11840000          ,samsung,exynos4212-jpeg         )                    X           :             Ajpeg                       C   7      rotator@12810000             ,samsung,exynos4212-rotator          )     d               S           :             Arotator         C   8      hdmi@12d00000            ,samsung,exynos4212-hdmi         )                    \         1  Ahdmi sclk_hdmi sclk_pixel sclk_hdmiphy mout_hdmi          (  :                                       9           :           
                  	   disabled            M   ;      cec@100b0000             ,samsung,s5p-cec         )                    r           :     W        Ahdmicec            
           ;        .default         $   <      	   disabled          mixer@12c10000           ,samsung,exynos4212-mixer                   [           )    !                 :        C   =      	   disabled            Amixer hdmi sclk_hdmi vp          :                             )   >   ?      ppmu@106a0000            ,samsung,exynos-ppmu         )j              :             Appmu          	   disabled          ppmu@106b0000            ,samsung,exynos-ppmu         )k              :             Appmu          	   disabled          ppmu@106c0000            ,samsung,exynos-ppmu         )l              :             Appmu          	   disabled          ppmu@112a0000            ,samsung,exynos-ppmu         )*              :             Appmu          	   disabled          ppmu@116a0000            ,samsung,exynos-ppmu         )j              :             Appmu          	   disabled          ppmu@11ac0000            ,samsung,exynos-ppmu         )              :             Appmu          	   disabled          ppmu@11e40000            ,samsung,exynos-ppmu         )              :             Appmu          	   disabled          ppmu@12630000            ,samsung,exynos-ppmu         )c            	   disabled          ppmu@12aa0000            ,samsung,exynos-ppmu         )              :             Appmu          	   disabled          ppmu@12e40000            ,samsung,exynos-ppmu         )              :             Appmu          	   disabled          ppmu@13220000            ,samsung,exynos-ppmu         )"              :             Appmu          	   disabled          ppmu@13660000            ,samsung,exynos-ppmu         )f              :             Appmu          	   disabled          ppmu@13670000            ,samsung,exynos-ppmu         )g              :             Appmu          	   disabled          sysmmu@13620000          ,samsung,exynos-sysmmu           )b                                        Asysmmu master           :                     &        7            M   '      sysmmu@13630000          ,samsung,exynos-sysmmu           )c                                        Asysmmu master           :                     &        7            M   (      sysmmu@12e20000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :                     :        7            M   =      sysmmu@11a20000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :                              7            M         sysmmu@11a30000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :                             7            M         sysmmu@11a40000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :     	                        7            M         sysmmu@11a50000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :     
                        7            M         sysmmu@11a60000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :                             7            M   7      sysmmu@12a30000          ,samsung,exynos-sysmmu           )                                         Asysmmu master           :                  7            M   8      sysmmu@11e20000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :                             7            M   6      sss@10830000             ,samsung,exynos4210-secss            )                    p           :              Asecss         rng@10830400             ,samsung,exynos4-rng         )            :              Asecss         pinctrl@11400000             ,samsung,exynos4x12-pinctrl          )@                    /      gpa0-gpio-bank           D        T                             gpa1-gpio-bank           D        T                             gpb-gpio-bank            D        T                             gpc0-gpio-bank           D        T                             gpc1-gpio-bank           D        T                             gpd0-gpio-bank           D        T                             gpd1-gpio-bank           D        T                             gpf0-gpio-bank           D        T                             gpf1-gpio-bank           D        T                             gpf2-gpio-bank           D        T                             gpf3-gpio-bank           D        T                             gpj0-gpio-bank           D        T                             gpj1-gpio-bank           D        T                             uart0-data-pins         `gpa0-0 gpa0-1           m                                 uart0-fctl-pins         `gpa0-2 gpa0-3           m                                 uart1-data-pins         `gpa0-4 gpa0-5           m                                 uart1-fctl-pins         `gpa0-6 gpa0-7           m                                 i2c2-bus-pins           `gpa0-6 gpa0-7           m                                  M   -      uart2-data-pins         `gpa1-0 gpa1-1           m                                 uart2-fctl-pins         `gpa1-2 gpa1-3           m                                 uart-audio-a-pins           `gpa1-0 gpa1-1           m                                 i2c3-bus-pins           `gpa1-2 gpa1-3           m                                  M   .      uart3-data-pins         `gpa1-4 gpa1-5           m                                 uart-audio-b-pins           `gpa1-4 gpa1-5           m                                 spi0-bus-pins           `gpb-0 gpb-2 gpb-3           m                                  M   3      i2c4-bus-pins           `gpb-0 gpb-1         m                                  M   /      spi1-bus-pins           `gpb-4 gpb-6 gpb-7           m                                  M   4      i2c5-bus-pins           `gpb-2 gpb-3         m                                  M   0      i2s1-bus-pins         #  `gpc0-0 gpc0-1 gpc0-2 gpc0-3 gpc0-4          m                                 pcm1-bus-pins         #  `gpc0-0 gpc0-1 gpc0-2 gpc0-3 gpc0-4          m                                 ac97-bus-pins         #  `gpc0-0 gpc0-1 gpc0-2 gpc0-3 gpc0-4          m                                 i2s2-bus-pins         #  `gpc1-0 gpc1-1 gpc1-2 gpc1-3 gpc1-4          m                                 pcm2-bus-pins         #  `gpc1-0 gpc1-1 gpc1-2 gpc1-3 gpc1-4          m                                 spdif-bus-pins          `gpc1-0 gpc1-1           m                                 i2c6-bus-pins           `gpc1-3 gpc1-4           m                                  M   1      spi2-bus-pins           `gpc1-1 gpc1-3 gpc1-4            m                                  M   5      pwm0-out-pins           `gpd0-0          m                                 pwm1-out-pins           `gpd0-1          m                                 lcd-ctrl-pins           `gpd0-0 gpd0-1           m                                 i2c7-bus-pins           `gpd0-2 gpd0-3           m                                  M   2      pwm2-out-pins           `gpd0-2          m                                 pwm3-out-pins           `gpd0-3          m                                 i2c0-bus-pins           `gpd1-0 gpd1-1           m                                  M   +      mipi0-clk-pins          `gpd1-0 gpd1-1           m                                 i2c1-bus-pins           `gpd1-2 gpd1-3           m                                  M   ,      mipi1-clk-pins          `gpd1-2 gpd1-3           m                                 lcd-clk-pins            `gpf0-0 gpf0-1 gpf0-2 gpf0-3         m                                 lcd-data-width16-pins         p  `gpf0-7 gpf1-0 gpf1-1 gpf1-2 gpf1-3 gpf1-6 gpf1-7 gpf2-0 gpf2-1 gpf2-2 gpf2-3 gpf2-7 gpf3-0 gpf3-1 gpf3-2 gpf3-3         m                                 lcd-data-width18-pins         ~  `gpf0-6 gpf0-7 gpf1-0 gpf1-1 gpf1-2 gpf1-3 gpf1-6 gpf1-7 gpf2-0 gpf2-1 gpf2-2 gpf2-3 gpf2-6 gpf2-7 gpf3-0 gpf3-1 gpf3-2 gpf3-3           m                                 lcd-data-width24-pins           `gpf0-4 gpf0-5 gpf0-6 gpf0-7 gpf1-0 gpf1-1 gpf1-2 gpf1-3 gpf1-4 gpf1-5 gpf1-6 gpf1-7 gpf2-0 gpf2-1 gpf2-2 gpf2-3 gpf2-4 gpf2-5 gpf2-6 gpf2-7 gpf3-0 gpf3-1 gpf3-2 gpf3-3         m                                 lcd-ldi-pins            `gpf3-4          m                                 cam-port-a-io-pins        T  `gpj0-0 gpj0-1 gpj0-2 gpj0-3 gpj0-4 gpj0-5 gpj0-6 gpj0-7 gpj1-0 gpj1-1 gpj1-2 gpj1-4         m                                 cam-port-a-clk-active-pins          `gpj1-3          m                                cam-port-a-clk-idle-pins            `gpj1-3          m                                    pinctrl@11000000             ,samsung,exynos4x12-pinctrl          )                     .      wakeup-interrupt-controller          ,samsung,exynos4210-wakeup-eint                                        gpk0-gpio-bank           D        T                             gpk1-gpio-bank           D        T                             gpk2-gpio-bank           D        T                             gpk3-gpio-bank           D        T                             gpl0-gpio-bank           D        T                             gpl1-gpio-bank           D        T                             gpl2-gpio-bank           D        T                             gpm0-gpio-bank           D        T                             gpm1-gpio-bank           D        T                             gpm2-gpio-bank           D        T                             gpm3-gpio-bank           D        T                             gpm4-gpio-bank           D        T                             gpy0-gpio-bank           D        T         gpy1-gpio-bank           D        T         gpy2-gpio-bank           D        T         gpy3-gpio-bank           D        T         gpy4-gpio-bank           D        T         gpy5-gpio-bank           D        T         gpy6-gpio-bank           D        T         gpx0-gpio-bank           D        T                               `                                                                                                   gpx1-gpio-bank           D        T                               `                                                                                                   gpx2-gpio-bank           D        T                             gpx3-gpio-bank           D        T                             sd0-clk-pins            `gpk0-0          m                                sd0-cmd-pins            `gpk0-1          m                                sd0-cd-pins         `gpk0-2          m                               sd0-bus-width1-pins         `gpk0-3          m                               sd0-bus-width4-pins         `gpk0-3 gpk0-4 gpk0-5 gpk0-6         m                               sd0-bus-width8-pins         `gpk1-3 gpk1-4 gpk1-5 gpk1-6         m                               sd4-clk-pins            `gpk0-0          m                                sd4-cmd-pins            `gpk0-1          m                                sd4-cd-pins         `gpk0-2          m                               sd4-bus-width1-pins         `gpk0-3          m                               sd4-bus-width4-pins         `gpk0-3 gpk0-4 gpk0-5 gpk0-6         m                               sd4-bus-width8-pins         `gpk1-3 gpk1-4 gpk1-5 gpk1-6         m                               sd1-clk-pins            `gpk1-0          m                                sd1-cmd-pins            `gpk1-1          m                                sd1-cd-pins         `gpk1-2          m                               sd1-bus-width1-pins         `gpk1-3          m                               sd1-bus-width4-pins         `gpk1-3 gpk1-4 gpk1-5 gpk1-6         m                               sd2-clk-pins            `gpk2-0          m                                  M         sd2-cmd-pins            `gpk2-1          m                                  M         sd2-cd-pins         `gpk2-2          m                                 M   !      sd2-bus-width1-pins         `gpk2-3          m                               sd2-bus-width4-pins         `gpk2-3 gpk2-4 gpk2-5 gpk2-6         m                                 M          sd2-bus-width8-pins         `gpk3-3 gpk3-4 gpk3-5 gpk3-6         m                               sd3-clk-pins            `gpk3-0          m                                sd3-cmd-pins            `gpk3-1          m                                sd3-cd-pins         `gpk3-2          m                               sd3-bus-width1-pins         `gpk3-3          m                               sd3-bus-width4-pins         `gpk3-3 gpk3-4 gpk3-5 gpk3-6         m                               cam-port-b-io-pins        T  `gpm0-0 gpm0-1 gpm0-2 gpm0-3 gpm0-4 gpm0-5 gpm0-6 gpm0-7 gpm1-0 gpm1-1 gpm2-0 gpm2-1         m                                cam-port-b-clk-active-pins          `gpm2-2          m                                cam-port-b-clk-idle-pins            `gpm2-2          m                                 ext-int0-pins           `gpx0-0          m                                 ext-int8-pins           `gpx1-0          m                                 ext-int15-pins          `gpx1-7          m                                 ext-int16-pins          `gpx2-0          m                                 ext-int31-pins          `gpx3-7          m                                 fimc-is-i2c0-pins           `gpm4-0 gpm4-1           m                                 fimc-is-i2c1-pins           `gpm4-2 gpm4-3           m                                 fimc-is-uart-pins           `gpm3-5 gpm3-7           m                                 hdmi-cec-pins           `gpx3-6          m                                   M   <      keypad-rows-pins            `gpx2-0 gpx2-1 gpx2-2            m                                  M         keypad-cols-pins          8  `gpx1-0 gpx1-1 gpx1-2 gpx1-3 gpx1-4 gpx1-5 gpx1-6 gpx1-7         m                                   M            pinctrl@3860000          ,samsung,exynos4x12-pinctrl          )                             
       gpz-gpio-bank            D        T                             i2s0-bus-pins         *  `gpz-0 gpz-1 gpz-2 gpz-3 gpz-4 gpz-5 gpz-6           m                                 pcm0-bus-pins           `gpz-0 gpz-1 gpz-2 gpz-3 gpz-4           m                                    pinctrl@106e0000             ,samsung,exynos4x12-pinctrl          )n                    H      gpv0-gpio-bank           D        T                             gpv1-gpio-bank           D        T                             gpv2-gpio-bank           D        T                             gpv3-gpio-bank           D        T                             gpv4-gpio-bank           D        T                             c2c-bus-pins            `gpv0-0 gpv0-1 gpv0-2 gpv0-3 gpv0-4 gpv0-5 gpv0-6 gpv0-7 gpv1-0 gpv1-1 gpv1-2 gpv1-3 gpv1-4 gpv1-5 gpv1-6 gpv1-7 gpv2-0 gpv2-1 gpv2-2 gpv2-3 gpv2-4 gpv2-5 gpv2-6 gpv2-7 gpv3-0 gpv3-1 gpv3-2 gpv3-3 gpv3-4 gpv3-5 gpv3-6 gpv3-7 gpv4-0 gpv4-1           m                                    sram@2020000          
   ,mmio-sram           )                                      "            smp-sram@0           ,samsung,exynos4210-sysram           )             smp-sram@2f000           ,samsung,exynos4210-sysram-ns            )              power-domain@10023ca0            ,samsung,exynos4210-pd           )<                        ISP         M         cache-controller@10502000            ,arm,pl310-cache         )P                                                                                                                '           @           R         clock-controller@10030000            ,samsung,exynos4412-clock            )            -           M         clock-controller@10048000            ,samsung,exynos4412-isp-clock            )            -                      :                   Aaclk200 aclk400_mcuisp          M         timer@10050000           ,samsung,exynos4412-mct          )             :           X        Afin_pll mct       D  f          9                                                watchdog@10060000            ,samsung,exynos5250-wdt          )                    +           :     Y      	  Awatchdog               
      adc@126c0000             ,samsung,exynos4212-adc          )l                             
           :     F        Aadc         z              
      	   disabled          g2d@10800000             ,samsung,exynos4212-g2d          )                    Y           :                   Asclk_fimg2d fimg2d          C   @      mmc@12550000             ,samsung,exynos4412-dw-mshc          )U                    M                                                :     -              Abiu ciu       	   disabled          sysmmu@10a40000          ,samsung,exynos-sysmmu           )                                        Asysmmu master           :                  7            M   @      sysmmu@12260000          ,samsung,exynos-sysmmu           )&                                                   Asysmmu          :              7            M         sysmmu@12270000          ,samsung,exynos-sysmmu           )'                                                   Asysmmu          :      	        7            M         sysmmu@122a0000          ,samsung,exynos-sysmmu           )*                                                   Asysmmu          :      
        7            M         sysmmu@122b0000          ,samsung,exynos-sysmmu           )+                                                   Asysmmu          :              7            M         sysmmu@123b0000          ,samsung,exynos-sysmmu           );                                                    Asysmmu master           :                    7            M         sysmmu@123c0000          ,samsung,exynos-sysmmu           )<                                                   Asysmmu master           :                    7            M         bus-dmc          ,samsung,exynos-bus          :             Abus            A                             	   disabled            M   ?      bus-acp          ,samsung,exynos-bus          :             Abus            B      	   disabled          bus-c2c          ,samsung,exynos-bus          :             Abus            A      	   disabled          opp-table1           ,operating-points-v2         M   A   opp-100000000                               opp-134000000                              opp-160000000               	h                opp-267000000                        ~      opp-400000000               ׄ                            opp-table2           ,operating-points-v2         M   B   opp-100000000                      opp-134000000                     opp-160000000               	h       opp-267000000                        bus-leftbus          ,samsung,exynos-bus          :             Abus            C        )   ?                  	   disabled            M   E      bus-rightbus             ,samsung,exynos-bus          :             Abus            C      	   disabled          bus-display          ,samsung,exynos-bus          :              Abus            D        )   E   ?                  	   disabled            M   >      bus-fsys             ,samsung,exynos-bus          :              Abus            F      	   disabled          bus-peri             ,samsung,exynos-bus          :              Abus            G      	   disabled          bus-mfc          ,samsung,exynos-bus          :              Abus            C      	   disabled          opp-table3           ,operating-points-v2         M   C   opp-100000000                               opp-134000000                        H      opp-160000000               	h          ~      opp-200000000                         B@                  opp-table4           ,operating-points-v2         M   D   opp-160000000               	h       opp-200000000                         opp-table5           ,operating-points-v2         M   F   opp-100000000                      opp-134000000                        opp-table6           ,operating-points-v2         M   G   opp-50000000                      opp-100000000                            thermal-zones      cpu-thermal            H                               trips      cpu-alert-0          p          '        active          M   I      cpu-alert-1          s          '        active          M   J      cpu-alert-2                    '        active        cpu-crit-0                             	  critical             cooling-maps       map0                I      0  %                                          map1                J      0  %                                                   cpus                                 cpu-map    cluster0       core0           4         core1           4         core2           4         core3           4               cpu@a00         8cpu          ,arm,cortex-a9           )  
         :              Acpu            K        D           M         cpu@a01         8cpu          ,arm,cortex-a9           )  
        :              Acpu            K        D           M         cpu@a02         8cpu          ,arm,cortex-a9           )  
        :              Acpu            K        D           M         cpu@a03         8cpu          ,arm,cortex-a9           )  
        :              Acpu            K        D           M            opp-table0           ,operating-points-v2          S        M   K   opp-200000000                                 ^ @      opp-300000000                                 ^ @      opp-400000000               ׄ          H        ^ @      opp-500000000               e          ~        ^ @      opp-600000000               #F                  ^ @      opp-700000000               )'          l        ^ @      opp-800000000               /          B@        ^ @               opp-900000000               5          Լ        ^ @      opp-1000000000              ;                  ^ @      opp-1100000000              A          [\        ^ @      opp-1200000000              G                  ^ @      opp-1300000000              M|m                  ^ @      opp-1400000000              SrN          L        ^ @      opp-1500000000              Yh/          p        ^ @         o         reserved-memory                                   "   region-mfc-left          ,shared-dma-pool          z        @                     M   )      region-mfc-right             ,shared-dma-pool          z                              M   *         memory@40000000         8memory          )@   @         chosen        B  root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc           serial1:115200n8          fixed-rate-clocks      xxti             ,samsung,clock-xxti                    xusbxti          ,samsung,clock-xusbxti           n6       pmic-ap-clk          ,fixed-clock         -                       M               	interrupt-parent #address-cells #size-cells compatible model spi0 spi1 spi2 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 csis0 csis1 fimc0 fimc1 fimc2 fimc3 serial0 serial1 serial2 serial3 pinctrl0 pinctrl1 pinctrl2 pinctrl3 fimc-lite0 fimc-lite1 mshc0 status interrupts interrupt-affinity ranges reg #clock-cells clocks clock-names phandle clock-output-names dmas dma-names samsung,idma-addr #sound-dai-cells #phy-cells syscon #power-domain-cells label power-domains #interrupt-cells interrupt-controller cpu-offset samsung,combiner-nr regmap mask phys phy-names samsung,sysreg iommus samsung,pix-limits samsung,mainscaler-ext samsung,isp-wb samsung,cam-if samsung,lcd-wb samsung,rotators bus-width iommu-names samsung,keypad-num-rows samsung,keypad-num-columns linux,keypad-no-autorepeat wakeup-source pinctrl-0 pinctrl-names keypad,row keypad,column linux,code samsung,pmureg-phandle samsung,sysreg-phandle interrupt-names operating-points-v2 opp-hz opp-microvolt memory-region #pwm-cells #dma-cells #thermal-sensor-cells phy samsung,syscon-phandle hdmi-phandle interconnects #iommu-cells gpio-controller #gpio-cells samsung,pins samsung,pin-function samsung,pin-pud samsung,pin-drv cache-unified cache-level prefetch-data prefetch-instr arm,tag-latency arm,data-latency arm,double-linefill arm,double-linefill-incr arm,double-linefill-wrap arm,prefetch-drop arm,prefetch-offset interrupts-extended #io-channel-cells fifo-depth samsung,data-clock-ratio #interconnect-cells opp-suspend thermal-sensors polling-delay-passive polling-delay temperature hysteresis type trip cooling-device cpu device_type #cooling-cells opp-shared clock-latency-ns turbo-mode no-map size alignment bootargs stdout-path clock-frequency 