  T   8  N0   (              M                                                                     ,Hardkernel ODROID-C1          %   2hardkernel,odroid-c1 amlogic,meson8b       iio-hwmon         
   2iio-hwmon            =            soc          2simple-bus                                     I   cbus@c1100000            2simple-bus           P                                        I             system-controller@4000        ,   2amlogic,meson-hhi-sysctrl simple-mfd syscon          P  @             T   
   clock-controller             2amlogic,meson8b-clkc             \                  cxtal ddr_pll             o            |            T         power-controller             2amlogic,meson8b-pwrc                                  X         B      C      K      O                                    
            F   dblk pic_dc hdmi_apb hdmi_system venci vencp vdac vencl viu venc rdma            \               cvpu                         
G         T            audio-controller@5400             2amlogic,aiu-meson8b amlogic,aiu                      AIU          P  T                  0          2         
  i2s spdif         	  &disabled          H   \      &      (      P            ,      '      Q                  \   cpclk i2s_pclk i2s_aoclk i2s_mclk i2s_mixer spdif_pclk spdif_aoclk spdif_mclk spdif_mclk_sel                      assist@7c00          2amlogic,meson-mx-assist syscon           P  |          rng@8100          &   2amlogic,meson8b-rng amlogic,meson-rng            P               \               ccore          serial@84c0          2amlogic,meson8b-uart             P                               -         	  &disabled             \               
         cxtal pclk baud        serial@84dc          2amlogic,meson8b-uart             P                    K         	  &disabled             \               
         cxtal pclk baud        i2c@8500             2amlogic,meson6-i2c           P                                                         	  &disabled             \            pwm@8550             2amlogic,meson8b-pwm          P  P           7         	  &disabled          pwm@8650             2amlogic,meson8b-pwm          P  P           7           &okay            B      	        Ldefault          \               cclkin0 clkin1            T   2      adc@8680          ,   2amlogic,meson8b-saradc amlogic,meson-saradc          P     4        Z                  I           &okay             \                  cclkin core          l   
                   temperature_calib                       T         serial@8700          2amlogic,meson8b-uart             P                     ]         	  &disabled             \               
         cxtal pclk baud        i2c@87c0             2amlogic,meson6-i2c           P                                                        	  &disabled             \            phy@8800          3   2amlogic,meson8b-usb2-phy amlogic,meson-mx-usb2-phy                       P             	  &disabled             \      7      2         cusb_general usb                "         T         phy@8820          3   2amlogic,meson8b-usb2-phy amlogic,meson-mx-usb2-phy                       P               &okay             \      7      3         cusb_general usb                "         T         mmc@8c20          +   2amlogic,meson8b-sdio amlogic,meson-mx-sdio           P                                                           &okay             \            
         ccore clkin          B           Ldefault    slot@1        	   2mmc-slot             P           &okay                                                                 5                      	            spi@8c80             2amlogic,meson6-spifc             P                                     	  &disabled          mmc@8e00          *   2amlogic,meson8-sdhc amlogic,meson-mx-sdhc            P      B               N           &okay          $   \                                 !   cclkin0 clkin1 clkin2 clkin3 pclk            B           Ldefault                                                $                 3                      	         interrupt-controller@9880         2   2amlogic,meson-gpio-intc amlogic,meson8b-gpio-intc            P              >        S            d   @   A   B   C   D   E   F   G        &okay             T   "      watchdog@9900            2amlogic,meson8b-wdt          P                               timer@9940           2amlogic,meson6-timer             P  @         0         
                                          \         
      
   cxtal pclk         reset-controller@4404            2amlogic,meson8b-reset            P  D            |            T         analog-top@81a8       "   2amlogic,meson8b-analog-top syscon            P           pwm@86c0             2amlogic,meson8b-pwm          P             7         	  &disabled          clock-measure@8758           2amlogic,meson8b-clk-measure          P  X         pinctrl@9880             2amlogic,meson8b-cbus-pinctrl             P                                        I         T      banks@80b0            P     (             0   8        mux pull pull-enable gpio                                             S       J2 Header Pin 35 J2 Header Pin 36 J2 Header Pin 32 J2 Header Pin 31 J2 Header Pin 29 J2 Header Pin 18 J2 Header Pin 22 J2 Header Pin 16 J2 Header Pin 23 J2 Header Pin 21 J2 Header Pin 19 J2 Header Pin 33 J2 Header Pin 8 J2 Header Pin 10 J2 Header Pin 15 J2 Header Pin 13 J2 Header Pin 24 J2 Header Pin 26 Revision (upper) Revision (lower) J2 Header Pin 7  J2 Header Pin 12 J2 Header Pin 11    TFLASH_VDD_EN   VCCK_PWM (PWM_C) I2CA_SDA I2CA_SCL I2CB_SDA I2CB_SCL VDDEE_PWM (PWM_D)  HDMI_HPD HDMI_I2C_SDA HDMI_I2C_SCL ETH_PHY_INTR ETH_PHY_NRST ETH_TXD1 ETH_TXD0 ETH_TXD3 ETH_TXD2 ETH_RGMII_TX_CLK SD_DATA1 (SDB_D1) SD_DATA0 (SDB_D0) SD_CLK SD_CMD SD_DATA3 (SDB_D3) SD_DATA2 (SDB_D2) SD_CDN (SD_DET_N) SDC_D0 (EMMC) SDC_D1 (EMMC) SDC_D2 (EMMC) SDC_D3 (EMMC) SDC_D4 (EMMC) SDC_D5 (EMMC) SDC_D6 (EMMC) SDC_D7 (EMMC) SDC_CLK (EMMC) SDC_RSTn (EMMC) SDC_CMD (EMMC) BOOT_SEL        ETH_RXD1 ETH_RXD0 ETH_RX_DV RGMII_RX_CLK ETH_RXD3 ETH_RXD2 ETH_TXEN ETH_PHY_REF_CLK_25MOUT ETH_MDC ETH_MDIO             T         eth-rgmii            T      mux         eth_tx_clk eth_tx_en eth_txd1_0 eth_txd0_0 eth_rx_clk eth_rx_dv eth_rxd1 eth_rxd0 eth_mdio_en eth_mdc eth_ref_clk eth_txd2 eth_txd3 eth_rxd3 eth_rxd2         	  ethernet                      eth-rmii       mux       [  eth_tx_en eth_txd1_0 eth_txd0_0 eth_rx_clk eth_rx_dv eth_rxd1 eth_rxd0 eth_mdio_en eth_mdc        	  ethernet                      i2c-a      mux         i2c_sda_a i2c_sck_a         i2c_a                     sd-b             T      mux       2  sd_d0_b sd_d1_b sd_d2_b sd_d3_b sd_clk_b sd_cmd_b           sd_b                      sdxc-c           T      mux       6  sdxc_d0_c sdxc_d13_c sdxc_d47_c sdxc_clk_c sdxc_cmd_c           sdxc_c                    pwm-c1           T      mux         pwm_c1          pwm_c                     pwm-d            T   	   mux         pwm_d           pwm_d                     uart-b0    mux         uart_tx_b0 uart_rx_b0           uart_b                    uart-b0-cts-rts    mux         uart_cts_b0 uart_rts_b0         uart_b                          cache-controller@c4200000            2arm,pl310-cache          P                                                                    &              8           F            U         T   #      bus@c4300000             2simple-bus           P0                                       I    0        interrupt-controller@1000            2arm,cortex-a9-gic            P                     >        S            T         scu@0            2arm,cortex-a5-scu            P             timer@200            2arm,cortex-a5-global-timer           P                                \      ~      	  &disabled          timer@600            2arm,cortex-a5-twd-timer          P                                \      ~         aobus@c8100000           2simple-bus           P                                       I            remoteproc@1c         /   2amlogic,meson8b-ao-arc amlogic,meson-mx-ao-arc           P         8         
  remap cpu         	  &disabled            i           y                  M         \      Y      ir-receiver@480          2amlogic,meson6-ir            P                                &okay            B           Ldefault       serial@4c0        +   2amlogic,meson8b-uart amlogic,meson-ao-uart           P                    Z           &okay             \         
      
         cxtal pclk baud          B           Ldefault       i2c@500          2amlogic,meson6-i2c           P                      \                                   	  &disabled             \      
      rtc@740          2amlogic,meson8b-rtc          P  @                  H                                  	  &disabled                            \           ~         pmu@e0           2amlogic,meson8b-pmu syscon           P               T         pinctrl@84           2amlogic,meson8b-aobus-pinctrl            P                                         I         T      ao-bank@14           P         ,      $           mux pull gpio                                                     UART TX UART RX  TF_3V3N_1V8_EN USB_HUB_RST_N USB_OTG_PWREN J7 Header Pin 2 IR_IN J7 Header Pin 4 J7 Header Pin 6 J7 Header Pin 5 J7 Header Pin 7 HDMI_CEC SYS_LED               T   0   usb-hub                                          usb-hub-reset            i2s-am-clk-out     mux         i2s_am_clk_out          i2s                   i2s-ao-clk-out     mux         i2s_ao_clk_out          i2s                   i2s-lr-clk-out     mux         i2s_lr_clk_out          i2s                   i2s-out-ch01       mux         i2s_out_01          i2s                   spdif-out-1    mux         spdif_out_1         spdif_1                   uart_ao_a            T      mux         uart_tx_ao_a uart_rx_ao_a           uart_ao                   remote           T      mux         remote_input            remote                          usb@c9040000             2amlogic,meson8b-usb snps,dwc2                                      P                                        	  usb2-phy                                                        host          	  &disabled             \      A         cotg       usb@c90c0000             2amlogic,meson8b-usb snps,dwc2                                      P                                        	  usb2-phy            host            &okay             \      @         cotg       ethernet@c9410000         2   2amlogic,meson8b-dwmac snps,dwmac-3.70a snps,dwmac            PA     @                             macirq          &okay              \      $      _      _            *   cstmmaceth clkin0 clkin1 timing-adjustment                                        +      
   stmmaceth                         B           Ldefault                   	  $rgmii-id               !        mac-address    mdio             2snps,dwmac-mdio                              ethernet-phy@0           P            -  '        = 8        O      )               "                       T                sram@d9000000         
   2mmio-sram            P                                        I             ao-arc-sram@0            2amlogic,meson8b-ao-arc-sram          P                [         T         smp-sram@1ff80           2amlogic,meson8b-smp-sram             P             bootrom@d9040000              2amlogic,meson-mx-bootrom syscon          P           secbus@da000000          2simple-bus           P     `                                   I         `    nvmem@0          2amlogic,meson8b-efuse            P                                          \      :         ccore       calib@1f4            P              T         mac@1b4          P              T   !         system-controller@4000           2amlogic,meson8b-secbus2 syscon           P  @              T               thermal-sensor           2generic-adc-thermal         `             =              vsensor-channel           T   *      xtal-clk             2fixed-clock         n6         xtal             o             T         cpus                                 cpu@200         cpu          2arm,cortex-a5              #         P           amlogic,meson8b-smp                           $         \                            %         T   &      cpu@201         cpu          2arm,cortex-a5              #         P          amlogic,meson8b-smp                           $         \                          T   '      cpu@202         cpu          2arm,cortex-a5              #         P          amlogic,meson8b-smp                           $         \                          T   (      cpu@203         cpu          2arm,cortex-a5              #         P          amlogic,meson8b-smp                           $         \                          T   )         opp-table            2operating-points-v2                   T   $   opp-96000000                          `      opp-192000000               q          `      opp-312000000                         `      opp-408000000               Q          `      opp-504000000               
n          `      opp-600000000               #F          `      opp-720000000               *T          `      opp-816000000               0,                opp-1008000000              <          e       opp-1200000000              G          e       opp-1320000000              N          e       opp-1488000000              X          e       opp-1536000000              [          e          gpu-opp-table            2operating-points-v2          T   .   opp-255000000               2               opp-364285714                              opp-425000000               T@               opp-510000000               e               opp-637500000               %z`                  #         pmu          2arm,cortex-a5-pmu         0                                                  .   &   '   (   )      reserved-memory                                    I   hwrom@0          P                 A         thermal-zones      soc         H           ^          l   *   cooling-maps       map0            |   +      <     &   '   (   )   ,      map1            |   -      <     &   '   (   )   ,         trips      soc-passive          8                  passive          T   +      soc-hot          _                  hot          T   -      soc-critical                             	  critical                   bus@c8000000             2simple-bus           P                                        I             clock-controller@400             2amlogic,meson8b-ddr-clkc             P                \            cxtal             o            T         bus@6000             2simple-bus           P  `                                      I      `       video-lut@48          &   2amlogic,meson8b-canvas amlogic,canvas            P   H               bus@d0000000             2simple-bus           P                                         I              gpu@c0000         "   2amlogic,meson8b-mali arm,mali-450            P            `                                                                                        &  gp gpmmu pp pmu pp0 ppmmu0 pp1 ppmmu1                  N         \      
            	   cbus core               .                      /         T   ,         aliases         /soc/aobus@c8100000/serial@4c0        #  /soc/cbus@c1100000/mmc@8c20/slot@1          /soc/cbus@c1100000/mmc@8e00       chosen          serial0:115200n8          memory          memory           P@   @         emmc-pwrseq          2mmc-pwrseq-emmc         O      ?            T         leds          
   2gpio-leds      blue            c1:blue:alive              0            
  heartbeat           off          regulator-p5v0           2regulator-fixed         P5V0            
 LK@        " LK@         T   1      regulator-tflash_vdd             2regulator-fixed         TFLASH_VDD          
 2Z        " 2Z        :           E                   J         T         gpio-regulator-tf_io             2regulator-gpio          TF_IO           
 w@        " 2Z        :              0               ]            c 2Z     w@            T         rtc32k-xtal-clk          2fixed-clock                    RTC32K           o             T         regulator-vcc-1v8            2regulator-fixed         VCC1V8          
 w@        " w@        :   1         T         regulator-vcc-3v3            2regulator-fixed         VCC3V3          
 2Z        " 2Z        :   1         T         regulator-vcck           2pwm-regulator           VCCK            
 `        " e         j   1        u   2      /            z   [                               T   %      regulator-vddc-ddr           2regulator-fixed       	  DDR_VDDC            
 `        " `        :   1      regulator-vddee          2pwm-regulator           VDDEE           
 `        " e         j   1        u   2     /            z   [                               T   /      regulator-vdd-rtc            2regulator-fixed         VDD_RTC         
         "         :            T            	#address-cells #size-cells interrupt-parent model compatible io-channels ranges reg phandle clocks clock-names #clock-cells #reset-cells #power-domain-cells amlogic,ao-sysctrl resets reset-names assigned-clocks assigned-clock-rates #sound-dai-cells sound-name-prefix interrupts interrupt-names status fifo-size #pwm-cells pinctrl-0 pinctrl-names #io-channel-cells amlogic,hhi-sysctrl nvmem-cells nvmem-cell-names vref-supply #phy-cells bus-width no-sdio cap-mmc-highspeed cap-sd-highspeed disable-wp cd-gpios vmmc-supply vqmmc-supply max-frequency mmc-hs200-1_8v mmc-pwrseq interrupt-controller #interrupt-cells amlogic,channel-interrupts reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names groups function bias-disable bias-pull-up cache-unified cache-level arm,data-latency arm,tag-latency arm,filter-ranges prefetch-data prefetch-instr arm,shared-override amlogic,secbus2 sram vdd-supply gpio-hog output-high line-name phys phy-names g-rx-fifo-size g-np-tx-fifo-size g-tx-fifo-size dr_mode rx-fifo-depth tx-fifo-depth power-domains phy-handle phy-mode reset-assert-us reset-deassert-us reset-gpios pool #thermal-sensor-cells io-channel-names clock-frequency clock-output-names device_type next-level-cache enable-method operating-points-v2 #cooling-cells cpu-supply opp-shared opp-hz opp-microvolt turbo-mode interrupt-affinity no-map polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis mali-supply serial0 mmc0 mmc1 stdout-path label linux,default-trigger default-state regulator-name regulator-min-microvolt regulator-max-microvolt vin-supply gpio enable-active-high gpios-states pwm-supply pwms pwm-dutycycle-range regulator-boot-on regulator-always-on 