 Z   8    (             |                             '    ti,omap3-evm-37xx ti,omap3630 ti,omap3                                   +            7TI OMAP37XX EVM (TMDSEVM3730)      chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@49042000         	   {/display          cpus                         +       cpu@0             arm,cortex-a8            cpu                                   cpu                                                                               pmu@54000000              arm,cortex-a8-pmu            T                          debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu            mpu       iva       
    ti,iva2.2           iva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h                  	   
                     +                    l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus                                       +                          pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +                       "            3        H           f          default                              pinmux_twl4030_pins             A                  pinmux_dss_dpi_pins2                                                                                                                                                                           
      pinmux_mmc1_pins          P                                  "    $    &                    pinmux_mmc2_pins          P    (    *    ,    .    0    2    4     6     8     :                    pinmux_uart3_pins             n  A   p                      pinmux_ehci_port_select_pins                                    pinmux_hsusb2_pins        0                                            pinmux_wl12xx_gpio            P    N                   pinmux_smsc911x_pins                                    scm_conf@270              syscon simple-bus              p  0                     +                 p  0               pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap                                pbias_mmc_omap2430          pbias_mmc_omap2430           w@         -                     clocks                       +       clock@68          
    ti,clksel               h                           clock-mcbsp5-mux-fck                          ti,composite-mux-clock          mcbsp5_mux_fck              	   
                             clock-mcbsp3-mux-fck                          ti,composite-mux-clock          mcbsp3_mux_fck                 
                  clock-mcbsp4-mux-fck                          ti,composite-mux-clock          mcbsp4_mux_fck                 
                                mcbsp5_fck                        ti,composite-clock                                   clock@4       
    ti,clksel                                          clock-mcbsp1-mux-fck                          ti,composite-mux-clock          mcbsp1_mux_fck              	   
                             clock-mcbsp2-mux-fck                          ti,composite-mux-clock          mcbsp2_mux_fck                 
                                mcbsp1_fck                        ti,composite-clock                                   mcbsp2_fck                        ti,composite-clock                                   mcbsp3_fck                        ti,composite-clock                                   mcbsp4_fck                        ti,composite-clock                                         clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +                       "            3        H           f     pinmux_twl4030_vpins                                                          pinmux_dss_dpi_pins1          0     
                                                           target-module@480a6000            ti,sysc-omap2 ti,sysc            H
`D   H
`H   H
`L           "rev sysc syss           ,           9                  G                        ick                      +               H
`        aes1@0            ti,omap3-aes                    P                     T      	      
        Ytx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            HPD   HPH   HPL           "rev sysc syss           ,           9                  G                        ick                      +               HP        aes2@0            ti,omap3-aes                    P                     T      A      B        Ytx rx            prm@48306000              ti,omap3-prm             H0`   @                clocks                       +       virt_16_8m_ck                         fixed-clock         c Y                   osc_sys_ck@d40                        ti,mux-clock                                          @                  sys_ck@1270                       ti,divider-clock                                   s              p         ~            $      sys_clkout1@d70                       ti,gate-clock                          p                 dpll3_x2_ck                       fixed-factor-clock                                           dpll3_m2x2_ck                         fixed-factor-clock              !                                  #      dpll4_x2_ck                       fixed-factor-clock              "                            corex2_fck                        fixed-factor-clock              #                                  %      wkup_l4_ick                       fixed-factor-clock              $                                  d      corex2_d3_fck                         fixed-factor-clock              %                                        corex2_d5_fck                         fixed-factor-clock              %                                           clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk                        fixed-clock         c          omap_32k_fck                          fixed-clock         c               J      virt_12m_ck                       fixed-clock         c                    virt_13m_ck                       fixed-clock         c ]@                  virt_19200000_ck                          fixed-clock         c$                   virt_26000000_ck                          fixed-clock         c                  virt_38_4m_ck                         fixed-clock         cI                   dpll4_ck@d00                          ti,omap3-dpll-per-j-type-clock              $   $                 D  0            "      dpll4_m2_ck@d48                       ti,divider-clock                "        s   ?           H         ~            &      dpll4_m2x2_mul_ck                         fixed-factor-clock              &                                  '      dpll4_m2x2_ck@d00                         ti,hsdiv-gate-clock             '                                            (      omap_96m_alwon_fck                        fixed-factor-clock              (                                  4      dpll3_ck@d00                          ti,omap3-dpll-core-clock                $   $                 @  0                   clock@1140        
    ti,clksel              @                           clock-dpll3-m3                        ti,divider-clock            dpll3_m3_ck                                 s            ~            .      clock-dpll4-m6                        ti,divider-clock            dpll4_m6_ck             "                   s   ?         ~            @      clock-emu-src-mux                         ti,mux-clock            emu_src_mux_ck              $   )   *   +            x      clock-pclk-fck                        ti,divider-clock          	  pclk_fck                ,                   s            ~      clock-pclkx2-fck                          ti,divider-clock            pclkx2_fck              ,                   s            ~      clock-atclk-fck                       ti,divider-clock          
  atclk_fck               ,                   s            ~      clock-traceclk-src-fck                        ti,mux-clock            traceclk_src_fck                $   )   *   +                       -      clock-traceclk-fck                        ti,divider-clock            traceclk_fck                -                   s            ~         dpll3_m3x2_mul_ck                         fixed-factor-clock              .                                  /      dpll3_m3x2_ck@d00                         ti,hsdiv-gate-clock             /                                            0      emu_core_alwon_ck                         fixed-factor-clock              0                                  )      sys_altclk                        fixed-clock         c                7      mcbsp_clks                        fixed-clock         c                
      core_ck                       fixed-factor-clock              !                                  1      dpll1_fck@940                         ti,divider-clock                1                   s              	@         ~            2      dpll1_ck@904                          ti,omap3-dpll-clock             $   2           	  	$  	@  	4                  dpll1_x2_ck                       fixed-factor-clock                                                3      dpll1_x2m2_ck@944                         ti,divider-clock                3        s              	D         ~            G      cm_96m_fck                        fixed-factor-clock              4                                  5      clock@d40         
    ti,clksel              @                           clock-dpll3-m2                        ti,divider-clock            dpll3_m2_ck                                 s            ~            !      clock-omap-96m-fck                        ti,mux-clock            omap_96m_fck                5   $                       [      clock-omap-54m-fck                        ti,mux-clock            omap_54m_fck                6   7                       C      clock-omap-48m-fck                        ti,mux-clock            omap_48m_fck                8   7                       ;         clock@e40         
    ti,clksel              @                           clock-dpll4-m3                        ti,divider-clock            dpll4_m3_ck             "                   s             ~            9      clock-dpll4-m4                        ti,divider-clock            dpll4_m4_ck             "        s            ~            <         dpll4_m3x2_mul_ck                         fixed-factor-clock              9                                  :      dpll4_m3x2_ck@d00                         ti,hsdiv-gate-clock             :                                            6      cm_96m_d2_fck                         fixed-factor-clock              5                                  8      omap_12m_fck                          fixed-factor-clock              ;                                  \      dpll4_m4x2_mul_ck                         ti,fixed-factor-clock               <                                           =      dpll4_m4x2_ck@d00                         ti,gate-clock               =                                                     `      dpll4_m5_ck@f40                       ti,divider-clock                "        s   ?           @         ~            >      dpll4_m5x2_mul_ck                         ti,fixed-factor-clock               >                                           ?      dpll4_m5x2_ck@d00                         ti,hsdiv-gate-clock             ?                                                     |      dpll4_m6x2_mul_ck                         fixed-factor-clock              @                                  A      dpll4_m6x2_ck@d00                         ti,hsdiv-gate-clock             A                                            B      emu_per_alwon_ck                          fixed-factor-clock              B                                  *      clock@d70         
    ti,clksel              p                           clock-clkout2-src-gate                         ti,composite-no-wait-gate-clock         clkout2_src_gate_ck             1                       E      clock-clkout2-src-mux                         ti,composite-mux-clock          clkout2_src_mux_ck              1   $   5   C            F      clock-sys-clkout2                         ti,divider-clock            sys_clkout2             D                   s   @                  clkout2_src_ck                        ti,composite-clock              E   F            D      mpu_ck                        fixed-factor-clock              G                                  H      arm_fck@924                       ti,divider-clock                H           	$        s         emu_mpu_alwon_ck                          fixed-factor-clock              H                                  +      clock@a40         
    ti,clksel              
@                           clock-l3-ick                          ti,divider-clock            l3_ick              1        s            ~            I      clock-l4-ick                          ti,divider-clock            l4_ick              I                   s            ~            K      clock-gpt10-mux-fck                       ti,composite-mux-clock          gpt10_mux_fck               J   $                       X      clock-gpt11-mux-fck                       ti,composite-mux-clock          gpt11_mux_fck               J   $                       Z      clock-ssi-ssr-div-fck-3430es2                         ti,composite-divider-clock          ssi_ssr_div_fck_3430es2             %                 $                                                     clock@c40         
    ti,clksel              @                           clock-rm-ick                          ti,divider-clock            rm_ick              K                   s            ~      clock-gpt1-mux-fck                        ti,composite-mux-clock          gpt1_mux_fck                J   $            c      clock-usim-mux-fck                        ti,composite-mux-clock          usim_mux_fck          (      $   L   M   N   O   P   Q   R   S   T                    ~                     clock@a00         
    ti,clksel              
                            clock-gpt10-gate-fck                          ti,composite-gate-clock         gpt10_gate_fck              $                       W      clock-gpt11-gate-fck                          ti,composite-gate-clock         gpt11_gate_fck              $                       Y      clock-mmchs2-fck                          ti,wait-gate-clock          mmchs2_fck              	                             clock-mmchs1-fck                          ti,wait-gate-clock          mmchs1_fck              	                             clock-i2c3-fck                        ti,wait-gate-clock        	  i2c3_fck                	                             clock-i2c2-fck                        ti,wait-gate-clock        	  i2c2_fck                	                             clock-i2c1-fck                        ti,wait-gate-clock        	  i2c1_fck                	                             clock-mcbsp5-gate-fck                         ti,composite-gate-clock         mcbsp5_gate_fck             
           
                  clock-mcbsp1-gate-fck                         ti,composite-gate-clock         mcbsp1_gate_fck             
           	                  clock-mcspi4-fck                          ti,wait-gate-clock          mcspi4_fck              U                             clock-mcspi3-fck                          ti,wait-gate-clock          mcspi3_fck              U                             clock-mcspi2-fck                          ti,wait-gate-clock          mcspi2_fck              U                             clock-mcspi1-fck                          ti,wait-gate-clock          mcspi1_fck              U                             clock-uart2-fck                       ti,wait-gate-clock        
  uart2_fck               U                             clock-uart1-fck                       ti,wait-gate-clock        
  uart1_fck               U                             clock-hdq-fck                         ti,wait-gate-clock          hdq_fck             V                             clock-modem-fck                       ti,omap3-interface-clock          
  modem_fck               $                             clock-mspro-fck                       ti,wait-gate-clock        
  mspro_fck               	                 clock-ssi-ssr-gate-fck-3430es2                         ti,composite-no-wait-gate-clock         ssi_ssr_gate_fck_3430es2                %                              clock-mmchs3-fck                          ti,wait-gate-clock          mmchs3_fck              	                                gpt10_fck                         ti,composite-clock              W   X      gpt11_fck                         ti,composite-clock              Y   Z      core_96m_fck                          fixed-factor-clock              [                                  	      core_48m_fck                          fixed-factor-clock              ;                                  U      core_12m_fck                          fixed-factor-clock              \                                  V      core_l3_ick                       fixed-factor-clock              I                                  ]      clock@a10         
    ti,clksel              
                           clock-sdrc-ick                        ti,wait-gate-clock        	  sdrc_ick                ]                             clock-mmchs2-ick                          ti,omap3-interface-clock            mmchs2_ick              ^                             clock-mmchs1-ick                          ti,omap3-interface-clock            mmchs1_ick              ^                             clock-hdq-ick                         ti,omap3-interface-clock            hdq_ick             ^                             clock-mcspi4-ick                          ti,omap3-interface-clock            mcspi4_ick              ^                             clock-mcspi3-ick                          ti,omap3-interface-clock            mcspi3_ick              ^                             clock-mcspi2-ick                          ti,omap3-interface-clock            mcspi2_ick              ^                             clock-mcspi1-ick                          ti,omap3-interface-clock            mcspi1_ick              ^                             clock-i2c3-ick                        ti,omap3-interface-clock          	  i2c3_ick                ^                             clock-i2c2-ick                        ti,omap3-interface-clock          	  i2c2_ick                ^                             clock-i2c1-ick                        ti,omap3-interface-clock          	  i2c1_ick                ^                             clock-uart2-ick                       ti,omap3-interface-clock          
  uart2_ick               ^                             clock-uart1-ick                       ti,omap3-interface-clock          
  uart1_ick               ^                             clock-gpt11-ick                       ti,omap3-interface-clock          
  gpt11_ick               ^                             clock-gpt10-ick                       ti,omap3-interface-clock          
  gpt10_ick               ^                             clock-mcbsp5-ick                          ti,omap3-interface-clock            mcbsp5_ick              ^           
                  clock-mcbsp1-ick                          ti,omap3-interface-clock            mcbsp1_ick              ^           	                  clock-omapctrl-ick                        ti,omap3-interface-clock            omapctrl_ick                ^                             clock-aes2-ick                        ti,omap3-interface-clock          	  aes2_ick                ^                             clock-sha12-ick                       ti,omap3-interface-clock          
  sha12_ick               ^                             clock-icr-ick                         ti,omap3-interface-clock            icr_ick             ^                 clock-des2-ick                        ti,omap3-interface-clock          	  des2_ick                ^                 clock-mspro-ick                       ti,omap3-interface-clock          
  mspro_ick               ^                 clock-mailboxes-ick                       ti,omap3-interface-clock            mailboxes_ick               ^                 clock-sad2d-ick                       ti,omap3-interface-clock          
  sad2d_ick               I                             clock-hsotgusb-ick-3430es2                    "    ti,omap3-hsotgusb-interface-clock           hsotgusb_ick_3430es2                ]                             clock-ssi-ick-3430es2                         ti,omap3-ssi-interface-clock            ssi_ick_3430es2             _                             clock-mmchs3-ick                          ti,omap3-interface-clock            mmchs3_ick              ^                                gpmc_fck                          fixed-factor-clock              ]                            core_l4_ick                       fixed-factor-clock              K                                  ^      clock@e00         
    ti,clksel                                          clock-dss-tv-fck                          ti,gate-clock           dss_tv_fck              C                             clock-dss-96m-fck                         ti,gate-clock           dss_96m_fck             [                             clock-dss2-alwon-fck                          ti,gate-clock           dss2_alwon_fck              $                             clock-dss1-alwon-fck-3430es2                          ti,dss-gate-clock           dss1_alwon_fck_3430es2              `                                          dummy_ck                          fixed-clock         c          clock@c00         
    ti,clksel                                          clock-gpt1-gate-fck                       ti,composite-gate-clock         gpt1_gate_fck               $                        b      clock-gpio1-dbck                          ti,gate-clock           gpio1_dbck              a                             clock-wdt2-fck                        ti,wait-gate-clock        	  wdt2_fck                a                             clock-sr1-fck                         ti,wait-gate-clock          sr1_fck             $                            clock-sr2-fck                         ti,wait-gate-clock          sr2_fck             $                            clock-usim-gate-fck                       ti,composite-gate-clock         usim_gate_fck               [           	                     gpt1_fck                          ti,composite-clock              b   c                  wkup_32k_fck                          fixed-factor-clock              J                                  a      clock@c10         
    ti,clksel                                         clock-wdt2-ick                        ti,omap3-interface-clock          	  wdt2_ick                d                             clock-wdt1-ick                        ti,omap3-interface-clock          	  wdt1_ick                d                             clock-gpio1-ick                       ti,omap3-interface-clock          
  gpio1_ick               d                             clock-omap-32ksync-ick                        ti,omap3-interface-clock            omap_32ksync_ick                d                             clock-gpt12-ick                       ti,omap3-interface-clock          
  gpt12_ick               d                             clock-gpt1-ick                        ti,omap3-interface-clock          	  gpt1_ick                d                              clock-usim-ick                        ti,omap3-interface-clock          	  usim_ick                d           	                     per_96m_fck                       fixed-factor-clock              4                                        per_48m_fck                       fixed-factor-clock              ;                                  e      clock@1000        
    ti,clksel                                          clock-uart3-fck                       ti,wait-gate-clock        
  uart3_fck               e                             clock-gpt2-gate-fck                       ti,composite-gate-clock         gpt2_gate_fck               $                       g      clock-gpt3-gate-fck                       ti,composite-gate-clock         gpt3_gate_fck               $                       i      clock-gpt4-gate-fck                       ti,composite-gate-clock         gpt4_gate_fck               $                       k      clock-gpt5-gate-fck                       ti,composite-gate-clock         gpt5_gate_fck               $                       m      clock-gpt6-gate-fck                       ti,composite-gate-clock         gpt6_gate_fck               $                       o      clock-gpt7-gate-fck                       ti,composite-gate-clock         gpt7_gate_fck               $                       q      clock-gpt8-gate-fck                       ti,composite-gate-clock         gpt8_gate_fck               $           	            s      clock-gpt9-gate-fck                       ti,composite-gate-clock         gpt9_gate_fck               $           
            u      clock-gpio6-dbck                          ti,gate-clock           gpio6_dbck              f                             clock-gpio5-dbck                          ti,gate-clock           gpio5_dbck              f                             clock-gpio4-dbck                          ti,gate-clock           gpio4_dbck              f                             clock-gpio3-dbck                          ti,gate-clock           gpio3_dbck              f                             clock-gpio2-dbck                          ti,gate-clock           gpio2_dbck              f                             clock-wdt3-fck                        ti,wait-gate-clock        	  wdt3_fck                f                             clock-mcbsp2-gate-fck                         ti,composite-gate-clock         mcbsp2_gate_fck             
                              clock-mcbsp3-gate-fck                         ti,composite-gate-clock         mcbsp3_gate_fck             
                             clock-mcbsp4-gate-fck                         ti,composite-gate-clock         mcbsp4_gate_fck             
                             clock-uart4-fck                       ti,wait-gate-clock        
  uart4_fck               e                                clock@1040        
    ti,clksel              @                           clock-gpt2-mux-fck                        ti,composite-mux-clock          gpt2_mux_fck                J   $            h      clock-gpt3-mux-fck                        ti,composite-mux-clock          gpt3_mux_fck                J   $                       j      clock-gpt4-mux-fck                        ti,composite-mux-clock          gpt4_mux_fck                J   $                       l      clock-gpt5-mux-fck                        ti,composite-mux-clock          gpt5_mux_fck                J   $                       n      clock-gpt6-mux-fck                        ti,composite-mux-clock          gpt6_mux_fck                J   $                       p      clock-gpt7-mux-fck                        ti,composite-mux-clock          gpt7_mux_fck                J   $                       r      clock-gpt8-mux-fck                        ti,composite-mux-clock          gpt8_mux_fck                J   $                       t      clock-gpt9-mux-fck                        ti,composite-mux-clock          gpt9_mux_fck                J   $                       v         gpt2_fck                          ti,composite-clock              g   h                 gpt3_fck                          ti,composite-clock              i   j      gpt4_fck                          ti,composite-clock              k   l      gpt5_fck                          ti,composite-clock              m   n      gpt6_fck                          ti,composite-clock              o   p      gpt7_fck                          ti,composite-clock              q   r      gpt8_fck                          ti,composite-clock              s   t      gpt9_fck                          ti,composite-clock              u   v      per_32k_alwon_fck                         fixed-factor-clock              J                                  f      per_l4_ick                        fixed-factor-clock              K                                  w      clock@1010        
    ti,clksel                                         clock-gpio6-ick                       ti,omap3-interface-clock          
  gpio6_ick               w                             clock-gpio5-ick                       ti,omap3-interface-clock          
  gpio5_ick               w                             clock-gpio4-ick                       ti,omap3-interface-clock          
  gpio4_ick               w                             clock-gpio3-ick                       ti,omap3-interface-clock          
  gpio3_ick               w                             clock-gpio2-ick                       ti,omap3-interface-clock          
  gpio2_ick               w                             clock-wdt3-ick                        ti,omap3-interface-clock          	  wdt3_ick                w                             clock-uart3-ick                       ti,omap3-interface-clock          
  uart3_ick               w                             clock-uart4-ick                       ti,omap3-interface-clock          
  uart4_ick               w                             clock-gpt9-ick                        ti,omap3-interface-clock          	  gpt9_ick                w           
                  clock-gpt8-ick                        ti,omap3-interface-clock          	  gpt8_ick                w           	                  clock-gpt7-ick                        ti,omap3-interface-clock          	  gpt7_ick                w                             clock-gpt6-ick                        ti,omap3-interface-clock          	  gpt6_ick                w                             clock-gpt5-ick                        ti,omap3-interface-clock          	  gpt5_ick                w                             clock-gpt4-ick                        ti,omap3-interface-clock          	  gpt4_ick                w                             clock-gpt3-ick                        ti,omap3-interface-clock          	  gpt3_ick                w                             clock-gpt2-ick                        ti,omap3-interface-clock          	  gpt2_ick                w                             clock-mcbsp2-ick                          ti,omap3-interface-clock            mcbsp2_ick              w                              clock-mcbsp3-ick                          ti,omap3-interface-clock            mcbsp3_ick              w                             clock-mcbsp4-ick                          ti,omap3-interface-clock            mcbsp4_ick              w                                emu_src_ck                        ti,clkdm-gate-clock             x            ,      secure_32k_fck                        fixed-clock         c               y      gpt12_fck                         fixed-factor-clock              y                                       wdt1_fck                          fixed-factor-clock              y                            security_l4_ick2                          fixed-factor-clock              K                                  z      clock@a14         
    ti,clksel              
                           clock-aes1-ick                        ti,omap3-interface-clock          	  aes1_ick                z                             clock-rng-ick                         ti,omap3-interface-clock            rng_ick             z                             clock-sha11-ick                       ti,omap3-interface-clock          
  sha11_ick               z                 clock-des1-ick                        ti,omap3-interface-clock          	  des1_ick                z                  clock-pka-ick                         ti,omap3-interface-clock            pka_ick             {                    clock@f00         
    ti,clksel                                          clock-cam-mclk                        ti,gate-clock         	  cam_mclk                |                           clock-csi2-96m-fck                        ti,gate-clock           csi2_96m_fck                	                                cam_ick@f10                   !    ti,omap3-no-wait-interface-clock                K                                         security_l3_ick                       fixed-factor-clock              I                                  {      ssi_l4_ick                        fixed-factor-clock              K                                  _      sr_l4_ick                         fixed-factor-clock              K                            dpll2_fck@40                          ti,divider-clock                1                   s               @         ~            }      dpll2_ck@4                        ti,omap3-dpll-clock             $   }               $   @   4                  "         *            ~      dpll2_m2_ck@44                        ti,divider-clock                ~        s               D         ~                  iva2_ck@0                         ti,wait-gate-clock                                                         clock@a18         
    ti,clksel              
                           clock-mad2d-ick                       ti,omap3-interface-clock          
  mad2d_ick               I                             clock-usbtll-ick                          ti,omap3-interface-clock            usbtll_ick              ^                                ssi_ssr_fck_3430es2                       ti,composite-clock                                   ssi_sst_fck_3430es2                       fixed-factor-clock                                                     sys_d2_ck                         fixed-factor-clock              $                                  L      omap_96m_d2_fck                       fixed-factor-clock              [                                  M      omap_96m_d4_fck                       fixed-factor-clock              [                                  N      omap_96m_d8_fck                       fixed-factor-clock              [                                  O      omap_96m_d10_fck                          fixed-factor-clock              [                      
            P      dpll5_m2_d4_ck                        fixed-factor-clock                                                Q      dpll5_m2_d8_ck                        fixed-factor-clock                                                R      dpll5_m2_d16_ck                       fixed-factor-clock                                                S      dpll5_m2_d20_ck                       fixed-factor-clock                                                T      usim_fck                          ti,composite-clock                       dpll5_ck@d04                          ti,omap3-dpll-clock             $   $             $  L  4                  "                  dpll5_m2_ck@d50                       ti,divider-clock                        s              P         ~                  sgx_gate_fck@b00                          ti,composite-gate-clock             1                                         core_d3_ck                        fixed-factor-clock              1                                        core_d4_ck                        fixed-factor-clock              1                                        core_d6_ck                        fixed-factor-clock              1                                        omap_192m_alwon_fck                       fixed-factor-clock              (                                        core_d2_ck                        fixed-factor-clock              1                                        sgx_mux_fck@b40                       ti,composite-mux-clock                        5                       @                  sgx_fck                       ti,composite-clock                                  sgx_ick@b10                       ti,wait-gate-clock              I                                         cpefuse_fck@a08                       ti,gate-clock               $           
                              ts_fck@a08                        ti,gate-clock               J           
                             usbtll_fck@a08                        ti,wait-gate-clock                         
                             dss_ick_3430es2@e10                       ti,omap3-dss-interface-clock                K                                         usbhost_120m_fck@1400                         ti,gate-clock                                                        usbhost_48m_fck@1400                          ti,dss-gate-clock               ;                                          usbhost_ick@1410                          ti,omap3-dss-interface-clock                K                                            clockdomains       core_l3_clkdm             ti,clockdomain                       dpll3_clkdm           ti,clockdomain                     dpll1_clkdm           ti,clockdomain                    per_clkdm             ti,clockdomain        l                                                                                          emu_clkdm             ti,clockdomain              ,      dpll4_clkdm           ti,clockdomain              "      wkup_clkdm            ti,clockdomain        $                                    dss_clkdm             ti,clockdomain                                core_l4_clkdm             ti,clockdomain                                                                                                                                cam_clkdm             ti,clockdomain                       iva2_clkdm            ti,clockdomain                    dpll2_clkdm           ti,clockdomain              ~      d2d_clkdm             ti,clockdomain                          dpll5_clkdm           ti,clockdomain                    sgx_clkdm             ti,clockdomain                    usbhost_clkdm             ti,clockdomain                                target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  "rev sysc            9                   a            fck ick                      +               H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc            3        "            H                        target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           "rev sysc syss           ,  #        >                  9                  G               ]         ick                      +               H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma                                                L           W            d   `                     gpio@48310000             ti,omap3-gpio            H1                         gpio1            q                             3        "                    gpio@49050000             ti,omap3-gpio            I                         gpio2                                3        "      en-usb2-port-hog                                             enable usb2 port             gpio@49052000             ti,omap3-gpio            I                         gpio3                                3        "         gpio@49054000             ti,omap3-gpio            I@                         gpio4                                3        "         gpio@49056000             ti,omap3-gpio            I`                !        gpio5                                3        "                     gpio@49058000             ti,omap3-gpio            I                "        gpio6                                3        "                     serial@4806a000           ti,omap3-uart            H                   H     R        T      1      2        Ytx rx           uart1           cl       serial@4806c000           ti,omap3-uart            H                  I     J        T      3      4        Ytx rx           uart2           cl       serial@49020000           ti,omap3-uart            I                   J     n        T      5      6        Ytx rx           uart3           cl         default                  i2c@48070000              ti,omap3-i2c             H                 8                     +            i2c1            c '@   twl@48              H                                  ti,twl4030           3        "           default                  rtc           ti,twl4030-rtc                    bci           ti,twl4030-bci              	                                    vac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2            usb_1v8          w@         w@               regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1          	'                            regulator-vdac            ti,twl4030-vdac          w@         w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1             :         0                  regulator-vmmc2           ti,twl4030-vmmc2             :         0                 regulator-vusb1v5             ti,twl4030-vusb1v5                    regulator-vusb1v8             ti,twl4030-vusb1v8                    regulator-vusb3v1             ti,twl4030-vusb3v1                    regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2             w@         w@                    	      regulator-vsim            ti,twl4030-vsim          w@         -                  gpio              ti,twl4030-gpio                              3        "                          en_on_board_gpio_61                                          en_hsusb2_clk            twl4030-usb           ti,twl4030-usb              
           "           0           >           L           U                     pwm           ti,twl4030-pwm          `         pwmled            ti,twl4030-pwmled           `         pwrbutton             ti,twl4030-pwrbutton                      keypad            ti,twl4030-keypad                       k           {         8             	  
 7    S         madc              ti,twl4030-madc                                          power         1    ti,twl4030-power-omap3-evm ti,twl4030-power-idle                         i2c@48072000              ti,omap3-i2c             H                 9                     +            i2c2            c       i2c@48060000              ti,omap3-i2c             H                 =                     +            i2c3            c    tvp5146@5c            ti,tvp5146m2                \         mailbox@48094000              ti,omap3-mailbox            mailbox          H	@                                                    mbox-dsp                                                    spi@48098000              ti,omap2-mcspi           H	                A                     +            mcspi1                   @  T      #      $      %      &      '      (      )      *         Ytx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3    tsc2046@0                          ti,tsc2046           B@        #           .            7@          @            I          R (          b            r         }                                                       spi@4809a000              ti,omap2-mcspi           H	                B                     +            mcspi2                      T      +      ,      -      .        Ytx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           H                [                     +            mcspi3                      T                                Ytx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           H                0                     +            mcspi4                     T      F      G        Ytx0 rx0       1w@480b2000           ti,omap3-1w          H                 :        hdq1w         mmc@4809c000              ti,omap3-hsmmc           H	                S        mmc1                     T      =      >        Ytx rx                            S                                              default                  mmc@480b4000              ti,omap3-hsmmc           H@                V        mmc2            T      /      0        Ytx rx                 V     .                                                             +            default               wlcore@2          
    ti,wl1271                                     N        irq wakeup          I          mmc@480ad000              ti,omap3-hsmmc           H
                ^        mmc3            T      M      N        Ytx rx         	  disabled          mmu@480bd400            !              ti,omap2-iommu           H                        mmu_isp         .                    mmu@5d000000            !              ti,omap2-iommu           ]                          mmu_iva       	  disabled          wdt@48314000              ti,omap3-wdt             H1@          
  wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@            "mpu                ;   <        common tx rx            >           mcbsp1          T                     Ytx rx                        fck       	  disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           "rev sysc syss           ,           9               G                        ick                      +               H
         rng@0             ti,omap2-rng                                 4         mcbsp@49022000            ti,omap3-mcbsp           I     I            "mpu sidetone                   >   ?           common tx rx sidetone           >           mcbsp2 mcbsp2_sidetone          T      !      "        Ytx rx                           fck ick       	  disabled          mcbsp@49024000            ti,omap3-mcbsp           I@    I            "mpu sidetone                   Y   Z           common tx rx sidetone           >           mcbsp3 mcbsp3_sidetone          T                    Ytx rx                           fck ick       	  disabled          mcbsp@49026000            ti,omap3-mcbsp           I`            "mpu                6   7        common tx rx            >           mcbsp4          T                    Ytx rx                        fck         M          	  disabled          mcbsp@48096000            ti,omap3-mcbsp           H	`            "mpu                Q   R        common tx rx            >           mcbsp5          T                    Ytx rx                        fck       	  disabled          sham@480c3000             ti,omap3-sham           sham             H0    d            1        T      E        Yrx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1    H1   H1           "rev sysc syss           ,  '        9                  G                           fck ick                      +               H1             ^         r   timer@0           ti,omap3430-timer                                        fck             %         }                      J         target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            "rev sysc syss           ,  '        9                  G                          fck ick                      +               I        timer@0           ti,omap3430-timer                               &         timer@49034000            ti,omap3430-timer            I@                '        timer3        timer@49036000            ti,omap3430-timer            I`                (        timer4        timer@49038000            ti,omap3430-timer            I                )        timer5                 timer@4903a000            ti,omap3430-timer            I                *        timer6                 timer@4903c000            ti,omap3430-timer            I                +        timer7                 timer@4903e000            ti,omap3430-timer            I                ,        timer8                          timer@49040000            ti,omap3430-timer            I                 -        timer9                 timer@48086000            ti,omap3430-timer            H`                .        timer10                timer@48088000            ti,omap3430-timer            H                /        timer11                target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           "rev sysc syss           ,  '        9                  G                          fck ick                      +               H0@       timer@0           ti,omap3430-timer                               _         }                  usbhstll@48062000             ti,usbhs-tll             H                 N        usb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@            usb_host_hs                      +                  	  ehci-phy       ohci@48064400             ti,ohci-omap3            HD                L               ehci@48064800             ti,ehci-omap             HH                M                        gpmc@6e000000             ti,omap3430-gpmc            gpmc             n                         T              Yrxtx                                               +            3        "                                        0             ,                    ethernet@gpmc             smsc,lan9221 smsc,lan9115           #           .            @         Z        t                                                           (           -                      -                              &           7   x        F           `   K        w   K                                                                            	            	                                                      default                 nand@0,0              ti,omap2-nand                                                                  	+hynix,h8kds0un0mer-4em          	:           .           	Ibch8            	Y            t               ,           ,                      "           ,           (           6        7   @           R        &   R           (                                 +      partition@0       	  	jX-Loader                          partition@80000         	jU-Boot                       partition@1c0000            	jEnvironment           $           partition@280000            	jKernel            (   P        partition@780000            	jFilesystem            x                usb_otg_hs@480ab000           ti,omap3-musb            H
                \   ]        mc dma          usb_otg_hs          	p           	{           	           	            	                   	  	usb2-phy            P           	   2      dss@48050000              ti,omap3-dss             H             okay          	  dss_core                         fck                      +                    	  	        	           default           
     dispc@48050400            ti,omap3-dispc           H                      
  dss_dispc                        fck       encoder@4804fc00              ti,omap3-dsi             H    H    @H             "proto phy pll                     	  disabled          	  dss_dsi1                            fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	  disabled          	  dss_rfbi                            fck ick       encoder@48050c00              ti,omap3-venc            H          	  disabled          	  dss_venc                            fck tv_dac_clk        port       endpoint            	          	                          ssi-controller@48058000           ti,omap3-ssi            ssi         okay             H    H            "sys gdd             G        gdd_mpu                      +                                      ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            H    H            "tx rx               C   D      ssi-port@4805b000             ti,omap3-ssi-port            H    H            "tx rx               E   F         serial@49042000           ti,omap3-uart            I                 P        T      Q      R        Ytx rx           uart4           cl       regulator-abb-mpu         
    ti,abb-v1           abb_mpu_iva                       +             H0r   H0h           "base-address int-address            	               $        
	           
         `  
* s                     O                     7                                                          pinmux@480025a0            ti,omap3-padconf pinctrl-single          H %   \                     +                       "            3        H           f          default              pinmux_ehci_phy_pins               J      L                    pinmux_hsusb2_2_pins          0     P      R      T     V     X     Z                      isp@480bc000              ti,omap3-isp             H   H                        
6                       
=                 ports                        +             bandgap@48002524             H %$             ti,omap36xx-bandgap         
I                     target-module@480cb000            ti,sysc-omap3630-sr ti,sysc         smartreflex_core             H8           "sysc            ,           9                              fck                      +               H       smartreflex@0             ti,omap3-smartreflex-core                                        target-module@480c9000            ti,sysc-omap3630-sr ti,sysc         smartreflex_mpu_iva          H8           "sysc            ,           9                              fck                      +               H       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva                                         target-module@50000000            ti,sysc-omap4 ti,sysc            P     P          	  "rev sysc            >                  9                                 fck ick                      +               P               opp-table             operating-points-v2-ti-cpu                            opp50-300000000         
_             
f s s s s s s        
t            
      opp100-600000000            
_    #F         
f O O O O O O        
t         opp130-800000000            
_    /         
f 7 7 7 7 7 7        
t         opp1g-1000000000            
_    ;         
f              
t            opp_supply            ti,omap-opp-supply          
       thermal-zones      cpu-thermal         
           
          
      N         
         trips      cpu_alert           
 8        
           passive                  cpu_crit            
 _        
        	   critical             cooling-maps       map0                      	                 regulator-vddvario            regulator-fixed       	  vddvario                              regulator-vdd33a              regulator-fixed         vdd33a                            hsusb2_power_reg              regulator-fixed         hsusb2_vbus          2Z         2Z                          p         )                 hsusb2_phy            usb-nop-xceiv           <                #          U            default                            leds          
    gpio-leds      ledb            	jomap3evm::ledb                           Hdefault-on           wl12xx_vmmc           regulator-fixed         vwl1271          w@         w@                           p         )        ^          default                             backlight             gpio-backlight           i                      regulator-lcd-3v3             regulator-fixed         lcd_3v3          2Z         2Z         p                                   display           sharp,ls037v7dw01           	jlcd         t                                        <                $                                 port       endpoint            	                         memory@80000000          memory                          	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 display0 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names ti,bit-shift reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells gpio-hog gpios output-low line-name interrupts-extended bci3v1-supply io-channels io-channel-names regulator-always-on ti,use-leds usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns linux,keymap #io-channel-cells ti,use_poweroff #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs spi-max-frequency vcc-supply ti,x-min ti,x-max ti,y-min ti,y-max ti,x-plate-ohms ti,pressure-max ti,swap-xy wakeup-source pendown-gpio ti,dual-volt pbias-supply vmmc-supply vqmmc-supply bus-width non-removable cap-power-off-card interrupt-names ref-clock-frequency status #iommu-cells ti,#tlb-entries ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins bank-width gpmc,device-width gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,access-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns gpmc,wr-data-mux-bus-ns gpmc,wr-access-ns vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address linux,mtd-name nand-bus-width ti,nand-ecc-opt gpmc,sync-clk-ps label multipoint num-eps ram-bits interface-type usb-phy phy-names power vdds_dsi-supply vdda_video-supply remote-endpoint data-lines ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device startup-delay-us enable-active-high reset-gpios linux,default-trigger vin-supply default-on power-supply envdd-supply enable-gpios mode-gpios 