    8    (            
                              ]    incostartec,omap3-lilly-dbb056 incostartec,omap3-lilly-a83x ti,omap3630 ti,omap36xx ti,omap3                                     +         "   7INCOstartec LILLY-DBB056 (DM3730)      chosen        A   =console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0          aliases          F/ocp@68000000/i2c@48070000           K/ocp@68000000/i2c@48072000           P/ocp@68000000/i2c@48060000           U/ocp@68000000/mmc@4809c000           Z/ocp@68000000/mmc@480b4000           _/ocp@68000000/mmc@480ad000           d/ocp@68000000/serial@4806a000            l/ocp@68000000/serial@4806c000            t/ocp@68000000/serial@49020000            |/ocp@68000000/serial@49042000         cpus                         +       cpu@0             arm,cortex-a8            cpu                                   cpu                                                                   pmu@54000000              arm,cortex-a8-pmu            T                           debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             mpu       iva       
    ti,iva2.2            iva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h                  	   
                     +                      l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +                H         scm@2000              ti,omap3-scm simple-bus                                       +                           pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +                                   '        <           Z          wdefault               pinmux_uart1_pins              L      N      P     R                     pinmux_uart2_pins             @     B                    pinmux_uart3_pins             n     p                      pinmux_i2c1_pins                                      pinmux_i2c2_pins                                        pinmux_i2c3_pins                                        pinmux_hsusb1_pins                                pinmux_hsusb_otg_pins         `    r     t      v     x     z     |     ~                                             pinmux_mmc1_pins          0                                            pinmux_spi2_pins                                                 pinmux_twl4030_pins             A                  pinmux_lan9117_pins                               pinmux_gpio4_pins                                  pinmux_gpio5_pins             \                    pinmux_lcd_pins                                                                                                                                                                                     pinmux_mmc2_pins          `    (    *    ,    .    0    2    4     6     8     :    j    l                   pinmux_spi1_pins                                                     scm_conf@270              syscon simple-bus              p  0                     +                  p  0               pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap                                pbias_mmc_omap2430          pbias_mmc_omap2430           w@         -                     clocks                       +       clock@68          
    ti,clksel               h                           clock-mcbsp5-mux-fck                          ti,composite-mux-clock          mcbsp5_mux_fck                         	                     clock-mcbsp3-mux-fck                          ti,composite-mux-clock          mcbsp3_mux_fck              	                     clock-mcbsp4-mux-fck                          ti,composite-mux-clock          mcbsp4_mux_fck              	           	                        mcbsp5_fck                        ti,composite-clock              
                    clock@4       
    ti,clksel                                          clock-mcbsp1-mux-fck                          ti,composite-mux-clock          mcbsp1_mux_fck                         	                     clock-mcbsp2-mux-fck                          ti,composite-mux-clock          mcbsp2_mux_fck              	           	                        mcbsp1_fck                        ti,composite-clock                                  mcbsp2_fck                        ti,composite-clock                                  mcbsp3_fck                        ti,composite-clock                                  mcbsp4_fck                        ti,composite-clock                                        clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +                                   '        <           Z          wdefault    pinmux_lan9221_pins            Z                   pinmux_tsc2048_pins                                pinmux_mmc1cd_pins             V                    pinmux_twl4030_vpins                                                                   target-module@480a6000            ti,sysc-omap2 ti,sysc            H
`D   H
`H   H
`L           rev sysc syss                       -                  ;                        ick                      +                H
`        aes1@0            ti,omap3-aes                    P                     H      	      
        Mtx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            HPD   HPH   HPL           rev sysc syss                       -                  ;                        ick                      +                HP        aes2@0            ti,omap3-aes                    P                     H      A      B        Mtx rx            prm@48306000              ti,omap3-prm             H0`   @                clocks                       +       virt_16_8m_ck                         fixed-clock         W Y                   osc_sys_ck@d40                        ti,mux-clock                                          @                  sys_ck@1270                       ti,divider-clock                        	           g              p         r            "      sys_clkout1@d70                       ti,gate-clock                          p        	         dpll3_x2_ck                       fixed-factor-clock                                          dpll3_m2x2_ck                         fixed-factor-clock                                                !      dpll4_x2_ck                       fixed-factor-clock                                           corex2_fck                        fixed-factor-clock              !                                  #      wkup_l4_ick                       fixed-factor-clock              "                                  b      corex2_d3_fck                         fixed-factor-clock              #                                        corex2_d5_fck                         fixed-factor-clock              #                                           clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk                        fixed-clock         W          omap_32k_fck                          fixed-clock         W               H      virt_12m_ck                       fixed-clock         W                    virt_13m_ck                       fixed-clock         W ]@                  virt_19200000_ck                          fixed-clock         W$                   virt_26000000_ck                          fixed-clock         W                  virt_38_4m_ck                         fixed-clock         WI                   dpll4_ck@d00                          ti,omap3-dpll-per-j-type-clock              "   "                 D  0                   dpll4_m2_ck@d48                       ti,divider-clock                         g   ?           H         r            $      dpll4_m2x2_mul_ck                         fixed-factor-clock              $                                  %      dpll4_m2x2_ck@d00                         ti,hsdiv-gate-clock             %        	                                    &      omap_96m_alwon_fck                        fixed-factor-clock              &                                  2      dpll3_ck@d00                          ti,omap3-dpll-core-clock                "   "                 @  0                  clock@1140        
    ti,clksel              @                           clock-dpll3-m3                        ti,divider-clock            dpll3_m3_ck                     	           g            r            ,      clock-dpll4-m6                        ti,divider-clock            dpll4_m6_ck                      	           g   ?         r            >      clock-emu-src-mux                         ti,mux-clock            emu_src_mux_ck              "   '   (   )            v      clock-pclk-fck                        ti,divider-clock          	  pclk_fck                *        	           g            r      clock-pclkx2-fck                          ti,divider-clock            pclkx2_fck              *        	           g            r      clock-atclk-fck                       ti,divider-clock          
  atclk_fck               *        	           g            r      clock-traceclk-src-fck                        ti,mux-clock            traceclk_src_fck                "   '   (   )        	               +      clock-traceclk-fck                        ti,divider-clock            traceclk_fck                +        	           g            r         dpll3_m3x2_mul_ck                         fixed-factor-clock              ,                                  -      dpll3_m3x2_ck@d00                         ti,hsdiv-gate-clock             -        	                                    .      emu_core_alwon_ck                         fixed-factor-clock              .                                  '      sys_altclk                        fixed-clock         W                5      mcbsp_clks                        fixed-clock         W                      core_ck                       fixed-factor-clock                                                /      dpll1_fck@940                         ti,divider-clock                /        	           g              	@         r            0      dpll1_ck@904                          ti,omap3-dpll-clock             "   0           	  	$  	@  	4                  dpll1_x2_ck                       fixed-factor-clock                                                1      dpll1_x2m2_ck@944                         ti,divider-clock                1        g              	D         r            E      cm_96m_fck                        fixed-factor-clock              2                                  3      clock@d40         
    ti,clksel              @                           clock-dpll3-m2                        ti,divider-clock            dpll3_m2_ck                     	           g            r                  clock-omap-96m-fck                        ti,mux-clock            omap_96m_fck                3   "        	               Y      clock-omap-54m-fck                        ti,mux-clock            omap_54m_fck                4   5        	               A      clock-omap-48m-fck                        ti,mux-clock            omap_48m_fck                6   5        	               9         clock@e40         
    ti,clksel              @                           clock-dpll4-m3                        ti,divider-clock            dpll4_m3_ck                      	           g             r            7      clock-dpll4-m4                        ti,divider-clock            dpll4_m4_ck                      g            r            :         dpll4_m3x2_mul_ck                         fixed-factor-clock              7                                  8      dpll4_m3x2_ck@d00                         ti,hsdiv-gate-clock             8        	                                    4      cm_96m_d2_fck                         fixed-factor-clock              3                                  6      omap_12m_fck                          fixed-factor-clock              9                                  Z      dpll4_m4x2_mul_ck                         ti,fixed-factor-clock               :                                           ;      dpll4_m4x2_ck@d00                         ti,gate-clock               ;        	                                             ^      dpll4_m5_ck@f40                       ti,divider-clock                         g   ?           @         r            <      dpll4_m5x2_mul_ck                         ti,fixed-factor-clock               <                                           =      dpll4_m5x2_ck@d00                         ti,hsdiv-gate-clock             =        	                                             z      dpll4_m6x2_mul_ck                         fixed-factor-clock              >                                  ?      dpll4_m6x2_ck@d00                         ti,hsdiv-gate-clock             ?        	                                    @      emu_per_alwon_ck                          fixed-factor-clock              @                                  (      clock@d70         
    ti,clksel              p                           clock-clkout2-src-gate                         ti,composite-no-wait-gate-clock         clkout2_src_gate_ck             /        	               C      clock-clkout2-src-mux                         ti,composite-mux-clock          clkout2_src_mux_ck              /   "   3   A            D      clock-sys-clkout2                         ti,divider-clock            sys_clkout2             B        	           g   @                  clkout2_src_ck                        ti,composite-clock              C   D            B      mpu_ck                        fixed-factor-clock              E                                  F      arm_fck@924                       ti,divider-clock                F           	$        g         emu_mpu_alwon_ck                          fixed-factor-clock              F                                  )      clock@a40         
    ti,clksel              
@                           clock-l3-ick                          ti,divider-clock            l3_ick              /        g            r            G      clock-l4-ick                          ti,divider-clock            l4_ick              G        	           g            r            I      clock-gpt10-mux-fck                       ti,composite-mux-clock          gpt10_mux_fck               H   "        	               V      clock-gpt11-mux-fck                       ti,composite-mux-clock          gpt11_mux_fck               H   "        	               X      clock-ssi-ssr-div-fck-3430es2                         ti,composite-divider-clock          ssi_ssr_div_fck_3430es2             #        	         $                                                     clock@c40         
    ti,clksel              @                           clock-rm-ick                          ti,divider-clock            rm_ick              I        	           g            r      clock-gpt1-mux-fck                        ti,composite-mux-clock          gpt1_mux_fck                H   "            a      clock-usim-mux-fck                        ti,composite-mux-clock          usim_mux_fck          (      "   J   K   L   M   N   O   P   Q   R        	            r                     clock@a00         
    ti,clksel              
                            clock-gpt10-gate-fck                          ti,composite-gate-clock         gpt10_gate_fck              "        	               U      clock-gpt11-gate-fck                          ti,composite-gate-clock         gpt11_gate_fck              "        	               W      clock-mmchs2-fck                          ti,wait-gate-clock          mmchs2_fck                      	                     clock-mmchs1-fck                          ti,wait-gate-clock          mmchs1_fck                      	                     clock-i2c3-fck                        ti,wait-gate-clock        	  i2c3_fck                        	                     clock-i2c2-fck                        ti,wait-gate-clock        	  i2c2_fck                        	                     clock-i2c1-fck                        ti,wait-gate-clock        	  i2c1_fck                        	                     clock-mcbsp5-gate-fck                         ti,composite-gate-clock         mcbsp5_gate_fck                     	   
            
      clock-mcbsp1-gate-fck                         ti,composite-gate-clock         mcbsp1_gate_fck                     	   	                  clock-mcspi4-fck                          ti,wait-gate-clock          mcspi4_fck              S        	                     clock-mcspi3-fck                          ti,wait-gate-clock          mcspi3_fck              S        	                     clock-mcspi2-fck                          ti,wait-gate-clock          mcspi2_fck              S        	                     clock-mcspi1-fck                          ti,wait-gate-clock          mcspi1_fck              S        	                     clock-uart2-fck                       ti,wait-gate-clock        
  uart2_fck               S        	                     clock-uart1-fck                       ti,wait-gate-clock        
  uart1_fck               S        	                     clock-hdq-fck                         ti,wait-gate-clock          hdq_fck             T        	                     clock-modem-fck                       ti,omap3-interface-clock          
  modem_fck               "        	                     clock-mspro-fck                       ti,wait-gate-clock        
  mspro_fck                       	         clock-ssi-ssr-gate-fck-3430es2                         ti,composite-no-wait-gate-clock         ssi_ssr_gate_fck_3430es2                #        	                ~      clock-mmchs3-fck                          ti,wait-gate-clock          mmchs3_fck                      	                        gpt10_fck                         ti,composite-clock              U   V      gpt11_fck                         ti,composite-clock              W   X      core_96m_fck                          fixed-factor-clock              Y                                        core_48m_fck                          fixed-factor-clock              9                                  S      core_12m_fck                          fixed-factor-clock              Z                                  T      core_l3_ick                       fixed-factor-clock              G                                  [      clock@a10         
    ti,clksel              
                           clock-sdrc-ick                        ti,wait-gate-clock        	  sdrc_ick                [        	                     clock-mmchs2-ick                          ti,omap3-interface-clock            mmchs2_ick              \        	                     clock-mmchs1-ick                          ti,omap3-interface-clock            mmchs1_ick              \        	                     clock-hdq-ick                         ti,omap3-interface-clock            hdq_ick             \        	                     clock-mcspi4-ick                          ti,omap3-interface-clock            mcspi4_ick              \        	                     clock-mcspi3-ick                          ti,omap3-interface-clock            mcspi3_ick              \        	                     clock-mcspi2-ick                          ti,omap3-interface-clock            mcspi2_ick              \        	                     clock-mcspi1-ick                          ti,omap3-interface-clock            mcspi1_ick              \        	                     clock-i2c3-ick                        ti,omap3-interface-clock          	  i2c3_ick                \        	                     clock-i2c2-ick                        ti,omap3-interface-clock          	  i2c2_ick                \        	                     clock-i2c1-ick                        ti,omap3-interface-clock          	  i2c1_ick                \        	                     clock-uart2-ick                       ti,omap3-interface-clock          
  uart2_ick               \        	                     clock-uart1-ick                       ti,omap3-interface-clock          
  uart1_ick               \        	                     clock-gpt11-ick                       ti,omap3-interface-clock          
  gpt11_ick               \        	                     clock-gpt10-ick                       ti,omap3-interface-clock          
  gpt10_ick               \        	                     clock-mcbsp5-ick                          ti,omap3-interface-clock            mcbsp5_ick              \        	   
                  clock-mcbsp1-ick                          ti,omap3-interface-clock            mcbsp1_ick              \        	   	                  clock-omapctrl-ick                        ti,omap3-interface-clock            omapctrl_ick                \        	                     clock-aes2-ick                        ti,omap3-interface-clock          	  aes2_ick                \        	                     clock-sha12-ick                       ti,omap3-interface-clock          
  sha12_ick               \        	                     clock-icr-ick                         ti,omap3-interface-clock            icr_ick             \        	         clock-des2-ick                        ti,omap3-interface-clock          	  des2_ick                \        	         clock-mspro-ick                       ti,omap3-interface-clock          
  mspro_ick               \        	         clock-mailboxes-ick                       ti,omap3-interface-clock            mailboxes_ick               \        	         clock-sad2d-ick                       ti,omap3-interface-clock          
  sad2d_ick               G        	                     clock-hsotgusb-ick-3430es2                    "    ti,omap3-hsotgusb-interface-clock           hsotgusb_ick_3430es2                [        	                     clock-ssi-ick-3430es2                         ti,omap3-ssi-interface-clock            ssi_ick_3430es2             ]        	                     clock-mmchs3-ick                          ti,omap3-interface-clock            mmchs3_ick              \        	                        gpmc_fck                          fixed-factor-clock              [                            core_l4_ick                       fixed-factor-clock              I                                  \      clock@e00         
    ti,clksel                                          clock-dss-tv-fck                          ti,gate-clock           dss_tv_fck              A        	                     clock-dss-96m-fck                         ti,gate-clock           dss_96m_fck             Y        	                     clock-dss2-alwon-fck                          ti,gate-clock           dss2_alwon_fck              "        	                     clock-dss1-alwon-fck-3430es2                          ti,dss-gate-clock           dss1_alwon_fck_3430es2              ^        	                                  dummy_ck                          fixed-clock         W          clock@c00         
    ti,clksel                                          clock-gpt1-gate-fck                       ti,composite-gate-clock         gpt1_gate_fck               "        	                `      clock-gpio1-dbck                          ti,gate-clock           gpio1_dbck              _        	                     clock-wdt2-fck                        ti,wait-gate-clock        	  wdt2_fck                _        	                     clock-sr1-fck                         ti,wait-gate-clock          sr1_fck             "        	                    clock-sr2-fck                         ti,wait-gate-clock          sr2_fck             "        	                    clock-usim-gate-fck                       ti,composite-gate-clock         usim_gate_fck               Y        	   	                     gpt1_fck                          ti,composite-clock              `   a           	      wkup_32k_fck                          fixed-factor-clock              H                                  _      clock@c10         
    ti,clksel                                         clock-wdt2-ick                        ti,omap3-interface-clock          	  wdt2_ick                b        	                     clock-wdt1-ick                        ti,omap3-interface-clock          	  wdt1_ick                b        	                     clock-gpio1-ick                       ti,omap3-interface-clock          
  gpio1_ick               b        	                     clock-omap-32ksync-ick                        ti,omap3-interface-clock            omap_32ksync_ick                b        	                     clock-gpt12-ick                       ti,omap3-interface-clock          
  gpt12_ick               b        	                     clock-gpt1-ick                        ti,omap3-interface-clock          	  gpt1_ick                b        	                      clock-usim-ick                        ti,omap3-interface-clock          	  usim_ick                b        	   	                     per_96m_fck                       fixed-factor-clock              2                                  	      per_48m_fck                       fixed-factor-clock              9                                  c      clock@1000        
    ti,clksel                                          clock-uart3-fck                       ti,wait-gate-clock        
  uart3_fck               c        	                     clock-gpt2-gate-fck                       ti,composite-gate-clock         gpt2_gate_fck               "        	               e      clock-gpt3-gate-fck                       ti,composite-gate-clock         gpt3_gate_fck               "        	               g      clock-gpt4-gate-fck                       ti,composite-gate-clock         gpt4_gate_fck               "        	               i      clock-gpt5-gate-fck                       ti,composite-gate-clock         gpt5_gate_fck               "        	               k      clock-gpt6-gate-fck                       ti,composite-gate-clock         gpt6_gate_fck               "        	               m      clock-gpt7-gate-fck                       ti,composite-gate-clock         gpt7_gate_fck               "        	               o      clock-gpt8-gate-fck                       ti,composite-gate-clock         gpt8_gate_fck               "        	   	            q      clock-gpt9-gate-fck                       ti,composite-gate-clock         gpt9_gate_fck               "        	   
            s      clock-gpio6-dbck                          ti,gate-clock           gpio6_dbck              d        	                     clock-gpio5-dbck                          ti,gate-clock           gpio5_dbck              d        	                     clock-gpio4-dbck                          ti,gate-clock           gpio4_dbck              d        	                     clock-gpio3-dbck                          ti,gate-clock           gpio3_dbck              d        	                     clock-gpio2-dbck                          ti,gate-clock           gpio2_dbck              d        	                     clock-wdt3-fck                        ti,wait-gate-clock        	  wdt3_fck                d        	                     clock-mcbsp2-gate-fck                         ti,composite-gate-clock         mcbsp2_gate_fck                     	                      clock-mcbsp3-gate-fck                         ti,composite-gate-clock         mcbsp3_gate_fck                     	                     clock-mcbsp4-gate-fck                         ti,composite-gate-clock         mcbsp4_gate_fck                     	                     clock-uart4-fck                       ti,wait-gate-clock        
  uart4_fck               c        	                        clock@1040        
    ti,clksel              @                           clock-gpt2-mux-fck                        ti,composite-mux-clock          gpt2_mux_fck                H   "            f      clock-gpt3-mux-fck                        ti,composite-mux-clock          gpt3_mux_fck                H   "        	               h      clock-gpt4-mux-fck                        ti,composite-mux-clock          gpt4_mux_fck                H   "        	               j      clock-gpt5-mux-fck                        ti,composite-mux-clock          gpt5_mux_fck                H   "        	               l      clock-gpt6-mux-fck                        ti,composite-mux-clock          gpt6_mux_fck                H   "        	               n      clock-gpt7-mux-fck                        ti,composite-mux-clock          gpt7_mux_fck                H   "        	               p      clock-gpt8-mux-fck                        ti,composite-mux-clock          gpt8_mux_fck                H   "        	               r      clock-gpt9-mux-fck                        ti,composite-mux-clock          gpt9_mux_fck                H   "        	               t         gpt2_fck                          ti,composite-clock              e   f           
      gpt3_fck                          ti,composite-clock              g   h      gpt4_fck                          ti,composite-clock              i   j      gpt5_fck                          ti,composite-clock              k   l      gpt6_fck                          ti,composite-clock              m   n      gpt7_fck                          ti,composite-clock              o   p      gpt8_fck                          ti,composite-clock              q   r      gpt9_fck                          ti,composite-clock              s   t      per_32k_alwon_fck                         fixed-factor-clock              H                                  d      per_l4_ick                        fixed-factor-clock              I                                  u      clock@1010        
    ti,clksel                                         clock-gpio6-ick                       ti,omap3-interface-clock          
  gpio6_ick               u        	                     clock-gpio5-ick                       ti,omap3-interface-clock          
  gpio5_ick               u        	                     clock-gpio4-ick                       ti,omap3-interface-clock          
  gpio4_ick               u        	                     clock-gpio3-ick                       ti,omap3-interface-clock          
  gpio3_ick               u        	                     clock-gpio2-ick                       ti,omap3-interface-clock          
  gpio2_ick               u        	                     clock-wdt3-ick                        ti,omap3-interface-clock          	  wdt3_ick                u        	                     clock-uart3-ick                       ti,omap3-interface-clock          
  uart3_ick               u        	                     clock-uart4-ick                       ti,omap3-interface-clock          
  uart4_ick               u        	                     clock-gpt9-ick                        ti,omap3-interface-clock          	  gpt9_ick                u        	   
                  clock-gpt8-ick                        ti,omap3-interface-clock          	  gpt8_ick                u        	   	                  clock-gpt7-ick                        ti,omap3-interface-clock          	  gpt7_ick                u        	                     clock-gpt6-ick                        ti,omap3-interface-clock          	  gpt6_ick                u        	                     clock-gpt5-ick                        ti,omap3-interface-clock          	  gpt5_ick                u        	                     clock-gpt4-ick                        ti,omap3-interface-clock          	  gpt4_ick                u        	                     clock-gpt3-ick                        ti,omap3-interface-clock          	  gpt3_ick                u        	                     clock-gpt2-ick                        ti,omap3-interface-clock          	  gpt2_ick                u        	                     clock-mcbsp2-ick                          ti,omap3-interface-clock            mcbsp2_ick              u        	                      clock-mcbsp3-ick                          ti,omap3-interface-clock            mcbsp3_ick              u        	                     clock-mcbsp4-ick                          ti,omap3-interface-clock            mcbsp4_ick              u        	                        emu_src_ck                        ti,clkdm-gate-clock             v            *      secure_32k_fck                        fixed-clock         W               w      gpt12_fck                         fixed-factor-clock              w                                       wdt1_fck                          fixed-factor-clock              w                            security_l4_ick2                          fixed-factor-clock              I                                  x      clock@a14         
    ti,clksel              
                           clock-aes1-ick                        ti,omap3-interface-clock          	  aes1_ick                x        	                     clock-rng-ick                         ti,omap3-interface-clock            rng_ick             x        	                    clock-sha11-ick                       ti,omap3-interface-clock          
  sha11_ick               x        	         clock-des1-ick                        ti,omap3-interface-clock          	  des1_ick                x        	          clock-pka-ick                         ti,omap3-interface-clock            pka_ick             y        	            clock@f00         
    ti,clksel                                          clock-cam-mclk                        ti,gate-clock         	  cam_mclk                z        	                   clock-csi2-96m-fck                        ti,gate-clock           csi2_96m_fck                        	                        cam_ick@f10                   !    ti,omap3-no-wait-interface-clock                I                   	                      security_l3_ick                       fixed-factor-clock              G                                  y      ssi_l4_ick                        fixed-factor-clock              I                                  ]      sr_l4_ick                         fixed-factor-clock              I                            dpll2_fck@40                          ti,divider-clock                /        	           g               @         r            {      dpll2_ck@4                        ti,omap3-dpll-clock             "   {               $   @   4                                       |      dpll2_m2_ck@44                        ti,divider-clock                |        g               D         r            }      iva2_ck@0                         ti,wait-gate-clock              }                     	                      clock@a18         
    ti,clksel              
                           clock-mad2d-ick                       ti,omap3-interface-clock          
  mad2d_ick               G        	                     clock-usbtll-ick                          ti,omap3-interface-clock            usbtll_ick              \        	                        ssi_ssr_fck_3430es2                       ti,composite-clock              ~                     ssi_sst_fck_3430es2                       fixed-factor-clock                                                     sys_d2_ck                         fixed-factor-clock              "                                  J      omap_96m_d2_fck                       fixed-factor-clock              Y                                  K      omap_96m_d4_fck                       fixed-factor-clock              Y                                  L      omap_96m_d8_fck                       fixed-factor-clock              Y                                  M      omap_96m_d10_fck                          fixed-factor-clock              Y                      
            N      dpll5_m2_d4_ck                        fixed-factor-clock                                                O      dpll5_m2_d8_ck                        fixed-factor-clock                                                P      dpll5_m2_d16_ck                       fixed-factor-clock                                                Q      dpll5_m2_d20_ck                       fixed-factor-clock                                                R      usim_fck                          ti,composite-clock                       dpll5_ck@d04                          ti,omap3-dpll-clock             "   "             $  L  4                                    dpll5_m2_ck@d50                       ti,divider-clock                        g              P         r                  sgx_gate_fck@b00                          ti,composite-gate-clock             /        	                                 core_d3_ck                        fixed-factor-clock              /                                        core_d4_ck                        fixed-factor-clock              /                                        core_d6_ck                        fixed-factor-clock              /                                        omap_192m_alwon_fck                       fixed-factor-clock              &                                        core_d2_ck                        fixed-factor-clock              /                                        sgx_mux_fck@b40                       ti,composite-mux-clock                        3                       @                  sgx_fck                       ti,composite-clock                                  sgx_ick@b10                       ti,wait-gate-clock              G                   	                      cpefuse_fck@a08                       ti,gate-clock               "           
        	                      ts_fck@a08                        ti,gate-clock               H           
        	                     usbtll_fck@a08                        ti,wait-gate-clock                         
        	                     dss_ick_3430es2@e10                       ti,omap3-dss-interface-clock                I                   	                      usbhost_120m_fck@1400                         ti,gate-clock                                   	                     usbhost_48m_fck@1400                          ti,dss-gate-clock               9                    	                      usbhost_ick@1410                          ti,omap3-dss-interface-clock                I                   	                         clockdomains       core_l3_clkdm             ti,clockdomain                       dpll3_clkdm           ti,clockdomain                    dpll1_clkdm           ti,clockdomain                    per_clkdm             ti,clockdomain        l                                                                                          emu_clkdm             ti,clockdomain              *      dpll4_clkdm           ti,clockdomain                     wkup_clkdm            ti,clockdomain        $                                    dss_clkdm             ti,clockdomain                                core_l4_clkdm             ti,clockdomain                                                                                                                                cam_clkdm             ti,clockdomain                       iva2_clkdm            ti,clockdomain                    dpll2_clkdm           ti,clockdomain              |      d2d_clkdm             ti,clockdomain                          dpll5_clkdm           ti,clockdomain                    sgx_clkdm             ti,clockdomain                    usbhost_clkdm             ti,clockdomain                                target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  rev sysc            -                   _            fck ick                      +                H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc            '                    H                        target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           rev sysc syss              #        2                  -                  ;               [         ick                      +                H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma                                                @           K            X   `                     gpio@48310000             ti,omap3-gpio            H1                          gpio1            e         w                    '                   wdefault                              gpio@49050000             ti,omap3-gpio            I                          gpio2            w                    '                 gpio@49052000             ti,omap3-gpio            I                          gpio3            w                    '                 gpio@49054000             ti,omap3-gpio            I@                          gpio4            w                    '                   wdefault                              gpio@49056000             ti,omap3-gpio            I`                !         gpio5            w                    '                   wdefault                             gpio@49058000             ti,omap3-gpio            I                "         gpio6            w                    '                   wdefault                             serial@4806a000           ti,omap3-uart            H                   H        H      1      2        Mtx rx            uart1           Wl         wdefault                  serial@4806c000           ti,omap3-uart            H                  I        H      3      4        Mtx rx            uart2           Wl         wdefault                  serial@49020000           ti,omap3-uart            I                   J        H      5      6        Mtx rx            uart3           Wl         wdefault                  i2c@48070000              ti,omap3-i2c             H                 8                     +             i2c1            W '@        wdefault               twl@48              H                                  ti,twl4030           '                   wdefault                  audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc                    bci           ti,twl4030-bci              	                                    vac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2             *         *               regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1          	'                         regulator-vdac            ti,twl4030-vdac          w@         w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1             :         0                           regulator-vmmc2           ti,twl4030-vmmc2             :         0      regulator-vusb1v5             ti,twl4030-vusb1v5                    regulator-vusb1v8             ti,twl4030-vusb1v8                    regulator-vusb3v1             ti,twl4030-vusb3v1                    regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2             w@         w@      regulator-vsim            ti,twl4030-vsim          w@         -      gpio              ti,twl4030-gpio          w                    '                 twl4030-usb           ti,twl4030-usb              
                                                                            pwm           ti,twl4030-pwm          $         pwmled            ti,twl4030-pwmled           $         pwrbutton             ti,twl4030-pwrbutton                      keypad            ti,twl4030-keypad                       /           ?         madc              ti,twl4030-madc                     R                     regulator-vdd2                       i2c@48072000              ti,omap3-i2c             H                 9                     +             i2c2            W '@        wdefault                  i2c@48060000              ti,omap3-i2c             H                 =                     +             i2c3            W '@        wdefault               gpio@20           microchip,mcp23017           w                                 mailbox@48094000              ti,omap3-mailbox             mailbox          H	@                        d           p                 mbox-dsp                                                    spi@48098000              ti,omap2-mcspi           H	                A                     +             mcspi1                   @  H      #      $      %      &      '      (      )      *         Mtx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3         okay            wdefault                  spi@4809a000              ti,omap2-mcspi           H	                B                     +             mcspi2                      H      +      ,      -      .        Mtx0 rx0 tx1 rx1         okay            wdefault               tsc2046@0                          ti,tsc2046                                       B@                                     wdefault                    ,                    X                     P                      -         8         spi@480b8000              ti,omap2-mcspi           H                [                     +             mcspi3                      H                                Mtx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           H                0                     +             mcspi4                     H      F      G        Mtx0 rx0       1w@480b2000           ti,omap3-1w          H                 :         hdq1w         mmc@4809c000              ti,omap3-hsmmc           H	                S         mmc1             F        H      =      >        Mtx rx           S           `                  i        u                      wdefault                                                mmc@480b4000              ti,omap3-hsmmc           H@                V         mmc2            H      /      0        Mtx rx           okay                       u           `                                  wdefault                    F      mmc@480ad000              ti,omap3-hsmmc           H
                ^         mmc3            H      M      N        Mtx rx         	  disabled          mmu@480bd400                          ti,omap2-iommu           H                         mmu_isp                             mmu@5d000000                          ti,omap2-iommu           ]                           mmu_iva       	  disabled          wdt@48314000              ti,omap3-wdt             H1@          
   wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@            mpu                ;   <        common tx rx                        mcbsp1          H                     Mtx rx                       fck       	  disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           rev sysc syss                       -               ;                       ick                      +                H
         rng@0             ti,omap2-rng                                 4         mcbsp@49022000            ti,omap3-mcbsp           I     I            mpu sidetone                   >   ?           common tx rx sidetone                       mcbsp2 mcbsp2_sidetone          H      !      "        Mtx rx                          fck ick         okay                     mcbsp@49024000            ti,omap3-mcbsp           I@    I            mpu sidetone                   Y   Z           common tx rx sidetone                       mcbsp3 mcbsp3_sidetone          H                    Mtx rx                          fck ick       	  disabled          mcbsp@49026000            ti,omap3-mcbsp           I`            mpu                6   7        common tx rx                        mcbsp4          H                    Mtx rx                       fck                    	  disabled          mcbsp@48096000            ti,omap3-mcbsp           H	`            mpu                Q   R        common tx rx                        mcbsp5          H                    Mtx rx                       fck       	  disabled          sham@480c3000             ti,omap3-sham            sham             H0    d            1        H      E        Mrx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1    H1   H1           rev sysc syss              '        -                  ;              	            fck ick                      +                H1                      %   timer@0           ti,omap3430-timer                              	         fck             %         0        ?  	        O   H         target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            rev sysc syss              '        -                  ;              
            fck ick                      +                I        timer@0           ti,omap3430-timer                               &         timer@49034000            ti,omap3430-timer            I@                '         timer3        timer@49036000            ti,omap3430-timer            I`                (         timer4        timer@49038000            ti,omap3430-timer            I                )         timer5           f      timer@4903a000            ti,omap3430-timer            I                *         timer6           f      timer@4903c000            ti,omap3430-timer            I                +         timer7           f      timer@4903e000            ti,omap3430-timer            I                ,         timer8           s         f      timer@49040000            ti,omap3430-timer            I                 -         timer9           s      timer@48086000            ti,omap3430-timer            H`                .         timer10          s      timer@48088000            ti,omap3430-timer            H                /         timer11          s      target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           rev sysc syss              '        -                  ;                          fck ick                      +                H0@       timer@0           ti,omap3430-timer                               _         0                  usbhstll@48062000             ti,usbhs-tll             H                 N         usb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@             usb_host_hs                      +                     wdefault                            	  ehci-phy       ohci@48064400             ti,ohci-omap3            HD                L               ehci@48064800             ti,ehci-omap             HH                M                   gpmc@6e000000             ti,omap3430-gpmc             gpmc             n                         H              Mrxtx                                               +            '                    w                 0           0                                               nand@0,0              ti,omap2-nand                                                                             bch8                                   #            1            I           [            i   d        {   d                       d           d                      K                      K           d           d           <        -           G             ^        x   2           K                                +      partition@0         MLO                       partition@80000         u-boot                       partition@260000            u-boot-environment            &           partition@280000            kernel            (   P        partition@780000            filesystem            x             ethernet@7,0              smsc,lan9221 smsc,lan9115                                 [   
        i   <        {   <                       
           
           
           <           
           <           d           d           2        -           G            x   K                      K         ^                                       	                                                        wdefault                   	mii       ethernet@4,0              smsc,lan9117 smsc,lan9115                                 [   
        i   A        {   A                       
           
           
           A           
           A           d           d           <        -           G            x   K                      K         ^                                       	                                                         wdefault                   	mii          	         usb_otg_hs@480ab000           ti,omap3-musb            H
                \   ]        mc dma           usb_otg_hs          	3           	>           	F           wdefault                   	O            	^                  	  	fusb2-phy                       	p   2      dss@48050000              ti,omap3-dss             H           	  disabled          	   dss_core                         fck                      +                dispc@48050400            ti,omap3-dispc           H                      
   dss_dispc                        fck       encoder@4804fc00              ti,omap3-dsi             H    H    @H             proto phy pll                     	  disabled          	   dss_dsi1                            fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	  disabled          	   dss_rfbi                            fck ick       encoder@48050c00              ti,omap3-venc            H          	  disabled          	   dss_venc                            fck tv_dac_clk           ssi-controller@48058000           ti,omap3-ssi             ssi         okay             H    H            sys gdd             G        gdd_mpu                      +                                       ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            H    H            tx rx               C   D      ssi-port@4805b000             ti,omap3-ssi-port            H    H            tx rx               E   F         serial@49042000           ti,omap3-uart            I                 P        H      Q      R        Mtx rx            uart4           Wl       	  disabled          regulator-abb-mpu         
    ti,abb-v1           abb_mpu_iva                       +             H0r   H0h           base-address int-address            	v               "        	           	         `  	 s                     O                     7                                                          pinmux@480025a0            ti,omap3-padconf pinctrl-single          H %   \                     +                                   '        <           Z          wdefault    pinmux_hsusb1_2_pins          `     8      :     <     >     @     B     D     F     H     J     L     N                   pinmux_gpio1_pins              Z                        isp@480bc000              ti,omap3-isp             H   H                        	                       	                 ports                        +             bandgap@48002524             H %$             ti,omap36xx-bandgap         	                     target-module@480cb000            ti,sysc-omap3630-sr ti,sysc          smartreflex_core             H8           sysc                        -                              fck                      +                H       smartreflex@0             ti,omap3-smartreflex-core                                        target-module@480c9000            ti,sysc-omap3630-sr ti,sysc          smartreflex_mpu_iva          H8           sysc                        -                              fck                      +                H       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva                                         target-module@50000000            ti,sysc-omap4 ti,sysc            P     P          	  rev sysc            2                  -                                 fck ick                      +                P               opp-table             operating-points-v2-ti-cpu                            opp50-300000000         	             	 s s s s s s        	            
      opp100-600000000            	    #F         	 O O O O O O        	         opp130-800000000            	    /         	 7 7 7 7 7 7        	         opp1g-1000000000            	    ;         	              	            opp_supply            ti,omap-opp-supply          
       thermal-zones      cpu-thermal         
2           
H          
V      N         
c         trips      cpu_alert           
s 8        
           passive                  cpu_crit            
s _        
        	   critical             cooling-maps       map0            
          
                 memory@80000000          memory                       leds          
    gpio-leds      led1            lilly-a83x::led1            c                 
default-on           sound             ti,omap-twl4030         
lilly-a83x          
        vcc3              regulator-fixed         VCC3             2Z         2Z                           hsusb1_phy            usb-nop-xceiv                                              	compatible interrupt-parent #address-cells #size-cells model bootargs i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names ti,bit-shift reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended bci3v1-supply io-channels io-channel-names regulator-always-on usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs status spi-max-frequency pendown-gpio vcc-supply ti,x-min ti,x-max ti,y-min ti,y-max ti,x-plate-ohms ti,pressure-max ti,swap-xy wakeup-source ti,dual-volt pbias-supply cd-gpios cd-inverted vmmc-supply bus-width cap-sdio-irq cap-sd-highspeed cap-mmc-highspeed wp-gpios #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure num-ports port1-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins nand-bus-width ti,nand-ecc-opt gpmc,mux-add-data gpmc,device-width gpmc,wait-pin gpmc,wait-monitoring-ns gpmc,burst-length gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,access-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-delay-ns gpmc,wr-data-mux-bus-ns gpmc,wr-access-ns label bank-width gpmc,cycle2cycle-diffcsen vddvario-supply vdd33a-supply reg-io-width phy-mode smsc,force-internal-phy multipoint num-eps ram-bits interface-type usb-phy phy-names power ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device linux,default-trigger ti,model ti,mcbsp 