  ^   8  YH   (            =  Y                                                                  (   ,haoyu,marsboard-rk3066 rockchip,rk3066a          7MarsBoard RK3066       aliases          =/ethernet@10204000           G/i2c@2002d000            L/i2c@2002f000            Q/i2c@20056000            V/i2c@2005a000            [/i2c@2005e000            `/serial@10124000             h/serial@10126000             p/serial@20064000             x/serial@20068000             /spi@20070000            /spi@20074000            /mmc@10214000         oscillator           ,fixed-clock          n6                       xin24m              E      gpu@10090000          "   ,rockchip,rk3066-mali arm,mali-400            	                                	   bus core                                           x      	  
disabled          x                                                                                                            5  gp gpmmu pp0 ppmmu0 pp1 ppmmu1 pp2 ppmmu2 pp3 ppmmu3            ,            video-codec@10104000             ,rockchip,rk3066-vpu          @                   	          
         
  vepu vdpu                                         (   aclk_vdpu hclk_vdpu aclk_vepu hclk_vepu         ,            cache-controller@10138000            ,arm,pl310-cache                       :        H               8      scu@1013c000             ,arm,cortex-a9-scu                      global-timer@1013c200            ,arm,cortex-a9-global-timer                                                     local-timer@1013c600             ,arm,cortex-a9-twd-timer                                                    interrupt-controller@1013d000            ,arm,cortex-a9-gic            T        i                                      serial@10124000       &   ,rockchip,rk3066-uart snps,dw-apb-uart            @                   "           z                       baudclk apb_pclk                   @     L        
okay                                 tx rx           default                  serial@10126000       &   ,rockchip,rk3066-uart snps,dw-apb-uart            `                   #           z                       baudclk apb_pclk                   A     M        
okay                                tx rx           default                  qos@1012d000             ,rockchip,rk3066-qos syscon                            !      qos@1012e000             ,rockchip,rk3066-qos syscon                                   qos@1012f000             ,rockchip,rk3066-qos syscon                                  qos@1012f080             ,rockchip,rk3066-qos syscon                                 qos@1012f100             ,rockchip,rk3066-qos syscon                                  qos@1012f180             ,rockchip,rk3066-qos syscon                                 qos@1012f200             ,rockchip,rk3066-qos syscon                                  qos@1012f280             ,rockchip,rk3066-qos syscon                                 usb@10180000             ,rockchip,rk3066-usb snps,dwc2                                                          otg         otg                                          @   @                     	  usb2-phy            
okay          usb@101c0000          
   ,snps,dwc2                                                          otg         host                     	  usb2-phy            
okay          ethernet@10204000            ,rockchip,rk3066-emac              @    <                                                       	                    D         hclk macref            d        rmii            
okay               
        #           default                     ethernet-phy@0                                                     
         mmc@10214000             ,rockchip,rk2928-dw-mshc          !@                                          H         biu ciu                       rx-tx           .                 Q        9reset           
okay                     E        default                             S         mmc@10218000             ,rockchip,rk2928-dw-mshc          !                                          I         biu ciu                       rx-tx           .                 R        9reset         	  
disabled            default                           mmc@1021c000             ,rockchip,rk2928-dw-mshc          !                                          J         biu ciu                       rx-tx           .                 S        9reset         	  
disabled          nand-controller@10500000             ,rockchip,rk2928-nfc          P    @                                          ahb       	  
disabled          pmu@20004000          &   ,rockchip,rk3066-pmu syscon simple-mfd              @       reboot-mode          ,syscon-reboot-mode          _   @        fRB         rRB        RB	        RB      power-controller          !   ,rockchip,rk3066-power-controller                                                        power-domain@7                                                               P                 O                                                                                  power-domain@6                                                                            power-domain@8                                        !                        grf@20008000          &   ,rockchip,rk3066-grf syscon simple-mfd                              	   usbphy           ,rockchip,rk3066a-usb-phy                                      
okay       usb-phy@17c            |               Q         phyclk                                             usb-phy@188                           R         phyclk                                                   dma-controller@20018000          ,arm,pl330 arm,primecell              @                                                                                	   apb_pclk                      dma-controller@2001c000          ,arm,pl330 arm,primecell              @                                                                                	   apb_pclk          	  
disabled          i2c@2002d000             ,rockchip,rk3066-i2c                              (                                        	         i2c               P      	  
disabled            default            "      i2c@2002f000             ,rockchip,rk3066-i2c                              )                                        	              Q         i2c         
okay            default            #             tps@2d              -            $                         %           %           %        #   %        /   &        ;   &        G   %        S   %         ,ti,tps65910    regulators                               regulator@0         `vcc_rtc          o                     vrtc          regulator@1         `vcc_io           o                    vio             &      regulator@2         `vdd_arm          	'         `                  o                    vdd1                9      regulator@3         `vcc_ddr          	'         `                  o                    vdd2          regulator@5       
  `vcc18_cif            o                    vdig1         regulator@6         `vdd_11           o                    vdig2         regulator@7         `vcc_25           o                    vpll          regulator@8         `vcc_18           o                    vdac          regulator@9         `vcc25_hdmi           o            	        vaux1         regulator@10            `vcca_33          o            
        vaux2         regulator@11          	  `vcc_rmii                        vaux33                    regulator@12          
  `vcc28_cif            o                    vmmc          regulator@4                     vdd3          regulator@13                        vbb                pwm@20030000             ,rockchip,rk2928-pwm                                         F      	  
disabled            default            '      pwm@20030010             ,rockchip,rk2928-pwm                                        F      	  
disabled            default            (      watchdog@2004c000             ,rockchip,rk3066-wdt snps,dw-wdt                             K               3           
okay          pwm@20050020             ,rockchip,rk2928-pwm                                         G      	  
disabled            default            )      pwm@20050030             ,rockchip,rk2928-pwm            0                            G        
okay            default            *            H      i2c@20056000             ,rockchip,rk3066-i2c           `                   *                                        	              R         i2c       	  
disabled            default            +      i2c@2005a000             ,rockchip,rk3066-i2c                              +                                        	              S         i2c       	  
disabled            default            ,      i2c@2005e000             ,rockchip,rk3066-i2c                              4                                        	              T         i2c       	  
disabled            default            -      serial@20064000       &   ,rockchip,rk3066-uart snps,dw-apb-uart             @                   $           z                       baudclk apb_pclk                   B     N        
okay                                tx rx           default            .      serial@20068000       &   ,rockchip,rk3066-uart snps,dw-apb-uart                                %           z                       baudclk apb_pclk                   C     O        
okay                        	        tx rx           default            /      saradc@2006c000          ,rockchip,saradc                                                           G     J         saradc apb_pclk               W        9saradc-apb        	  
disabled          spi@20070000             ,rockchip,rk3066-spi                E     H         spiclk apb_pclk                &                                                          
              tx rx         	  
disabled            default            0   1   2   3      spi@20074000             ,rockchip,rk3066-spi                F     I         spiclk apb_pclk                '             @                                                          tx rx         	  
disabled            default            4   5   6   7      dma-controller@20078000          ,arm,pl330 arm,primecell              @                                                                               	   apb_pclk                      cpus                                      rockchip,rk3066-smp    cpu@0           cpu          ,arm,cortex-a9              8                   8  " @   O  a * s * 	'     g8        3  @                       A   9      cpu@1           cpu          ,arm,cortex-a9              8                    A   9         display-subsystem            ,rockchip,display-subsystem          L   :   ;      sram@10080000         
   ,mmio-sram                                                  R            smp-sram@0           ,rockchip,rk3066-smp-sram                    P         vop@1010c000             ,rockchip,rk3066-vop                                                                  aclk_vop dclk_vop hclk_vop          ,                    d      e      f        9axi ahb dclk          	  
disabled       port                                          :   endpoint@0                       Y   <            @            vop@1010e000             ,rockchip,rk3066-vop                                                                  aclk_vop dclk_vop hclk_vop          ,                    g      h      i        9axi ahb dclk          	  
disabled       port                                          ;   endpoint@0                       Y   =            A            hdmi@10116000            ,rockchip,rk3066-hdmi             `                    @                          hclk            default            >   ?        ,                 	      	  
disabled       ports                                port@0                                            endpoint@0                       Y   @            <      endpoint@1                      Y   A            =         port@1                          i2s@10118000             ,rockchip,rk3066-i2s                                         default            B               K              i2s_clk i2s_hclk                                tx rx           i                                	  
disabled          i2s@1011a000             ,rockchip,rk3066-i2s                                          default            C               L              i2s_clk i2s_hclk                                tx rx           i                                	  
disabled          i2s@1011c000             ,rockchip,rk3066-i2s                                         default            D               M              i2s_clk i2s_hclk                  	      
        tx rx           i                                	  
disabled          clock-controller@20000000            ,rockchip,rk3066a-cru                                E         xin24m             	                             @                               ^                _          ׄ #g рxh рxh                  timer@2000e000           ,snps,dw-apb-timer                                 .                  V     D         timer pclk        efuse@20010000           ,rockchip,rk3066a-efuse                @                                        [         pclk_efuse     cpu_leakage@17                          timer@20038000           ,snps,dw-apb-timer                                ,                  T     B         timer pclk        timer@2003a000           ,snps,dw-apb-timer                                -                  U     C         timer pclk        tsadc@20060000           ,rockchip,rk3066-tsadc                                 ]     ]         saradc apb_pclk                                            \        9saradc-apb        	  
disabled          pinctrl          ,rockchip,rk3066a-pinctrl               	                                  R   gpio@20034000            ,rockchip,gpio-bank            @                   6                 U                             T        i         gpio@2003c000            ,rockchip,gpio-bank                               7                 V                             T        i                     gpio@2003e000            ,rockchip,gpio-bank                               8                 W                             T        i         gpio@20080000            ,rockchip,gpio-bank                                9                 X                             T        i               I      gpio@20084000            ,rockchip,gpio-bank            @                   :                 Y                             T        i         gpio@2000a000            ,rockchip,gpio-bank                                <                 Z                             T        i               $      pcfg-pull-default                        G      pcfg-pull-none                       F      emac       emac-xfer                       F            F            F            F            F            F            F            F                  emac-mdio                        F            F                     emmc       emmc-clk                        G      emmc-cmd                  	      G      emmc-rst                  
      G         hdmi       hdmi-hpd                          G            ?      hdmii2c-xfer                          F             F            >         i2c0       i2c0-xfer                        F            F            "         i2c1       i2c1-xfer                        F            F            #         i2c2       i2c2-xfer                         F            F            +         i2c3       i2c3-xfer                        F            F            ,         i2c4       i2c4-xfer                        F            F            -         pwm0       pwm0-out                         F            '         pwm1       pwm1-out                         F            (         pwm2       pwm2-out                         F            )         pwm3       pwm3-out                         F            *         spi0       spi0-clk                        G            0      spi0-cs0                        G            3      spi0-tx                     G            1      spi0-rx                     G            2      spi0-cs1                        G         spi1       spi1-clk                        G            4      spi1-cs0                        G            7      spi1-rx                     G            6      spi1-tx                     G            5      spi1-cs1                        G         uart0      uart0-xfer                        G            G                  uart0-cts                       G      uart0-rts                       G         uart1      uart1-xfer                       G            G                  uart1-cts                       G      uart1-rts                       G         uart2      uart2-xfer                       G      	      G            .         uart3      uart3-xfer                       G            G            /      uart3-cts                       G      uart3-rts                       G         sd0    sd0-clk                     G                  sd0-cmd               	      G                  sd0-cd                      G                  sd0-wp                      G      sd0-bus-width1                
      G      sd0-bus-width4        @        
      G            G            G            G                     sd1    sd1-clk                     G                  sd1-cmd                     G                  sd1-cd                      G                  sd1-wp                      G      sd1-bus-width1                      G      sd1-bus-width4        @              G            G            G            G                     i2s0       i2s0-bus                         G             G       	      G       
      G             G             G             G             G             G            B         i2s1       i2s1-bus          `               G             G             G             G             G             G            C         i2s2       i2s2-bus          `               G             G             G             G             G             G            D         lan8720a       phy-int                      F                        memory@60000000         memory           `   @         vdd-log          ,pwm-regulator           	   H              `vdd_log          O         O         o         B@   d O   *        
okay          sdmmc-regulator          ,regulator-fixed         `sdmmc-supply             -         -           I              !         2   &                  vsys-regulator           ,regulator-fixed         `vsys             LK@         LK@                     %         	#address-cells #size-cells interrupt-parent compatible model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 serial0 serial1 serial2 serial3 spi0 spi1 mmc0 clock-frequency #clock-cells clock-output-names phandle reg clocks clock-names assigned-clocks assigned-clock-rates resets status interrupts interrupt-names power-domains cache-unified cache-level interrupt-controller #interrupt-cells reg-shift reg-io-width dmas dma-names pinctrl-names pinctrl-0 dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names rockchip,grf max-speed phy-mode phy phy-supply fifo-depth reset-names max-frequency vmmc-supply offset mode-normal mode-recovery mode-bootloader mode-loader #power-domain-cells pm_qos #phy-cells #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vccio-supply regulator-name regulator-always-on regulator-compatible regulator-min-microvolt regulator-max-microvolt regulator-boot-on #pwm-cells #io-channel-cells enable-method device_type next-level-cache operating-points clock-latency cpu-supply ports ranges remote-endpoint rockchip,playback-channels rockchip,capture-channels #sound-dai-cells #reset-cells gpio-controller #gpio-cells bias-pull-pin-default bias-disable rockchip,pins pwms voltage-table gpio startup-delay-us vin-supply 