  ]   8  W   (            {  V                                                                  .   ,rockchip,px3-evb rockchip,px3 rockchip,rk3188            7Rockchip PX3-EVB       aliases          =/ethernet@10204000           G/i2c@2002d000            L/i2c@2002f000            Q/i2c@20056000            V/i2c@2005a000            [/i2c@2005e000            `/serial@10124000             h/serial@10126000             p/serial@20064000             x/serial@20068000             /spi@20070000            /spi@20074000            /mmc@10214000            /mmc@1021c000         oscillator           ,fixed-clock          n6                       xin24m              8      gpu@10090000          "   ,rockchip,rk3188-mali arm,mali-400            	                                	   bus core                                           x      	  disabled          x                                                                                                            5  !gp gpmmu pp0 ppmmu0 pp1 ppmmu1 pp2 ppmmu2 pp3 ppmmu3            1            video-codec@10104000          (   ,rockchip,rk3188-vpu rockchip,rk3066-vpu          @                   	          
         
  !vepu vdpu                                         (   aclk_vdpu hclk_vdpu aclk_vepu hclk_vepu         1            cache-controller@10138000            ,arm,pl310-cache                       ?        M               0      scu@1013c000             ,arm,cortex-a9-scu                      global-timer@1013c200            ,arm,cortex-a9-global-timer                                                     	  disabled          local-timer@1013c600             ,arm,cortex-a9-twd-timer                                                    interrupt-controller@1013d000            ,arm,cortex-a9-gic            Y        n                                      serial@10124000       &   ,rockchip,rk3188-uart snps,dw-apb-uart            @                   "                                  baudclk apb_pclk                   @     L        okay            default                  serial@10126000       &   ,rockchip,rk3188-uart snps,dw-apb-uart            `                   #                                  baudclk apb_pclk                   A     M        okay            default                  qos@1012d000             ,rockchip,rk3066-qos syscon                                  qos@1012e000             ,rockchip,rk3066-qos syscon                                  qos@1012f000             ,rockchip,rk3066-qos syscon                                  qos@1012f080             ,rockchip,rk3066-qos syscon                                 qos@1012f100             ,rockchip,rk3066-qos syscon                                  qos@1012f180             ,rockchip,rk3066-qos syscon                                 qos@1012f200             ,rockchip,rk3066-qos syscon                      qos@1012f280             ,rockchip,rk3066-qos syscon                                 usb@10180000             ,rockchip,rk3066-usb snps,dwc2                                                          otg         otg                                          @   @                     	  usb2-phy            okay          usb@101c0000          
   ,snps,dwc2                                                          otg         host                     	  usb2-phy            okay          ethernet@10204000            ,rockchip,rk3188-emac              @    <                                                                           D         hclk macref            d        rmii          	  disabled          mmc@10214000             ,rockchip,rk2928-dw-mshc          !@                                          H         biu ciu            	           rx-tx           $                 Q        /reset           okay            default            
                 ;           G            Q         c         t      mmc@10218000             ,rockchip,rk2928-dw-mshc          !                                          I         biu ciu            	           rx-tx           $                 R        /reset         	  disabled          mmc@1021c000             ,rockchip,rk2928-dw-mshc          !                                          J         biu ciu            	           rx-tx           $                 S        /reset           okay            G            Q                 default                        nand-controller@10500000             ,rockchip,rk2928-nfc          P    @                                          ahb       	  disabled          pmu@20004000          &   ,rockchip,rk3066-pmu syscon simple-mfd              @                9   reboot-mode          ,syscon-reboot-mode             @        RB         RB        RB	        RB      power-controller          !   ,rockchip,rk3188-power-controller                                                        power-domain@7                    h                                           O                                                                          power-domain@6                                                                           power-domain@8                                                                grf@20008000          &   ,rockchip,rk3188-grf syscon simple-mfd                                 io-domains        "   ,rockchip,rk3188-io-voltage-domain         	  disabled          usbphy           ,rockchip,rk3188-usb-phy                                   okay       usb-phy@10c                           Q         phyclk                                             usb-phy@11c                           R         phyclk                                                   dma-controller@20018000          ,arm,pl330 arm,primecell              @                                                                                	   apb_pclk                6      dma-controller@2001c000          ,arm,pl330 arm,primecell              @                                                                                	   apb_pclk          	  disabled          i2c@2002d000             ,rockchip,rk3188-i2c                              (                                                 i2c               P        okay            default               accelerometer@18             ,bosch,bma250                                                   i2c@2002f000             ,rockchip,rk3188-i2c                              )                                                      Q         i2c         okay            default                         pmic@1c          ,rockchip,rk818                                                 -         N                     xin32k rk808-clkout2            \           h           t                                                             regulators     DCDC_REG1                              q         p        vdd_arm             2   regulator-state-mem          !         DCDC_REG2                              P                 vdd_gpu    regulator-state-mem          :        R B@         DCDC_REG3                             vcc_ddr    regulator-state-mem          :         DCDC_REG4                              2Z         2Z        vcc_io                 regulator-state-mem          :        R 2Z         LDO_REG1             2Z         2Z        vcc_cif       LDO_REG2                               2Z         2Z        vcc_jetta33       LDO_REG3                               B@         B@        vdd_10     regulator-state-mem          :        R B@         LDO_REG4             w@         w@        lvds_12       LDO_REG5             w@         2Z        lvds_25       LDO_REG6             B@         B@        cif_18        LDO_REG7             w@         2Z        vcc_sd                 regulator-state-mem          :        R 2Z         LDO_REG8             w@         2Z        wl_18         SWITCH_REG          lcd_33                 pwm@20030000             ,rockchip,rk2928-pwm                        n                 F      	  disabled            default                  pwm@20030010             ,rockchip,rk2928-pwm                       n                 F        okay            default                  watchdog@2004c000             ,rockchip,rk3188-wdt snps,dw-wdt                             K               3           okay          pwm@20050020             ,rockchip,rk2928-pwm                        n                 G        okay            default                   pwm@20050030             ,rockchip,rk2928-pwm            0           n                 G        okay            default            !      i2c@20056000             ,rockchip,rk3188-i2c           `                   *                                                      R         i2c       	  disabled            default            "   touchscreen@40           ,silead,gsl1680              @            #                      y                                                    i2c@2005a000             ,rockchip,rk3188-i2c                              +                                                      S         i2c       	  disabled            default            $      i2c@2005e000             ,rockchip,rk3188-i2c                              4                                                      T         i2c       	  disabled            default            %      serial@20064000       &   ,rockchip,rk3188-uart snps,dw-apb-uart             @                   $                                  baudclk apb_pclk                   B     N        okay            default            &      serial@20068000       &   ,rockchip,rk3188-uart snps,dw-apb-uart                                %                                  baudclk apb_pclk                   C     O        okay            default            '      saradc@2006c000          ,rockchip,saradc                                                           G     J         saradc apb_pclk               W        /saradc-apb        	  disabled          spi@20070000          (   ,rockchip,rk3188-spi rockchip,rk3066-spi                E     H         spiclk apb_pclk                &                                                       	   
   	           tx rx         	  disabled            default            (   )   *   +      spi@20074000          (   ,rockchip,rk3188-spi rockchip,rk3066-spi                F     I         spiclk apb_pclk                '             @                                         	      	           tx rx         	  disabled            default            ,   -   .   /      dma-controller@20078000          ,arm,pl330 arm,primecell              @                                                                               	   apb_pclk                	      cpus                                      rockchip,rk3066-smp    cpu@0           cpu          ,arm,cortex-a9              0                       @                       	   1                         2      cpu@1           cpu          ,arm,cortex-a9              0                    	   1                         2      cpu@2           cpu          ,arm,cortex-a9              0                    	   1                         2      cpu@3           cpu          ,arm,cortex-a9              0                    	   1                         2         opp-table-0          ,operating-points-v2          (            1   opp-312000000           3             : Y        H  @      opp-504000000           3    
n         : H      opp-600000000           3    #F         : ~         Y      opp-816000000           3    0,         :       opp-1008000000          3    <         : g8      opp-1200000000          3    G         : 0      opp-1416000000          3    Tfr         :       opp-1608000000          3    _"         : p         display-subsystem            ,rockchip,display-subsystem          e   3   4      sram@10080000         
   ,mmio-sram                                                  k            smp-sram@0           ,rockchip,rk3066-smp-sram                    P         vop@1010c000             ,rockchip,rk3188-vop                                                                   aclk_vop dclk_vop hclk_vop          1                    d      e      f        /axi ahb dclk          	  disabled       port                                          3         vop@1010e000             ,rockchip,rk3188-vop                                                                   aclk_vop dclk_vop hclk_vop          1                    g      h      i        /axi ahb dclk          	  disabled       port                                          4         timer@2000e000        ,   ,rockchip,rk3188-timer rockchip,rk3288-timer                                .                 E      W         pclk timer        timer@200380a0        ,   ,rockchip,rk3188-timer rockchip,rk3288-timer                              @                 B      Z         pclk timer        i2s@1011a000          (   ,rockchip,rk3188-i2s rockchip,rk3066-i2s                                          default            5               K              i2s_clk i2s_hclk               6      6           tx rx           r                                	  disabled          sound@1011e000        ,   ,rockchip,rk3188-spdif rockchip,rk3066-spdif                                          N           
   mclk hclk              6           tx                             default            7      	  disabled          clock-controller@20000000            ,rockchip,rk3188-cru                             8         xin24m                                                      efuse@20010000           ,rockchip,rk3188-efuse                 @                                        [         pclk_efuse     cpu_leakage@17                          pinctrl          ,rockchip,rk3188-pinctrl                       9                                  k   gpio@2000a000            ,rockchip,rk3188-gpio-bank0                                6                 U                             Y        n                     gpio@2003c000            ,rockchip,gpio-bank                               7                 V                             Y        n               #      gpio@2003e000            ,rockchip,gpio-bank                               8                 W                             Y        n         gpio@20080000            ,rockchip,gpio-bank                                9                 X                             Y        n         pcfg-pull-up                         ;      pcfg-pull-down                 pcfg-pull-none           
            :      emmc       emmc-clk                         :                  emmc-cmd                         ;                  emmc-rst                         :                     emac       emac-xfer                       :            :            :            :            :            :            :            :      emac-mdio                        :            :         i2c0       i2c0-xfer                        :            :                     i2c1       i2c1-xfer                        :            :                     i2c2       i2c2-xfer                        :            :            "         i2c3       i2c3-xfer                        :            :            $         i2c4       i2c4-xfer                        :            :            %         lcdc1      lcdc1-dclk                      :      lcdc1-den                       :      lcdc1-hsync                     :      lcdc1-vsync                     :      ldcd1-rgb24                     :            :            :            :            :            :            :            :            :      	      :      
      :            :            :            :            :            :            :            :            :            :            :            :            :            :         pwm0       pwm0-out                        :                     pwm1       pwm1-out                        :                     pwm2       pwm2-out                        :                      pwm3       pwm3-out                        :            !         spi0       spi0-clk                        ;            (      spi0-cs0                        ;            +      spi0-tx                     ;            )      spi0-rx                     ;            *      spi0-cs1                        ;         spi1       spi1-clk                         ;            ,      spi1-cs0                         ;            /      spi1-rx                      ;            .      spi1-tx                      ;            -      spi1-cs1                        ;         uart0      uart0-xfer                        ;            :                  uart0-cts                       :      uart0-rts                       :         uart1      uart1-xfer                       ;            :                  uart1-cts                       :      uart1-rts                       :         uart2      uart2-xfer                       ;      	      :            &         uart3      uart3-xfer                 
      ;            :            '      uart3-cts                       :      uart3-rts                       :         sd0    sd0-clk                     :            
      sd0-cmd                     :                  sd0-cd                      :                  sd0-wp                	      :      sd0-pwr                     :      sd0-bus-width1                      :      sd0-bus-width4        @              :            :            :            :                     sd1    sd1-clk                     :      sd1-cmd                     :      sd1-cd                      :      sd1-wp                      :      sd1-bus-width1                      :      sd1-bus-width4        @              :            :            :            :         i2s0       i2s0-bus          `              :            :            :            :            :            :            5         spdif      spdif-tx                        :            7         pcfg-output-low          %      usb    host-vbus-drv                         :      otg-vbus-drv                         :            chosen          0serial2:115200n8          memory@60000000          `              memory        gpio-keys         
   ,gpio-keys            <   power                            G   t        RGPIO Key Power          X            N        i   d         vsys-regulator           ,regulator-fixed         vsys             LK@         LK@                              	#address-cells #size-cells interrupt-parent compatible model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 serial0 serial1 serial2 serial3 spi0 spi1 mmc0 mmc1 clock-frequency #clock-cells clock-output-names phandle reg clocks clock-names assigned-clocks assigned-clock-rates resets status interrupts interrupt-names power-domains cache-unified cache-level interrupt-controller #interrupt-cells reg-shift reg-io-width pinctrl-names pinctrl-0 dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names rockchip,grf max-speed phy-mode dmas dma-names fifo-depth reset-names vmmc-supply bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp non-removable offset mode-normal mode-recovery mode-bootloader mode-loader #power-domain-cells pm_qos #phy-cells #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells power-gpios touchscreen-size-x touchscreen-size-y silead,max-fingers #io-channel-cells enable-method device_type next-level-cache clock-latency operating-points-v2 cpu-supply opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports ranges rockchip,playback-channels rockchip,capture-channels #sound-dai-cells #reset-cells rockchip,pmu gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable rockchip,pins output-low stdout-path autorepeat linux,code label linux,input-type debounce-interval 