  (   8  \   (              $                                                      7   radxa,rockpi-n8 vamrs,rk3288-vmarc-som rockchip,rk3288           &            7Radxa ROCK Pi N8       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        V         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        V         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        V            opp-table-0          operating-points-v2          ^        V      opp-126000000           i            p       opp-216000000           i             p       opp-312000000           i             p       opp-408000000           i    Q         p       opp-600000000           i    #F         p       opp-696000000           i    )|         p ~      opp-816000000           i    0,         p B@      opp-1008000000          i    <         p       opp-1200000000          i    G         p       opp-1416000000          i    Tfr         p O      opp-1512000000          i    ZJ         p        opp-1608000000          i    _"         p p         reserved-memory                                   ~   dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      V   	      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                          H           5     a   	        pclk timer        display-subsystem            rockchip,display-subsystem             
         mmc@ff0c0000             rockchip,rk3288-dw-mshc         р         5           D      r      v        biu ciu ciu-drive ciu-sample                                                        @                        reset           'okay            .            8         J         [        f           sdefault                           mmc@ff0d0000             rockchip,rk3288-dw-mshc         р         5           E      s      w        biu ciu ciu-drive ciu-sample                               !                        @                        reset           'okay            .            J                                              sdefault                                 mmc@ff0e0000             rockchip,rk3288-dw-mshc         р         5           F      t      x        biu ciu ciu-drive ciu-sample                               "                        @                        reset         	  'disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         р         5           G      u      y        biu ciu ciu-drive ciu-sample                               #                        @                        reset           'okay            .            8         [                 sdefault                                        f         saradc@ff100000          rockchip,saradc                                       $                      5      I     [        saradc apb_pclk                W        saradc-apb        	  'disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk                             tx rx                   ,           sdefault                                                                           	  'disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk                             tx rx                   -           sdefault                !   "   #                                                      	  'disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk                             tx rx                   .           sdefault            $   %   &   '                                                      	  'disabled          i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        sdefault            (        'okay                rtc@51           haoyu,hym8563               Q         &   )                                              hym8563         sdefault            *        V            i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        sdefault            +      	  'disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        sdefault            ,      	  'disabled          i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        sdefault            -        'okay            V   r      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                                 5      M     U        baudclk apb_pclk                                tx rx           sdefault            .   /        'okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                                 5      N     V        baudclk apb_pclk                                tx rx           sdefault            0      	  'disabled          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                                 5      O     W        baudclk apb_pclk            sdefault            1        'okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                                 5      P     X        baudclk apb_pclk                                tx rx           sdefault            2      	  'disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                                 5      Q     Y        baudclk apb_pclk                  	      
        tx rx           sdefault            3      	  'disabled          dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                                  $         ?        5            	  apb_pclk            V         thermal-zones      reserve-thermal         V          l          z   4          cpu-thermal         V   d        l          z   4      trips      cpu_alert0           p                   passive         V   5      cpu_alert1           $                   passive         V   6      cpu_crit             _                	   critical             cooling-maps       map0               5      0                                map1               6      0                          gpu-thermal         V   d        l          z   4      trips      gpu_alert0           p                   passive         V   7      gpu_crit             _                	   critical             cooling-maps       map0               7           8               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  tsadc-apb           sinit default sleep             9           :           9                      ;         s      	  'disabled            V   4      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              macirq eth_wake_irq            ;      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  stmmaceth           'okay               <        *input           7rgmii           sdefault            =         @        V      '  P        k   (        t           }                            >             usb@ff500000             generic-ehci                 P                                    5                ?        usb         'okay          usb@ff520000             generic-ohci                 R                         )           5                ?        usb         'okay          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         host               @      	  usb2-phy                     'okay          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         otg                                          @   @               A      	  usb2-phy            'okay          usb@ff5c0000             generic-ehci                 \                                    5           	  'disabled          dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                                   $         ?        5            	  apb_pclk          	  'disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        sdefault            B        'okay                pmic@1b          rockchip,rk808                       &   C                       sdefault            D   E                  '                   rk808-clkout1 rk808-clkout2         5   F        A   F        M   F        Y   F        e   F        q   F        }                         F           F                         regulators     DCDC_REG1           vdd_arm                            q         \   regulator-state-mem          .         DCDC_REG2           vdd_gpu                            P                 G  p   regulator-state-mem          .         DCDC_REG3           vcc_ddr                      regulator-state-mem          \         DCDC_REG4           vcc_io                             2Z         2Z        V      regulator-state-mem          \        t 2Z         LDO_REG1            vcc_tp                             2Z         2Z   regulator-state-mem          .         LDO_REG2            vcca_codec                             2Z         2Z   regulator-state-mem          \        t 2Z         LDO_REG3            vdd_10                             B@         B@   regulator-state-mem          \        t B@         LDO_REG4            vcc_wl                             w@         w@        V   [   regulator-state-mem          \         LDO_REG5          	  vccio_sd                               w@         2Z        V      regulator-state-mem          \        t 2Z         LDO_REG6          
  vdd10_lcd                              B@         B@   regulator-state-mem          .         LDO_REG7            vcc_18                             w@         w@        V   Z   regulator-state-mem          \        t w@         LDO_REG8          
  vcc18_lcd                              w@         w@   regulator-state-mem          .         SWITCH_REG1         vcc_sd                       regulator-state-mem          .         SWITCH_REG2         vcc_lcd                      regulator-state-mem          .                  i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        sdefault            G      	  'disabled          pwm@ff680000             rockchip,rk3288-pwm              h                            sdefault            H        5     _        'okay          pwm@ff680010             rockchip,rk3288-pwm              h                           sdefault            I        5     _      	  'disabled          pwm@ff680020             rockchip,rk3288-pwm              h                            sdefault            J        5     _        'okay          pwm@ff680030             rockchip,rk3288-pwm              h 0                          sdefault            K        5     _      	  'disabled          sram@ff700000         
   mmio-sram                p                                         ~        p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 V      power-controller          !   rockchip,rk3288-power-controller                                                 }      h           	        V   _   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     L   M   N   O   P   Q   R   S   T                  power-domain@11                     5            o      p           U   V                  power-domain@12                     5                      W                  power-domain@13                     5                 X   Y                     reboot-mode          syscon-reboot-mode                     RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                 5   	        xin24m             ;                            H  }                                  j                k      $   #gׄ e  рxh рxh        V         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 V   ;   edp-phy          rockchip,rk3288-dp-phy          5      h        24m                   	  'disabled            V   o      io-domains        "   rockchip,rk3288-io-voltage-domain           'okay                        *           8   Z        H           V           d   [      usbphy           rockchip,rk3288-usb-phy                                   'okay       usb-phy@320                                 5      ]        phyclk                                   
  phy-reset           V   A      usb-phy@334                        4        5      ^        phyclk                                   
  phy-reset           V   ?      usb-phy@348                        H        5      _        phyclk                                   
  phy-reset           V   @            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O         	  'disabled          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                               p            5      T           
  mclk hclk              \           tx                  6           sdefault            ]           ;      	  'disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                               p                    5           5      R             i2s_clk i2s_hclk               \       \           tx rx           sdefault            ^                            	  'disabled          crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        crypto-rst        iommu@ff900800           rockchip,iommu                       @                           5                   aclk iface                    	  'disabled          iommu@ff914000           rockchip,iommu                @            P                                   5                   aclk iface                             	  'disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk             _   	               i      l      m        core axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             _   	               d      e      f        axi ahb dclk               `        'okay       port                                      V      endpoint@0                          a        V   t      endpoint@1                         b        V   p      endpoint@2                         c        V   j      endpoint@3                         d        V   m            iommu@ff930300           rockchip,iommu                                                  5                   aclk iface             _   	                    'okay            V   `      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             _   	                                   axi ahb dclk               e        'okay       port                                      V   
   endpoint@0                          f        V   u      endpoint@1                         g        V   q      endpoint@2                         h        V   k      endpoint@3                         i        V   n            iommu@ff940300           rockchip,iommu                                                  5                   aclk iface             _   	                    'okay            V   e      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk               _   	           ;      	  'disabled       ports      port                                 endpoint@0                          j        V   c      endpoint@1                         k        V   h               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           slcdc               l           _   	           ;      	  'disabled       ports                                port@0                                            endpoint@0                          m        V   d      endpoint@1                         n        V   i               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk            o        dp                 o        dp             ;      	  'disabled       ports                                port@0                                            endpoint@0                          p        V   b      endpoint@1                         q        V   g               hdmi@ff980000            rockchip,rk3288-dw-hdmi                                          p               ;                g           5     h      m      n        iahb isfr cec              _   	        'okay               r        sdefault            s   ports      port                                 endpoint@0                          t        V   a      endpoint@1                         u        V   f               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  vepu vdpu           5                 
  aclk hclk              v           _         iommu@ff9a0800           rockchip,iommu                                                  5                   aclk iface                         _           V   v      iommu@ff9c0440           rockchip,iommu                @       @           @                o           5                   aclk iface                    	  'disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         job mmu gpu         5                 w                      _         	  'disabled            V   8      opp-table-1          operating-points-v2         V   w   opp-100000000           i             p ~      opp-200000000           i             p ~      opp-300000000           i             p B@      opp-400000000           i    ׄ         p       opp-600000000           i    #F         p          qos@ffaa0000             rockchip,rk3288-qos syscon                                 V   X      qos@ffaa0080             rockchip,rk3288-qos syscon                                V   Y      qos@ffad0000             rockchip,rk3288-qos syscon                                 V   M      qos@ffad0100             rockchip,rk3288-qos syscon                                V   N      qos@ffad0180             rockchip,rk3288-qos syscon                               V   O      qos@ffad0400             rockchip,rk3288-qos syscon                                V   P      qos@ffad0480             rockchip,rk3288-qos syscon                               V   Q      qos@ffad0500             rockchip,rk3288-qos syscon                                V   L      qos@ffad0800             rockchip,rk3288-qos syscon                                V   R      qos@ffad0880             rockchip,rk3288-qos syscon                               V   S      qos@ffad0900             rockchip,rk3288-qos syscon               	                 V   T      qos@ffae0000             rockchip,rk3288-qos syscon                                 V   W      qos@ffaf0000             rockchip,rk3288-qos syscon                                 V   U      qos@ffaf0080             rockchip,rk3288-qos syscon                                V   V      dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                                   $         ?        5            	  apb_pclk            V   \      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400                  $                       @                                 @             `                        	          V         pinctrl          rockchip,rk3288-pinctrl            ;                                              ~   gpio@ff750000            rockchip,gpio-bank               u                         Q           5     @         5        E                    $           V   C      gpio@ff780000            rockchip,gpio-bank               x                         R           5     A         5        E                    $         gpio@ff790000            rockchip,gpio-bank               y                         S           5     B         5        E                    $         gpio@ff7a0000            rockchip,gpio-bank               z                         T           5     C         5        E                    $         gpio@ff7b0000            rockchip,gpio-bank               {                         U           5     D         5        E                    $           V   >      gpio@ff7c0000            rockchip,gpio-bank               |                         V           5     E         5        E                    $           V   )      gpio@ff7d0000            rockchip,gpio-bank               }                         W           5     F         5        E                    $         gpio@ff7e0000            rockchip,gpio-bank               ~                         X           5     G         5        E                    $         gpio@ff7f0000            rockchip,gpio-bank                                        Y           5     H         5        E                    $         hdmi       hdmi-cec-c0         Q            x        V   s      hdmi-cec-c7         Q            x      hdmi-ddc             Q            x            x      hdmi-ddc-unwedge             Q             y            x         pcfg-output-low          _        V   y      pcfg-pull-up             j        V   z      pcfg-pull-down           w        V   {      pcfg-pull-none                   V   x      pcfg-pull-none-12ma                             V   ~      suspend    global-pwroff           Q              x        V   E      ddrio-pwroff            Q             x      ddr0-retention          Q             z      ddr1-retention          Q             z         edp    edp-hpd         Q            {         i2c0       i2c0-xfer            Q             x             x        V   B         i2c1       i2c1-xfer            Q            x            x        V   (         i2c2       i2c2-xfer            Q      	      x      
      x        V   G         i2c3       i2c3-xfer            Q            x            x        V   +         i2c4       i2c4-xfer            Q            x            x        V   ,         i2c5       i2c5-xfer            Q            x            x        V   -         i2s0       i2s0-bus          `  Q             x            x            x            x            x            x        V   ^         lcdc       lcdc-ctl          @  Q            x            x            x            x        V   l         sdmmc      sdmmc-clk           Q            |        V         sdmmc-cmd           Q            }        V         sdmmc-cd            Q            z        V         sdmmc-bus1          Q            z      sdmmc-bus4        @  Q            }            }            }            }        V            sdio0      sdio0-bus1          Q            z      sdio0-bus4        @  Q            z            z            z            z        V         sdio0-cmd           Q            z        V         sdio0-clk           Q            x        V         sdio0-cd            Q            z      sdio0-wp            Q            z      sdio0-pwr           Q            z      sdio0-bkpwr         Q            z      sdio0-int           Q            z         sdio1      sdio1-bus1          Q            z      sdio1-bus4        @  Q            z            z            z            z      sdio1-cd            Q            z      sdio1-wp            Q            z      sdio1-bkpwr         Q            z      sdio1-int           Q            z      sdio1-cmd           Q            z      sdio1-clk           Q            x      sdio1-pwr           Q      	      z         emmc       emmc-clk            Q            x        V         emmc-cmd            Q            z        V         emmc-pwr            Q      	      z        V         emmc-bus1           Q             z      emmc-bus4         @  Q             z            z            z            z      emmc-bus8           Q             z            z            z            z            z            z            z            z        V            spi0       spi0-clk            Q            z        V         spi0-cs0            Q            z        V         spi0-tx         Q            z        V         spi0-rx         Q            z        V         spi0-cs1            Q            z         spi1       spi1-clk            Q            z        V          spi1-cs0            Q            z        V   #      spi1-rx         Q            z        V   "      spi1-tx         Q            z        V   !         spi2       spi2-cs1            Q            z      spi2-clk            Q            z        V   $      spi2-cs0            Q            z        V   '      spi2-rx         Q            z        V   &      spi2-tx         Q      	      z        V   %         uart0      uart0-xfer           Q            z            x        V   .      uart0-cts           Q            z        V   /      uart0-rts           Q            x         uart1      uart1-xfer           Q            z      	      x        V   0      uart1-cts           Q      
      z      uart1-rts           Q            x         uart2      uart2-xfer           Q            z            x        V   1         uart3      uart3-xfer           Q            z            x        V   2      uart3-cts           Q      	      z      uart3-rts           Q      
      x         uart4      uart4-xfer           Q            z            x        V   3      uart4-cts           Q            z      uart4-rts           Q            x         tsadc      otp-pin         Q       
       x        V   9      otp-out         Q       
      x        V   :         pwm0       pwm0-pin            Q             x        V   H         pwm1       pwm1-pin            Q            x        V   I         pwm2       pwm2-pin            Q            x        V   J         pwm3       pwm3-pin            Q            x        V   K         gmac       rgmii-pins          Q            x            x            x            x            ~            ~            ~            ~             x            x            x      	      ~            ~            x            x        V   =      rmii-pins           Q            x            x            x            x             x            x            x            x            x            x         spdif      spdif-tx            Q            x        V   ]         hym8563    hym8563-int         Q             z        V   *         pcfg-pull-none-drv-8ma                     V   |      pcfg-pull-up-drv-8ma             j                   V   }      pmic       pmic-int            Q              z        V   D         sdio-pwrseq    wifi-enable-h           Q             x        V            vbus_host      usb1-en-oc          Q              z        V            vbus_typec     usb0-en-oc          Q              z        V               external-gmac-clock          fixed-clock         sY@        clkin_gmac                      V   <      sdio-pwrseq          mmc-pwrseq-simple           5         
  ext_clock           sdefault                       >              V         vcc12v-dcin-regulator            regulator-fixed         vcc12v_dcin                                               V         vcc5v0-sys-regulator             regulator-fixed         vcc5v0_sys                             LK@         LK@                   V   F      vbus-host            regulator-fixed         sdefault                  
  vbus_host                       F                    C             vbus-typec           regulator-fixed         sdefault                    vbus_typec                      F                    C             vccio-flash-regulator            regulator-fixed         vccio_flash          w@         w@                   V            	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vqmmc-supply pinctrl-names pinctrl-0 cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 vmmc-supply #io-channel-cells dmas dma-names reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp interrupt-names assigned-clock-parents clock_in_out phy-mode snps,reset-active-low snps,reset-delays-us tx_delay rx_delay assigned-clocks phy-supply snps,reset-gpio phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vddio-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-off-in-suspend regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply flash0-supply gpio1830-supply gpio30-supply sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength reset-gpios vin-supply enable-active-high 