     8     (            	  `                                                      %   asus,rk3288-tinker-s rockchip,rk3288             &         $   7Rockchip RK3288 Asus Tinker Board S    aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V   	        b         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        b            opp-table-0          operating-points-v2          j        b      opp-126000000           u            |       opp-216000000           u             |       opp-312000000           u             |       opp-408000000           u    Q         |       opp-600000000           u    #F         |       opp-696000000           u    )|         | ~      opp-816000000           u    0,         | B@      opp-1008000000          u    <         |       opp-1200000000          u    G         |       opp-1416000000          u    Tfr         | O      opp-1512000000          u    ZJ         |        opp-1608000000          u    _"         | p      opp-1704000000          u    e         | p      opp-1800000000          u    kI         | \         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      b   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                          H           5     a   
        pclk timer        display-subsystem            rockchip,display-subsystem                      mmc@ff0c0000             rockchip,rk3288-dw-mshc         р         5           D      r      v        biu ciu ciu-drive ciu-sample                                                        @                        'reset           3okay            :            D         V         g         q        |default                                                 mmc@ff0d0000             rockchip,rk3288-dw-mshc                  5           E      s      w        biu ciu ciu-drive ciu-sample                               !                        @                        'reset           3okay            :            V                                              |default                                                                            mmc@ff0e0000             rockchip,rk3288-dw-mshc         р         5           F      t      x        biu ciu ciu-drive ciu-sample                               "                        @                        'reset         	  3disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         р         5           G      u      y        biu ciu ciu-drive ciu-sample                               #                        @                        'reset           3okay            :            D                 |default                                             saradc@ff100000          rockchip,saradc                                       $           ,           5      I     [        saradc apb_pclk                W        'saradc-apb          3okay            >         spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk         J                    Otx rx                   ,           |default                !   "   #                                                      	  3disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk         J                    Otx rx                   -           |default            $   %   &   '                                                      	  3disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk         J                    Otx rx                   .           |default            (   )   *   +                                                      	  3disabled          i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        |default            ,      	  3disabled          i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        |default            -      	  3disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        |default            .      	  3disabled          i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        |default            /        3okay            b   t      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7           Y           c           5      M     U        baudclk apb_pclk            J                    Otx rx           |default            0        3okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8           Y           c           5      N     V        baudclk apb_pclk            J                    Otx rx           |default            1        3okay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9           Y           c           5      O     W        baudclk apb_pclk            |default            2        3okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :           Y           c           5      P     X        baudclk apb_pclk            J                    Otx rx           |default            3        3okay          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;           Y           c           5      Q     Y        baudclk apb_pclk            J      	      
        Otx rx           |default            4        3okay          dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                      p            {                 5            	  apb_pclk            b         thermal-zones      reserve-thermal                                5          cpu-thermal            d                     5      trips      cpu_alert0           p                   passive         b   6      cpu_alert1           $                   passive         b   7      cpu_crit             _                	   critical             cooling-maps       map0               6      0                                map1               7      0                          gpu-thermal            d                     5      trips      gpu_alert0           p                   passive         b   8      gpu_crit             _                	   critical             cooling-maps       map0               8           9               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  'tsadc-apb           |init default sleep             :           ;           :                    6   <        C s        3okay            Z           q           b   5      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              macirq eth_wake_irq         6   <      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  'stmmaceth           3okay                             =        input           rgmii              >        |default            ?           @                        
      ' B@           0        (         usb@ff500000             generic-ehci                 P                                    5             1   A        6usb         3okay          usb@ff520000             generic-ohci                 R                         )           5             1   A        6usb       	  3disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         @host            1   B      	  6usb2-phy             H        3okay          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         @otg         _           q                      @   @            1   C      	  6usb2-phy            3okay          usb@ff5c0000             generic-ehci                 \                                    5           	  3disabled          dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                       p            {                 5            	  apb_pclk          	  3disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        |default            D        3okay                pmic@1b          rockchip,rk808                       &   E                                  xin32k rk808-clkout2               E          E               |default            F   G   H   I                             J           J           J           J           J           J                              (           5   J        B           O           b      regulators     DCDC_REG1            \         p         q         \        vdd_arm           p        b   	   regulator-state-mem                   DCDC_REG2            \         p         P                 vdd_gpu           p        b   z   regulator-state-mem                   B@         DCDC_REG3            \         p        vcc_ddr    regulator-state-mem                   DCDC_REG4            \         p         2Z         2Z        vcc_io          b      regulator-state-mem                   2Z         LDO_REG1             \         p         w@         w@        vcc18_ldo1          b      regulator-state-mem                   w@         LDO_REG2             \         p         2Z         2Z        vcc33_mipi     regulator-state-mem                   LDO_REG3             \         p         B@         B@        vdd_10     regulator-state-mem                   B@         LDO_REG4             \         p         w@         w@        vcc18_codec    regulator-state-mem                   w@         LDO_REG5             \         p         w@         2Z      	  vccio_sd            b      regulator-state-mem                   2Z         LDO_REG6             \         p         B@         B@      
  vdd10_lcd      regulator-state-mem                   B@         LDO_REG7             \         p         w@         w@        vcc_18          b      regulator-state-mem                   w@         LDO_REG8             \         p         w@         w@      
  vcc18_lcd      regulator-state-mem                   w@         SWITCH_REG1          \         p      	  vcc33_sd            b      regulator-state-mem                   SWITCH_REG2          \         p      
  vcc33_lan           b   >   regulator-state-mem                            i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        |default            K        3okay          pwm@ff680000             rockchip,rk3288-pwm              h                 #           |default            L        5     _        3okay          pwm@ff680010             rockchip,rk3288-pwm              h                #           |default            M        5     _      	  3disabled          pwm@ff680020             rockchip,rk3288-pwm              h                 #           |default            N        5     _      	  3disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0               #           |default            O        5     _      	  3disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 b      power-controller          !   rockchip,rk3288-power-controller            .                                           h           
        b   a   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  B   P   Q   R   S   T   U   V   W   X        .          power-domain@11                     5            o      p        B   Y   Z        .          power-domain@12                     5                   B   [        .          power-domain@13                     5              B   \   ]        .             reboot-mode          syscon-reboot-mode          I           PRB         \RB        jRB	        zRB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                 5   
        xin24m          6   <                            H                                    j                k      $  #gׄ e  рxh рxh        b         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 b   <   edp-phy          rockchip,rk3288-dp-phy          5      h        24m                   	  3disabled            b   q      io-domains        "   rockchip,rk3288-io-voltage-domain           3okay                                usbphy           rockchip,rk3288-usb-phy                                   3okay       usb-phy@320                                 5      ]        phyclk                                   
  'phy-reset           b   C      usb-phy@334                        4        5      ^        phyclk                                   
  'phy-reset           b   A      usb-phy@348                        H        5      _        phyclk                                   
  'phy-reset           b   B            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O           3okay          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                           5      T           
  mclk hclk           J   ^           Otx                  6           |default            _        6   <      	  3disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                   5           5      R             i2s_clk i2s_hclk            J   ^       ^           Otx rx           |default            `                              3okay            b         crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        'crypto-rst        iommu@ff900800           rockchip,iommu                       @                           5                   aclk iface                    	  3disabled          iommu@ff914000           rockchip,iommu                @            P                                   5                   aclk iface                              	  3disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk          ;   a   	               i      l      m        'core axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop          ;   a   	               d      e      f        'axi ahb dclk            I   b        3okay       port                                      b      endpoint@0                       P   c        b   v      endpoint@1                      P   d        b   r      endpoint@2                      P   e        b   l      endpoint@3                      P   f        b   o            iommu@ff930300           rockchip,iommu                                                  5                   aclk iface          ;   a   	                    3okay            b   b      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop          ;   a   	                                   'axi ahb dclk            I   g        3okay       port                                      b      endpoint@0                       P   h        b   w      endpoint@1                      P   i        b   s      endpoint@2                      P   j        b   m      endpoint@3                      P   k        b   p            iommu@ff940300           rockchip,iommu                                                  5                   aclk iface          ;   a   	                    3okay            b   g      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk            ;   a   	        6   <      	  3disabled       ports      port                                 endpoint@0                       P   l        b   e      endpoint@1                      P   m        b   j               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           |lcdc               n        ;   a   	        6   <      	  3disabled       ports                                port@0                                            endpoint@0                       P   o        b   f      endpoint@1                      P   p        b   k               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk         1   q        6dp                 o        'dp          6   <      	  3disabled       ports                                port@0                                            endpoint@0                       P   r        b   d      endpoint@1                      P   s        b   i               hdmi@ff980000            rockchip,rk3288-dw-hdmi                               c                       6   <                g           5     h      m      n        iahb isfr cec           ;   a   	        3okay            `   t        |default            u        b      ports      port                                 endpoint@0                       P   v        b   c      endpoint@1                      P   w        b   h               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  vepu vdpu           5                 
  aclk hclk           I   x        ;   a         iommu@ff9a0800           rockchip,iommu                                                  5                   aclk iface                      ;   a           b   x      iommu@ff9c0440           rockchip,iommu                @       @           @                o           5                   aclk iface                    	  3disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         job mmu gpu         5                 y                   ;   a           3okay            l   z        b   9      opp-table-1          operating-points-v2         b   y   opp-100000000           u             | ~      opp-200000000           u             | ~      opp-300000000           u             | B@      opp-400000000           u    ׄ         |       opp-600000000           u    #F         |          qos@ffaa0000             rockchip,rk3288-qos syscon                                 b   \      qos@ffaa0080             rockchip,rk3288-qos syscon                                b   ]      qos@ffad0000             rockchip,rk3288-qos syscon                                 b   Q      qos@ffad0100             rockchip,rk3288-qos syscon                                b   R      qos@ffad0180             rockchip,rk3288-qos syscon                               b   S      qos@ffad0400             rockchip,rk3288-qos syscon                                b   T      qos@ffad0480             rockchip,rk3288-qos syscon                               b   U      qos@ffad0500             rockchip,rk3288-qos syscon                                b   P      qos@ffad0800             rockchip,rk3288-qos syscon                                b   V      qos@ffad0880             rockchip,rk3288-qos syscon                               b   W      qos@ffad0900             rockchip,rk3288-qos syscon               	                 b   X      qos@ffae0000             rockchip,rk3288-qos syscon                                 b   [      qos@ffaf0000             rockchip,rk3288-qos syscon                                 b   Y      qos@ffaf0080             rockchip,rk3288-qos syscon                                b   Z      dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                       p            {                 5            	  apb_pclk            b   ^      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          x                               @                                 @             `                        	          b         pinctrl          rockchip,rk3288-pinctrl         6   <                                                 gpio@ff750000            rockchip,gpio-bank               u                         Q           5     @                             x                   b   E      gpio@ff780000            rockchip,gpio-bank               x                         R           5     A                             x                   b         gpio@ff790000            rockchip,gpio-bank               y                         S           5     B                             x                 gpio@ff7a0000            rockchip,gpio-bank               z                         T           5     C                             x                 gpio@ff7b0000            rockchip,gpio-bank               {                         U           5     D                             x                   b   @      gpio@ff7c0000            rockchip,gpio-bank               |                         V           5     E                             x                 gpio@ff7d0000            rockchip,gpio-bank               }                         W           5     F                             x                 gpio@ff7e0000            rockchip,gpio-bank               ~                         X           5     G                             x                   b         gpio@ff7f0000            rockchip,gpio-bank                                        Y           5     H                             x                 hdmi       hdmi-cec-c0                     {        b   u      hdmi-cec-c7                     {      hdmi-ddc                         {            {      hdmi-ddc-unwedge                          |            {         pcfg-output-low                  b   |      pcfg-pull-up                     b   }      pcfg-pull-down                   b   ~      pcfg-pull-none                   b   {      pcfg-pull-none-12ma                             b         suspend    global-pwroff                         {        b   G      ddrio-pwroff                         {      ddr0-retention                       }      ddr1-retention                       }         edp    edp-hpd                     ~         i2c0       i2c0-xfer                         {             {        b   D         i2c1       i2c1-xfer                        {            {        b   ,         i2c2       i2c2-xfer                  	      {      
      {        b   K         i2c3       i2c3-xfer                        {            {        b   -         i2c4       i2c4-xfer                        {            {        b   .         i2c5       i2c5-xfer                        {            {        b   /         i2s0       i2s0-bus          `               {            {            {            {            {            {        b   `         lcdc       lcdc-ctl          @              {            {            {            {        b   n         sdmmc      sdmmc-clk                               b         sdmmc-cmd                               b         sdmmc-cd                        }        b         sdmmc-bus1                      }      sdmmc-bus4        @                                                          b         sdmmc-pwr                        {        b            sdio0      sdio0-bus1                      }      sdio0-bus4        @              }            }            }            }        b         sdio0-cmd                       }        b         sdio0-clk                       {        b         sdio0-cd                        }      sdio0-wp                        }      sdio0-pwr                       }      sdio0-bkpwr                     }      sdio0-int                       }        b            sdio1      sdio1-bus1                      }      sdio1-bus4        @              }            }            }            }      sdio1-cd                        }      sdio1-wp                        }      sdio1-bkpwr                     }      sdio1-int                       }      sdio1-cmd                       }      sdio1-clk                       {      sdio1-pwr                 	      }         emmc       emmc-clk                        {        b         emmc-cmd                        }        b         emmc-pwr                  	      }        b         emmc-bus1                        }      emmc-bus4         @               }            }            }            }      emmc-bus8                        }            }            }            }            }            }            }            }        b            spi0       spi0-clk                        }        b          spi0-cs0                        }        b   #      spi0-tx                     }        b   !      spi0-rx                     }        b   "      spi0-cs1                        }         spi1       spi1-clk                        }        b   $      spi1-cs0                        }        b   '      spi1-rx                     }        b   &      spi1-tx                     }        b   %         spi2       spi2-cs1                        }      spi2-clk                        }        b   (      spi2-cs0                        }        b   +      spi2-rx                     }        b   *      spi2-tx               	      }        b   )         uart0      uart0-xfer                       }            {        b   0      uart0-cts                       }      uart0-rts                       {         uart1      uart1-xfer                       }      	      {        b   1      uart1-cts                 
      }      uart1-rts                       {         uart2      uart2-xfer                       }            {        b   2         uart3      uart3-xfer                       }            {        b   3      uart3-cts                 	      }      uart3-rts                 
      {         uart4      uart4-xfer                       }            {        b   4      uart4-cts                       }      uart4-rts                       {         tsadc      otp-pin                
       {        b   :      otp-out                
      {        b   ;         pwm0       pwm0-pin                         {        b   L         pwm1       pwm1-pin                        {        b   M         pwm2       pwm2-pin                        {        b   N         pwm3       pwm3-pin                        {        b   O         gmac       rgmii-pins                      {            {            {            {                                                             {            {            {      	                              {            {        b   ?      rmii-pins                       {            {            {            {             {            {            {            {            {            {         spdif      spdif-tx                        {        b   _         pcfg-pull-none-drv-8ma                     b         pcfg-pull-up-drv-8ma                                b         backlight      bl-en                        {         buttons    pwrbtn                        }        b            eth_phy    eth-phy-pwr                       {         pmic       pmic-int                          }        b   F      dvs-1                         ~        b   H      dvs-2                         ~        b   I         usb    host-vbus-drv                         {      pwr-3g                       {         sdio       wifi-enable                       {             {        b               chosen          	serial2:115200n8          memory                                   memory        external-gmac-clock          fixed-clock                     sY@      	  ext_gmac            b   =      gpio-keys         
   gpio-keys                                      	        |default               button@0               E              	"   t        	-GPIO Key Power          	3                    	D   d         gpio-leds         
   gpio-leds      led-0                             	Vmmc0          led-1                           
  	Vheartbeat         led-2              E               	Vdefault-on           sdio-pwrseq          mmc-pwrseq-simple           5            
  ext_clock           |default                    	l   @         @              b         sound            simple-audio-card           	xi2s         	rockchip,tinker-codec           	      simple-audio-card,codec         	         simple-audio-card,cpu           	            vsys-regulator           regulator-fixed         vcc_sys          LK@         LK@         \         p        b   J      sdmmc-regulator          regulator-fixed                          |default                    vcc_sd           2Z         2Z        	         	            	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed broken-cd disable-wp pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 mmc-hs200-1_8v mmc-ddr-1_8v #io-channel-cells vref-supply dmas dma-names reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-mode phy-supply snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size dvs-gpios rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vddio-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength stdout-path autorepeat linux,code label linux,input-type debounce-interval linux,default-trigger reset-gpios simple-audio-card,format simple-audio-card,name simple-audio-card,mclk-fs sound-dai startup-delay-us vin-supply 