     8     (            	  |                                                      #   asus,rk3288-tinker rockchip,rk3288           &         "   7Rockchip RK3288 Asus Tinker Board      aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V   	        b         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        b            opp-table-0          operating-points-v2          j        b      opp-126000000           u            |       opp-216000000           u             |       opp-312000000           u             |       opp-408000000           u    Q         |       opp-600000000           u    #F         |       opp-696000000           u    )|         | ~      opp-816000000           u    0,         | B@      opp-1008000000          u    <         |       opp-1200000000          u    G         |       opp-1416000000          u    Tfr         | O      opp-1512000000          u    ZJ         |        opp-1608000000          u    _"         | p      opp-1704000000          u    e         | p      opp-1800000000          u    kI         | \         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      b   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                          H           5     a   
        pclk timer        display-subsystem            rockchip,display-subsystem                      mmc@ff0c0000             rockchip,rk3288-dw-mshc         р         5           D      r      v        biu ciu ciu-drive ciu-sample                                                        @                        'reset           3okay            :            D         V         g         q        |default                                                 mmc@ff0d0000             rockchip,rk3288-dw-mshc                  5           E      s      w        biu ciu ciu-drive ciu-sample                               !                        @                        'reset           3okay            :            V                                              |default                                                                            mmc@ff0e0000             rockchip,rk3288-dw-mshc         р         5           F      t      x        biu ciu ciu-drive ciu-sample                               "                        @                        'reset         	  3disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         р         5           G      u      y        biu ciu ciu-drive ciu-sample                               #                        @                        'reset         	  3disabled          saradc@ff100000          rockchip,saradc                                       $                      5      I     [        saradc apb_pclk                W        'saradc-apb          3okay            "         spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk         .                    3tx rx                   ,           |default                                                                           	  3disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk         .                    3tx rx                   -           |default                !   "   #                                                      	  3disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk         .                    3tx rx                   .           |default            $   %   &   '                                                      	  3disabled          i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        |default            (      	  3disabled          i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        |default            )      	  3disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        |default            *      	  3disabled          i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        |default            +        3okay            b   p      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7           =           G           5      M     U        baudclk apb_pclk            .                    3tx rx           |default            ,        3okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8           =           G           5      N     V        baudclk apb_pclk            .                    3tx rx           |default            -        3okay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9           =           G           5      O     W        baudclk apb_pclk            |default            .        3okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :           =           G           5      P     X        baudclk apb_pclk            .                    3tx rx           |default            /        3okay          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;           =           G           5      Q     Y        baudclk apb_pclk            .      	      
        3tx rx           |default            0        3okay          dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                      T            _         z        5            	  apb_pclk            b         thermal-zones      reserve-thermal                                1          cpu-thermal            d                     1      trips      cpu_alert0           p                   passive         b   2      cpu_alert1           $                   passive         b   3      cpu_crit             _                	   critical             cooling-maps       map0               2      0                                map1               3      0                          gpu-thermal            d                     1      trips      gpu_alert0           p                   passive         b   4      gpu_crit             _                	   critical             cooling-maps       map0               4           5               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  'tsadc-apb           |init default sleep             6           7           6                      8        ' s        3okay            >           U           b   1      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              pmacirq eth_wake_irq            8      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  'stmmaceth           3okay                             9        input           rgmii              :        |default            ;           <                              ' B@           0                 usb@ff500000             generic-ehci                 P                                    5                =        usb         3okay          usb@ff520000             generic-ohci                 R                         )           5                =        usb       	  3disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         $host               >      	  usb2-phy             ,        3okay          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         $otg         C           U          d            @   @               ?      	  usb2-phy            3okay          usb@ff5c0000             generic-ehci                 \                                    5           	  3disabled          dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                       T            _         z        5            	  apb_pclk          	  3disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        |default            @        3okay                pmic@1b          rockchip,rk808                       &   A                                  xin32k rk808-clkout2            s   A          A               |default            B   C   D   E         }                    F           F           F           F           F           F                                             F        &           3           b      regulators     DCDC_REG1            @         T        f q        ~ \        vdd_arm           p        b   	   regulator-state-mem                   DCDC_REG2            @         T        f P        ~         vdd_gpu           p        b   u   regulator-state-mem                   B@         DCDC_REG3            @         T        vcc_ddr    regulator-state-mem                   DCDC_REG4            @         T        f 2Z        ~ 2Z        vcc_io          b      regulator-state-mem                   2Z         LDO_REG1             @         T        f w@        ~ w@        vcc18_ldo1          b      regulator-state-mem                   w@         LDO_REG2             @         T        f 2Z        ~ 2Z        vcc33_mipi     regulator-state-mem                   LDO_REG3             @         T        f B@        ~ B@        vdd_10     regulator-state-mem                   B@         LDO_REG4             @         T        f w@        ~ w@        vcc18_codec    regulator-state-mem                   w@         LDO_REG5             @         T        f w@        ~ 2Z      	  vccio_sd            b      regulator-state-mem                   2Z         LDO_REG6             @         T        f B@        ~ B@      
  vdd10_lcd      regulator-state-mem                   B@         LDO_REG7             @         T        f w@        ~ w@        vcc_18          b      regulator-state-mem                   w@         LDO_REG8             @         T        f w@        ~ w@      
  vcc18_lcd      regulator-state-mem                   w@         SWITCH_REG1          @         T      	  vcc33_sd            b      regulator-state-mem                   SWITCH_REG2          @         T      
  vcc33_lan           b   :   regulator-state-mem                            i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        |default            G        3okay          pwm@ff680000             rockchip,rk3288-pwm              h                            |default            H        5     _        3okay          pwm@ff680010             rockchip,rk3288-pwm              h                           |default            I        5     _      	  3disabled          pwm@ff680020             rockchip,rk3288-pwm              h                            |default            J        5     _      	  3disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0                          |default            K        5     _      	  3disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 b      power-controller          !   rockchip,rk3288-power-controller                                                       h           
        b   ]   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  &   L   M   N   O   P   Q   R   S   T                  power-domain@11                     5            o      p        &   U   V                  power-domain@12                     5                   &   W                  power-domain@13                     5              &   X   Y                     reboot-mode          syscon-reboot-mode          -           4RB         @RB        NRB	        ^RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                 5   
        xin24m             8                   j         H                                    j                k      $  w#gׄ e  рxh рxh        b         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 b   8   edp-phy          rockchip,rk3288-dp-phy          5      h        24m                   	  3disabled            b   m      io-domains        "   rockchip,rk3288-io-voltage-domain           3okay                                usbphy           rockchip,rk3288-usb-phy                                   3okay       usb-phy@320                                 5      ]        phyclk                                   
  'phy-reset           b   ?      usb-phy@334                        4        5      ^        phyclk                                   
  'phy-reset           b   =      usb-phy@348                        H        5      _        phyclk                                   
  'phy-reset           b   >            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O           3okay          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                           5      T           
  mclk hclk           .   Z           3tx                  6           |default            [           8      	  3disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                   5           5      R             i2s_clk i2s_hclk            .   Z       Z           3tx rx           |default            \                              3okay            b         crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        'crypto-rst        iommu@ff900800           rockchip,iommu                       @                           5                   aclk iface                    	  3disabled          iommu@ff914000           rockchip,iommu                @            P                                   5                   aclk iface                             	  3disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk             ]   	               i      l      m        'core axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             ]   	               d      e      f        'axi ahb dclk            -   ^        3okay       port                                      b      endpoint@0                       4   _        b   q      endpoint@1                      4   `        b   n      endpoint@2                      4   a        b   h      endpoint@3                      4   b        b   k            iommu@ff930300           rockchip,iommu                                                  5                   aclk iface             ]   	                    3okay            b   ^      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             ]   	                                   'axi ahb dclk            -   c        3okay       port                                      b      endpoint@0                       4   d        b   r      endpoint@1                      4   e        b   o      endpoint@2                      4   f        b   i      endpoint@3                      4   g        b   l            iommu@ff940300           rockchip,iommu                                                  5                   aclk iface             ]   	                    3okay            b   c      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk               ]   	           8      	  3disabled       ports      port                                 endpoint@0                       4   h        b   a      endpoint@1                      4   i        b   f               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           |lcdc               j           ]   	           8      	  3disabled       ports                                port@0                                            endpoint@0                       4   k        b   b      endpoint@1                      4   l        b   g               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk            m        dp                 o        'dp             8      	  3disabled       ports                                port@0                                            endpoint@0                       4   n        b   `      endpoint@1                      4   o        b   e               hdmi@ff980000            rockchip,rk3288-dw-hdmi                               G                          8                g           5     h      m      n        iahb isfr cec              ]   	        3okay            D   p        b      ports      port                                 endpoint@0                       4   q        b   _      endpoint@1                      4   r        b   d               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  pvepu vdpu           5                 
  aclk hclk           -   s           ]         iommu@ff9a0800           rockchip,iommu                                                  5                   aclk iface                         ]           b   s      iommu@ff9c0440           rockchip,iommu                @       @           @                o           5                   aclk iface                    	  3disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         pjob mmu gpu         5                 t                      ]           3okay            P   u        b   5      opp-table-1          operating-points-v2         b   t   opp-100000000           u             | ~      opp-200000000           u             | ~      opp-300000000           u             | B@      opp-400000000           u    ׄ         |       opp-600000000           u    #F         |          qos@ffaa0000             rockchip,rk3288-qos syscon                                 b   X      qos@ffaa0080             rockchip,rk3288-qos syscon                                b   Y      qos@ffad0000             rockchip,rk3288-qos syscon                                 b   M      qos@ffad0100             rockchip,rk3288-qos syscon                                b   N      qos@ffad0180             rockchip,rk3288-qos syscon                               b   O      qos@ffad0400             rockchip,rk3288-qos syscon                                b   P      qos@ffad0480             rockchip,rk3288-qos syscon                               b   Q      qos@ffad0500             rockchip,rk3288-qos syscon                                b   L      qos@ffad0800             rockchip,rk3288-qos syscon                                b   R      qos@ffad0880             rockchip,rk3288-qos syscon                               b   S      qos@ffad0900             rockchip,rk3288-qos syscon               	                 b   T      qos@ffae0000             rockchip,rk3288-qos syscon                                 b   W      qos@ffaf0000             rockchip,rk3288-qos syscon                                 b   U      qos@ffaf0080             rockchip,rk3288-qos syscon                                b   V      dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                       T            _         z        5            	  apb_pclk            b   Z      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          \        q                       @                                 @             `                        	          b         pinctrl          rockchip,rk3288-pinctrl            8                                                 gpio@ff750000            rockchip,gpio-bank               u                         Q           5     @                             \        q           b   A      gpio@ff780000            rockchip,gpio-bank               x                         R           5     A                             \        q           b   ~      gpio@ff790000            rockchip,gpio-bank               y                         S           5     B                             \        q         gpio@ff7a0000            rockchip,gpio-bank               z                         T           5     C                             \        q         gpio@ff7b0000            rockchip,gpio-bank               {                         U           5     D                             \        q           b   <      gpio@ff7c0000            rockchip,gpio-bank               |                         V           5     E                             \        q         gpio@ff7d0000            rockchip,gpio-bank               }                         W           5     F                             \        q         gpio@ff7e0000            rockchip,gpio-bank               ~                         X           5     G                             \        q           b         gpio@ff7f0000            rockchip,gpio-bank                                        Y           5     H                             \        q         hdmi       hdmi-cec-c0                     v      hdmi-cec-c7                     v      hdmi-ddc                         v            v      hdmi-ddc-unwedge                          w            v         pcfg-output-low                  b   w      pcfg-pull-up                     b   x      pcfg-pull-down                   b   y      pcfg-pull-none                   b   v      pcfg-pull-none-12ma                             b   |      suspend    global-pwroff                         v        b   C      ddrio-pwroff                         v      ddr0-retention                       x      ddr1-retention                       x         edp    edp-hpd                     y         i2c0       i2c0-xfer                         v             v        b   @         i2c1       i2c1-xfer                        v            v        b   (         i2c2       i2c2-xfer                  	      v      
      v        b   G         i2c3       i2c3-xfer                        v            v        b   )         i2c4       i2c4-xfer                        v            v        b   *         i2c5       i2c5-xfer                        v            v        b   +         i2s0       i2s0-bus          `               v            v            v            v            v            v        b   \         lcdc       lcdc-ctl          @              v            v            v            v        b   j         sdmmc      sdmmc-clk                       z        b         sdmmc-cmd                       {        b         sdmmc-cd                        x        b         sdmmc-bus1                      x      sdmmc-bus4        @              {            {            {            {        b         sdmmc-pwr                        v        b            sdio0      sdio0-bus1                      x      sdio0-bus4        @              x            x            x            x        b         sdio0-cmd                       x        b         sdio0-clk                       v        b         sdio0-cd                        x      sdio0-wp                        x      sdio0-pwr                       x      sdio0-bkpwr                     x      sdio0-int                       x        b            sdio1      sdio1-bus1                      x      sdio1-bus4        @              x            x            x            x      sdio1-cd                        x      sdio1-wp                        x      sdio1-bkpwr                     x      sdio1-int                       x      sdio1-cmd                       x      sdio1-clk                       v      sdio1-pwr                 	      x         emmc       emmc-clk                        v      emmc-cmd                        x      emmc-pwr                  	      x      emmc-bus1                        x      emmc-bus4         @               x            x            x            x      emmc-bus8                        x            x            x            x            x            x            x            x         spi0       spi0-clk                        x        b         spi0-cs0                        x        b         spi0-tx                     x        b         spi0-rx                     x        b         spi0-cs1                        x         spi1       spi1-clk                        x        b          spi1-cs0                        x        b   #      spi1-rx                     x        b   "      spi1-tx                     x        b   !         spi2       spi2-cs1                        x      spi2-clk                        x        b   $      spi2-cs0                        x        b   '      spi2-rx                     x        b   &      spi2-tx               	      x        b   %         uart0      uart0-xfer                       x            v        b   ,      uart0-cts                       x      uart0-rts                       v         uart1      uart1-xfer                       x      	      v        b   -      uart1-cts                 
      x      uart1-rts                       v         uart2      uart2-xfer                       x            v        b   .         uart3      uart3-xfer                       x            v        b   /      uart3-cts                 	      x      uart3-rts                 
      v         uart4      uart4-xfer                       x            v        b   0      uart4-cts                       x      uart4-rts                       v         tsadc      otp-pin                
       v        b   6      otp-out                
      v        b   7         pwm0       pwm0-pin                         v        b   H         pwm1       pwm1-pin                        v        b   I         pwm2       pwm2-pin                        v        b   J         pwm3       pwm3-pin                        v        b   K         gmac       rgmii-pins                      v            v            v            v            |            |            |            |             v            v            v      	      |            |            v            v        b   ;      rmii-pins                       v            v            v            v             v            v            v            v            v            v         spdif      spdif-tx                        v        b   [         pcfg-pull-none-drv-8ma                     b   z      pcfg-pull-up-drv-8ma                                b   {      backlight      bl-en                        v         buttons    pwrbtn                        x        b   }         eth_phy    eth-phy-pwr                       v         pmic       pmic-int                          x        b   B      dvs-1                         y        b   D      dvs-2                         y        b   E         usb    host-vbus-drv                         v      pwr-3g                       v         sdio       wifi-enable                       v             v        b               chosen          serial2:115200n8          memory                                   memory        external-gmac-clock          fixed-clock                     sY@      	  ext_gmac            b   9      gpio-keys         
   gpio-keys                                              |default            }   button@0            w   A              	   t        	GPIO Key Power          	                    	(   d         gpio-leds         
   gpio-leds      led-0           w   ~               	:mmc0          led-1           w   ~             
  	:heartbeat         led-2           w   A               	:default-on           sdio-pwrseq          mmc-pwrseq-simple           5            
  ext_clock           |default                    	P   <         <              b         sound            simple-audio-card           	\i2s         	urockchip,tinker-codec           	      simple-audio-card,codec         	         simple-audio-card,cpu           	            vsys-regulator           regulator-fixed         vcc_sys         f LK@        ~ LK@         @         T        b   F      sdmmc-regulator          regulator-fixed                          |default                    vcc_sd          f 2Z        ~ 2Z        	         	            	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed broken-cd disable-wp pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 #io-channel-cells vref-supply dmas dma-names reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-mode phy-supply snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size dvs-gpios rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vddio-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength stdout-path autorepeat linux,code label linux,input-type debounce-interval linux,default-trigger reset-gpios simple-audio-card,format simple-audio-card,name simple-audio-card,mclk-fs sound-dai startup-delay-us vin-supply 