  _   8     (            S                                                          google,veyron-fievel-rev8 google,veyron-fievel-rev7 google,veyron-fievel-rev6 google,veyron-fievel-rev5 google,veyron-fievel-rev4 google,veyron-fievel-rev3 google,veyron-fievel-rev2 google,veyron-fievel-rev1 google,veyron-fievel-rev0 google,veyron-fievel google,veyron rockchip,rk3288             &            7Google Fievel      aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V   	        b         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        b            opp-table-0          operating-points-v2          j        b      opp-126000000           u            |       opp-216000000           u             |       opp-408000000           u    Q         |       opp-600000000           u    #F         |       opp-696000000           u    )|         | ~      opp-816000000           u    0,         | B@      opp-1008000000          u    <         |       opp-1200000000          u    G         |       opp-1416000000          u    Tfr         | O      opp-1512000000          u    ZJ         |       opp-1608000000          u    _"         |        opp-1704000000          u    e         | p      opp-1800000000          u    kI         | \         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      b   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                          H           5     a   
        pclk timer        display-subsystem            rockchip,display-subsystem                      mmc@ff0c0000             rockchip,rk3288-dw-mshc         р         5           D      r      v        biu ciu ciu-drive ciu-sample                                                        @                        'reset         	  3disabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         р         5           E      s      w        biu ciu ciu-drive ciu-sample                               !                        @                        'reset           3okay            :            D         U         b        x                    default                                                                                                         btmrvl@2             marvell,sd8897-bt                        &                                     default                     mmc@ff0e0000             rockchip,rk3288-dw-mshc         р         5           F      t      x        biu ciu ciu-drive ciu-sample                               "                        @                        'reset         	  3disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         р         5           G      u      y        biu ciu ciu-drive ciu-sample                               #                        @                        'reset           3okay            :            
                    :         E        x                    default                        saradc@ff100000          rockchip,saradc                                       $           T           5      I     [        saradc apb_pclk                W        'saradc-apb        	  3disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk         f                    ktx rx                   ,           default                                                                           	  3disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk         f                    ktx rx                   -           default                      !                                                      	  3disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk         f                    ktx rx                   .           default            "   #   $   %                                                        3okay            u      flash@0          jedec,spi-nor                                 i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        default            &        3okay                        2           d   tpm@20           infineon,slb9645tt                                 i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        default            '      	  3disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        default            (        3okay                        2          ,   ts3a227e@3b          ti,ts3a227e             ;         &   )                       default            *                   b            i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        default            +      	  3disabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                                 5      M     U        baudclk apb_pclk            f                    ktx rx           default            ,   -   .        3okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                                 5      N     V        baudclk apb_pclk            f                    ktx rx           default            /        3okay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                                 5      O     W        baudclk apb_pclk            default            0        3okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                                 5      P     X        baudclk apb_pclk            f                    ktx rx           default            1      	  3disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                                 5      Q     Y        baudclk apb_pclk            f      	      
        ktx rx           default            2      	  3disabled          dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                                           )        5            	  apb_pclk            b         thermal-zones      reserve-thermal         @          V          d   3          cpu-thermal         @   d        V          d   3      trips      cpu_alert0          t p                   passive         b   4      cpu_alert1          t $                   passive         b   5      cpu_crit            t                 	   critical             cooling-maps       map0               4      0                                map1               5      0                          gpu-thermal         @   d        V          d   3      trips      gpu_alert0          t 4                   passive         b   6      gpu_crit            t                 	   critical             cooling-maps       map0               6           7               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  'tsadc-apb           init default sleep             8           9           8                      :         H        3okay                                  b   3      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              macirq eth_wake_irq            :      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  'stmmaceth           3okay            /              ?   ;        Vinput           c   <        nrgmii           w   =        default            >   ?   @   A                      0                                         '  u0            mdio0            snps,dwmac-mdio                              ethernet-phy@1                      b   <            usb@ff500000             generic-ehci                 P                                    5                B        usb         3okay                   usb@ff520000             generic-ohci                 R                         )           5                B        usb       	  3disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         host               C      	  usb2-phy             
        3okay             !      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         host            8           J          Y            @   @               D      	  usb2-phy            3okay            /      z        ?   D         !      usb@ff5c0000             generic-ehci                 \                                    5           	  3disabled          dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                                            )        5            	  apb_pclk          	  3disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        default            E        3okay                        2           d   pmic@1b          rockchip,rk808                      xin32k wifibt_32kin          &   )                       default            F   G   H         h                                                                                                                       I                      J          J                  K        b      regulators     DCDC_REG1           vdd_arm          *         >        P q        h            q        b   	   regulator-state-mem                   DCDC_REG2           vdd_gpu          *         >        P 5         h           q        b      regulator-state-mem                   DCDC_REG3           vcc135_ddr           *         >   regulator-state-mem                   DCDC_REG4           vcc_18           *         >        P w@        h w@        b      regulator-state-mem                   w@         LDO_REG3            vdd_10           *         >        P B@        h B@   regulator-state-mem                   B@         LDO_REG7          
  vdd10_lcd            *         >        P B@        h B@   regulator-state-mem                   SWITCH_REG1       
  vcc33_lcd            *         >        b   a   regulator-state-mem                   LDO_REG6            vcc18_codec          *         >        P w@        h w@        b   b   regulator-state-mem                   LDO_REG2             *         >        P w@        h w@        vdd18_lcdt     regulator-state-mem                   LDO_REG8             *         >        P 2Z        h 2Z      
  vcc33_ccd      regulator-state-mem                   SWITCH_REG2       
  vcc33_lan           b   =               i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        default            L        3okay                        2              max98090@10          maxim,max98090                       &   M                       mclk            5      q        default            N        b            pwm@ff680000             rockchip,rk3288-pwm              h                            default            O        5     _      	  3disabled          pwm@ff680010             rockchip,rk3288-pwm              h                           default            P        5     _        3okay            b         pwm@ff680020             rockchip,rk3288-pwm              h                            default            Q        5     _      	  3disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0                          default            R        5     _      	  3disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 b      power-controller          !   rockchip,rk3288-power-controller                                                 /      h        ?   
        b   f   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     S   T   U   V   W   X   Y   Z   [                  power-domain@11                     5            o      p           \   ]                  power-domain@12                     5                      ^                  power-domain@13                     5                 _   `                     reboot-mode          syscon-reboot-mode                     RB         RB        )RB	        9RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                 5   
        xin24m             :                   E         H  /                                  j                k      $  R#gׄ e  рxh рxh        b         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 b   :   edp-phy          rockchip,rk3288-dp-phy          5      h        24m         g          	  3disabled            b   v      io-domains        "   rockchip,rk3288-io-voltage-domain           3okay            r   I        |                         I           I           a                      b      usbphy           rockchip,rk3288-usb-phy                                   3okay       usb-phy@320         g                        5      ]        phyclk                                   
  'phy-reset           b   D      usb-phy@334         g               4        5      ^        phyclk                                   
  'phy-reset           b   B      usb-phy@348         g               H        5      _        phyclk                                   
  'phy-reset           b   C            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O           3okay          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                           5      T           
  mclk hclk           f   c           ktx                  6           default            d           :      	  3disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                   5           5      R             i2s_clk i2s_hclk            f   c       c           ktx rx           default            e                   	           3okay            b         crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        'crypto-rst        iommu@ff900800           rockchip,iommu                       @                           5                   aclk iface          	          	  3disabled          iommu@ff914000           rockchip,iommu                @            P                                   5                   aclk iface          	             	+      	  3disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk          	F   f   	               i      l      m        'core axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop          	F   f   	               d      e      f        'axi ahb dclk            	T   g        3okay       port                                      b      endpoint@0                       	[   h        b   {      endpoint@1                      	[   i        b   w      endpoint@2                      	[   j        b   q      endpoint@3                      	[   k        b   t            iommu@ff930300           rockchip,iommu                                                  5                   aclk iface          	F   f   	        	            3okay            b   g      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop          	F   f   	                                   'axi ahb dclk            	T   l      	  3disabled       port                                      b      endpoint@0                       	[   m        b   |      endpoint@1                      	[   n        b   x      endpoint@2                      	[   o        b   r      endpoint@3                      	[   p        b   u            iommu@ff940300           rockchip,iommu                                                  5                   aclk iface          	F   f   	        	          	  3disabled            b   l      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk            	F   f   	           :      	  3disabled       ports      port                                 endpoint@0                       	[   q        b   j      endpoint@1                      	[   r        b   o               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           lcdc               s        	F   f   	           :      	  3disabled       ports                                port@0                                            endpoint@0                       	[   t        b   k      endpoint@1                      	[   u        b   p               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk            v        dp                 o        'dp             :      	  3disabled       ports                                port@0                                            endpoint@0                       	[   w        b   i      endpoint@1                      	[   x        b   n               hdmi@ff980000            rockchip,rk3288-dw-hdmi                                                         :                g           5     h      m      n        iahb isfr cec           	F   f   	        3okay            default unwedge            y           z        b      ports      port                                 endpoint@0                       	[   {        b   h      endpoint@1                      	[   |        b   m               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  vepu vdpu           5                 
  aclk hclk           	T   }        	F   f         iommu@ff9a0800           rockchip,iommu                                                  5                   aclk iface          	            	F   f           b   }      iommu@ff9c0440           rockchip,iommu                @       @           @                o           5                   aclk iface          	          	  3disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         job mmu gpu         5                 ~                   	F   f           3okay            	k           b   7      opp-table-1          operating-points-v2         b   ~   opp-100000000           u             | ~      opp-200000000           u             | ~      opp-300000000           u             | B@      opp-400000000           u    ׄ         |       opp-600000000           u    #F         |          qos@ffaa0000             rockchip,rk3288-qos syscon                                 b   _      qos@ffaa0080             rockchip,rk3288-qos syscon                                b   `      qos@ffad0000             rockchip,rk3288-qos syscon                                 b   T      qos@ffad0100             rockchip,rk3288-qos syscon                                b   U      qos@ffad0180             rockchip,rk3288-qos syscon                               b   V      qos@ffad0400             rockchip,rk3288-qos syscon                                b   W      qos@ffad0480             rockchip,rk3288-qos syscon                               b   X      qos@ffad0500             rockchip,rk3288-qos syscon                                b   S      qos@ffad0800             rockchip,rk3288-qos syscon                                b   Y      qos@ffad0880             rockchip,rk3288-qos syscon                               b   Z      qos@ffad0900             rockchip,rk3288-qos syscon               	                 b   [      qos@ffae0000             rockchip,rk3288-qos syscon                                 b   ^      qos@ffaf0000             rockchip,rk3288-qos syscon                                 b   \      qos@ffaf0080             rockchip,rk3288-qos syscon                                b   ]      dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                                            )        5            	  apb_pclk            b   c      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          	w        	                       @                                 @             `                        	          b         pinctrl          rockchip,rk3288-pinctrl            :                                                      default sleep                                                                gpio@ff750000            rockchip,gpio-bank               u                         Q           5     @         	        	            	w        	           	PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L HUB_USB1_nFALUT PHY_PMEB PHY_INT RECOVERY_SW_L OTP_OUT  USB_OTG_POWER_EN AP_WARM_RESET_H USB_OTG_nFALUT I2C0_SDA_PMIC I2C0_SCL_PMIC DEVMODE_L USB_INT            b   )      gpio@ff780000            rockchip,gpio-bank               x                         R           5     A         	        	            	w        	         gpio@ff790000            rockchip,gpio-bank               y                         S           5     B         	        	            	w        	         i  	CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L   BL_PWR_EN  TOUCH_INT TOUCH_RST I2C3_SCL_TP I2C3_SDA_TP            b         gpio@ff7a0000            rockchip,gpio-bank               z                         T           5     C         	        	            	w        	           	FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7 VCC5V_GOOD_H        FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO      PHY_TXD2 PHY_TXD3 MAC_RXD2 MAC_RXD3 PHY_TXD0 PHY_TXD1 MAC_RXD0 MAC_RXD1        gpio@ff7b0000            rockchip,gpio-bank               {                         U           5     D         	        	            	w        	           	MAC_MDC MAC_RXDV MAC_RXER MAC_CLK PHY_TXEN MAC_MDIO MAC_RXCLK  PHY_RST PHY_TXCLK       UART0_RXD UART0_TXD UART0_CTS_L UART0_RTS_L SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE           b         gpio@ff7c0000            rockchip,gpio-bank               |                         V           5     E         	        	            	w        	           	            USB_OTG_CTL1 HUB_USB2_CTL1 HUB_USB2_PWR_EN HUB_USB_ILIM_SEL USB_OTG_STATUS_L HUB_USB1_CTL1 HUB_USB1_PWR_EN VCC50_HDMI_EN            b         gpio@ff7d0000            rockchip,gpio-bank               }                         W           5     F         	        	            	w        	           	I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H  INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     HUB_USB2_nFALUT USB_OTG_ILIM_SEL           b   M      gpio@ff7e0000            rockchip,gpio-bank               ~                         X           5     G         	        	            	w        	           	LCD_BL_PWM PWM_LOG BL_EN PWR_LED1 TPM_INT_H SPK_ON AP_FLASH_WP_L  CPU_NMI DVSOK  EDP_HPD DVS1  LCD_EN DVS2 HDMI_CEC I2C4_SDA I2C4_SCL I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD            b   J      gpio@ff7f0000            rockchip,gpio-bank                                        Y           5     H         	        	            	w        	         ^  	RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         	                  hdmi-cec-c7         	                  hdmi-ddc             	                                b   y      hdmi-ddc-unwedge             	                                 b   z      vcc50-hdmi-en           	                     b            pcfg-output-low          	        b         pcfg-pull-up             	        b         pcfg-pull-down           	        b         pcfg-pull-none           	        b         pcfg-pull-none-12ma          	        
           b         suspend    global-pwroff           	                      b         ddrio-pwroff            	                     b         ddr0-retention          	                     b         ddr1-retention          	                      edp    edp-hpd         	                     i2c0       i2c0-xfer            	                                  b   E         i2c1       i2c1-xfer            	                                b   &         i2c2       i2c2-xfer            	      	            
              b   L         i2c3       i2c3-xfer            	                                b   '         i2c4       i2c4-xfer            	                                b   (         i2c5       i2c5-xfer            	                                b   +         i2s0       i2s0-bus          `  	                                                                                 b   e         lcdc       lcdc-ctl          @  	                                                        b   s         sdmmc      sdmmc-clk           	                  sdmmc-cmd           	                  sdmmc-cd            	                  sdmmc-bus1          	                  sdmmc-bus4        @  	                                                         sdio0      sdio0-bus1          	                  sdio0-bus4        @  	                                                        b         sdio0-cmd           	                    b         sdio0-clk           	                    b         sdio0-cd            	                  sdio0-wp            	                  sdio0-pwr           	                  sdio0-bkpwr         	                  sdio0-int           	                  wifienable-h            	                     b         bt-enable-l         	                   bt-host-wake            	                   bt-host-wake-l          	                     b         bt-dev-wake-sleep           	                     b         bt-dev-wake-awake           	                     b         bt-dev-wake         	                      sdio1      sdio1-bus1          	                  sdio1-bus4        @  	                                                      sdio1-cd            	                  sdio1-wp            	                  sdio1-bkpwr         	                  sdio1-int           	                  sdio1-cmd           	                  sdio1-clk           	                  sdio1-pwr           	      	               emmc       emmc-clk            	                    b         emmc-cmd            	                    b         emmc-pwr            	      	            emmc-bus1           	                   emmc-bus4         @  	                                                       emmc-bus8           	                                                                                                         b         emmc-reset          	      	               b            spi0       spi0-clk            	                    b         spi0-cs0            	                    b         spi0-tx         	                    b         spi0-rx         	                    b         spi0-cs1            	                     spi1       spi1-clk            	                    b         spi1-cs0            	                    b   !      spi1-rx         	                    b          spi1-tx         	                    b            spi2       spi2-cs1            	                  spi2-clk            	                    b   "      spi2-cs0            	                    b   %      spi2-rx         	                    b   $      spi2-tx         	      	              b   #         uart0      uart0-xfer           	                                b   ,      uart0-cts           	                    b   -      uart0-rts           	                    b   .         uart1      uart1-xfer           	                  	              b   /      uart1-cts           	      
            uart1-rts           	                     uart2      uart2-xfer           	                                b   0         uart3      uart3-xfer           	                                b   1      uart3-cts           	      	            uart3-rts           	      
               uart4      uart4-xfer           	                                b   2      uart4-cts           	                  uart4-rts           	                     tsadc      otp-pin         	       
               b   8      otp-out         	       
              b   9         pwm0       pwm0-pin            	                     b   O         pwm1       pwm1-pin            	                    b   P         pwm2       pwm2-pin            	                    b   Q         pwm3       pwm3-pin            	                    b   R         gmac       rgmii-pins          	                                                                                                                                           	                                                  b   >      rmii-pins           	                                                                                                                               phy-rst         	                     b   ?      phy-pmeb            	                      b   @      phy-int         	                      b   A         spdif      spdif-tx            	                    b   d         pcfg-pull-none-drv-8ma           	        
           b         pcfg-pull-up-drv-8ma             	        
         pcfg-output-high             
        b         buttons    pwr-key-l           	                      b            pmic       pmic-int-l          	                      b   F      dvs-1           	                     b   G      dvs-2           	                     b   H         reboot     ap-warm-reset-h         	                      b            recovery-switch    rec-mode-l          	       	                tpm    tpm-int-h           	                      write-protect      fw-wp-ap            	                      codec      hp-det          	                     b         int-codec           	                     b   N      mic-det         	                     b            headset    ts3a227e-int-l          	                      b   *         buck-5v    drv-5v          	                     b            leds       pwr-led1-on         	                     b         pwr-led1-blink          	                     b            usb-bc12       usb-otg-ilim-sel            	                     b         usb-usb-ilim-sel            	                     b            usb-host       hub_usb1_pwr_en         	                     b         hub_usb2_pwr_en         	                     b         usb_otg_pwr_en          	                      b               chosen          
&serial2:115200n8          memory           memory                                power-button          
   gpio-keys           default               power           
2Power              )              
8   t        
C   d                  gpio-restart             gpio-restart               )               default                    
U         emmc-pwrseq          mmc-pwrseq-emmc                    default         
^      	            b         sdio-pwrseq          mmc-pwrseq-simple           5            
  ext_clock           default                    
^                 b         vcc-5v           regulator-fixed         vcc_5v           *         >        P LK@        h LK@         
j           J               default                    b   K      vcc33-sys            regulator-fixed       
  vcc33_sys            *         >        P 2Z        h 2Z        b         vcc50-hdmi           regulator-fixed         vcc50_hdmi           *         >        
}   K         
j                          default                  vdd-logic            pwm-regulator         
  vdd_logic           
                     
           
   {            
            *         >        P ~        h p                sound         !   rockchip,rockchip-audio-max98090            default                       
VEYRON-I2S          
           
           
   M                  M              (           ?         vccsys           regulator-fixed         vccsys           >         *      vcc33-io             regulator-fixed          *         >      	  vcc33_io            b   I      vcc5-host1-regulator             regulator-fixed          
j                          default                    vcc5_host1           *         >      vcc5-host2-regulator             regulator-fixed          
j                          default                    vcc5_host2           *         >      vcc5v-otg-regulator          regulator-fixed          
j           )               default                  	  vcc5_otg             *         >      external-gmac-clock          fixed-clock                     sY@      	  ext_gmac            b   ;         	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply marvell,wakeup-pin cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended ti,micbias reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-handle phy-mode phy-supply rx_delay tx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us wakeup-source phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply dvs-gpios vcc11-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios enable-active-high vin-supply pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec 