  yS   8  r<   (              r                                                                   $   ,SolidRun i.MX8MQ HummingBoard Pulse       '   2solidrun,hummingboard-pulse fsl,imx8mq     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          $   /soc@0/bus@30800000/serial@30860000       $   /soc@0/bus@30800000/serial@30890000       $   /soc@0/bus@30800000/serial@30880000       $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30820000          !   /soc@0/bus@30800000/spi@30830000          !   /soc@0/bus@30800000/spi@30840000          clock-ckil           2fixed-clock                                   ckil                      clock-osc-25m            2fixed-clock                       }x@         osc_25m                   clock-osc-27m            2fixed-clock                                osc_27m                   clock-ext1           2fixed-clock                       k@      	   clk_ext1                      clock-ext2           2fixed-clock                       k@      	   clk_ext2                      clock-ext3           2fixed-clock                       k@      	   clk_ext3                      clock-ext4           2fixed-clock                       k@      	   clk_ext4                      cpus                                 cpu@0            cpu          2arm,cortex-a53                          l                     psci                       .           B           Q           ]speed_grade                   cpu@1            cpu          2arm,cortex-a53                         l                     psci                       .           B                     cpu@2            cpu          2arm,cortex-a53                         l                     psci                       .           B               	      cpu@3            cpu          2arm,cortex-a53                         l                     psci                       .           B               
      l2-cache0            2cache                        opp-table            2operating-points-v2          n               opp-800000000           y    /                                 I               opp-1000000000          y    ;                                 I               opp-1300000000          y    M|m          B@                       I               opp-1500000000          y    Yh/          B@                       I                  pmu          2arm,cortex-a53-pmu                                                 	   
      psci             2arm,psci-1.0            smc       thermal-zones      cpu-thermal                                        trips      cpu-alert            8                   passive                   cpu-crit             _                	   critical             cooling-maps       map0            %         0  *         	   
            gpu-thermal                                       trips      gpu-alert            8                   passive                   gpu-crit             _                	   critical             cooling-maps       map0            %           *               vpu-thermal                                       trips      vpu-crit             _                	   critical                   timer            2arm,armv8-timer       0                                   
                         9      soc@0            2simple-bus                                   P            >           W@       @         bus@30000000             2fsl,aips-bus simple-bus          0    @                                   P0   0    @     sai@30010000            b             2fsl,imx8mq-sai           0                    _                                              sbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30030000            b             2fsl,imx8mq-sai           0                    Z                                              sbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30040000            b             2fsl,imx8mq-sai           0                    Z                                              sbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000            b             2fsl,imx8mq-sai           0                    d                                              sbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          gpio@30200000            2fsl,imx8mq-gpio fsl,imx35-gpio           0                     @          A                                                                          
               +      gpio@30210000            2fsl,imx8mq-gpio fsl,imx35-gpio           0!                    B          C                                                                          (               6      gpio@30220000            2fsl,imx8mq-gpio fsl,imx35-gpio           0"                    D          E                                                                          =         gpio@30230000            2fsl,imx8mq-gpio fsl,imx35-gpio           0#                    F          G                                                                          W          gpio@30240000            2fsl,imx8mq-gpio fsl,imx35-gpio           0$                    H          I                                                                          w         tmu@30260000             2fsl,imx8mq-tmu           0&                    1                                      
 &  H  a     @         #      )      /      5      =      C      K      Q      W   	   _   
   g      o           #     +     3     ;     C     K     U     ]  	   g  
   p           #     -     7     A     K     W     c     o           !     -     9     E     S     _     q                             watchdog@30280000            2fsl,imx8mq-wdt fsl,imx21-wdt             0(                    N                         okay            )default         7            A      watchdog@30290000            2fsl,imx8mq-wdt fsl,imx21-wdt             0)                    O                       	  disabled          watchdog@302a0000            2fsl,imx8mq-wdt fsl,imx21-wdt             0*                    
                       	  disabled          sdma@302c0000            2fsl,imx8mq-sdma fsl,imx7d-sdma           0,                    g                               sipg ahb         V           aimx/sdma/sdma-imx7d.bin                   lcd-controller@30320000       !   2fsl,imx8mq-lcdif fsl,imx28-lcdif             02                                             spix          z      !      $            #                    #      %                    #g      	  disabled       port       endpoint                           '            pinctrl@30330000             2fsl,imx8mq-iomuxc            03             )default         7                  fec1grp      h     h                    l              #   p                    t                    x                    |                                                                                                                                                                                     L                             9      i2c1grp       0      |            @                  @              (      pcie0grp          H    ,    $          t    X                                      qspigrp              \                   `                  t                  x                  |                                            8      uart1grp          H    4               I  8                 I     d                                 uart4grp          H    P                 I  L              I    H                          .      usdhc1grp                                                                                                                                                             $                    (                    ,                    4                    0                           /      usdhc1-100mhzgrp                                                                                                                                                              $                    (                    ,                    4                    0                           0      usdhc1-200mhzgrp                                                                                                                                                              $                    (                    ,                    4                    0                           1      wdoggrp            0                                  hoggrp        `                     A                   A    d              A     h              A                  i2c2grp       0                  @                   @              )      i2c3grp       0    $              @    (              @              -      typecgrp          0    0                   @               pY            *      uart2grp          0    @                 I  <               I            "      uart3grp          0    H                 I  D              I            !      usdhc2gpiogrp                8              A            3      usdhc2vmmcgpiogrp              \                 A            C      usdhc2grp                <                    @                    D                    H                    L                    P                  8                            2      usdhc2-100mhzgrp                 <                    @                    D                    H                    L                    P                  8                            4      usdhc2-200mhzgrp                 <                    @                    D                    H                    L                    P                  8                            5         syscon@30340000       =   2fsl,imx8mq-iomuxc-gpr fsl,imx6q-iomuxc-gpr syscon simple-mfd             04        mux-controller        	   2mmio-mux                          4               #         efuse@30350000           2fsl,imx8mq-ocotp syscon          05                                               speed-grade@10                                      syscon@30360000          2fsl,imx8mq-anatop syscon             06                    1         snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd           07                    snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                               	  ssnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                                   ssnvs-pwrkey            t               	  disabled             clock-controller@30380000            2fsl,imx8mq-ccm           08                    U          V                                                  9  sckil osc_25m osc_27m clk_ext1 clk_ext2 clk_ext3 clk_ext4            z      X     !      q                /               N                        reset-controller@30390000            2fsl,imx8mq-src syscon            09                    Y                          &      gpc@303a0000             2fsl,imx8mq-gpc           0:                    W                                                   pgc                              power-domain@0          '                             $      power-domain@1          '                        ;               B      power-domain@2          '                            =      power-domain@3          '                            @      power-domain@4          '                      power-domain@5          '                                     f      o      p        I               ;      power-domain@6          '                                      I               A      power-domain@7          '                      power-domain@8          '                      power-domain@9          '                	      power-domain@a          '                
                           bus@30400000             2fsl,aips-bus simple-bus          0@   @                                   P0@  0@   @     pwm@30660000             2fsl,imx8mq-pwm fsl,imx27-pwm             0f                    Q                               sipg per         V         	  disabled          pwm@30670000             2fsl,imx8mq-pwm fsl,imx27-pwm             0g                    R                               sipg per         V         	  disabled          pwm@30680000             2fsl,imx8mq-pwm fsl,imx27-pwm             0h                    S                               sipg per         V         	  disabled          pwm@30690000             2fsl,imx8mq-pwm fsl,imx27-pwm             0i                    T                               sipg per         V         	  disabled          timer@306a0000           2nxp,sysctr-timer             0j                    /                      sper          bus@30800000             2fsl,aips-bus simple-bus          0   @                                   P0  0   @              spi@30820000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0                                                   sipg per       	  disabled          spi@30830000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0                                                    sipg per       	  disabled          spi@30840000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0                    !                               sipg per       	  disabled          serial@30860000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   sipg per         okay            )default         7            z                            }x@      serial@30880000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   sipg per         okay            )default         7   !        z                    G         a      serial@30890000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   sipg per         okay            )default         7   "        z                          sai@308b0000            b             2fsl,imx8mq-sai           0                    `                                              sbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          sai@308c0000            b             2fsl,imx8mq-sai           0                    2                                              sbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          crypto@30900000          2fsl,sec-v4.0                                      0             P    0                    [                 t            	  saclk ipg       jr@1000          2fsl,sec-v4.0-job-ring                                 i         jr@2000          2fsl,sec-v4.0-job-ring                                  j         jr@3000          2fsl,sec-v4.0-job-ring              0                   r            mipi-dsi@30a00000            2fsl,imx8mq-nwl-dsi           0           (                                      !  score rx_esc tx_esc phy_ref lcdif            z                                G      L        Ĵ ր1-                "           q   #            ;   $        ~   %        dphy                &      &      &      &           byte dpi esc pclk         	  disabled       ports                                port@0                                            endpoint@0                          '                           dphy@30a00300            2fsl,imx8mq-mipi-dphy             0                          sphy_ref         z                    %        n6                     ;   $      	  disabled                %      i2c@30a20000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    #                                                   okay            )default         7   (             pmic@8           2fsl,pfuze100                   regulators     sw1ab                     8                  sw1c                      8                  sw2          5          2Z               sw3ab                     "               sw4          5          2Z               swbst            LK@         N0      vsnvs            B@         -               vrefddr                vgen1            5                vgen2            5                         vgen3            w@         2Z               vgen4            w@         2Z               vgen5            w@         2Z               vgen6            w@         2Z            eeprom@50            2atmel,24c01             P        okay             i2c@30a30000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    $                                                   okay            )default         7   )             usb-typec@50             2nxp,ptn5110             P        )default         7   *             +                 connector            2usb-c-connector         USB-C           dual            dual            
sink                    %        / T@   port       endpoint               ,            >                  i2c@30a40000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    %                                                   okay            )default         7   -             eeprom@57            2atmel,24c02             W        okay          rtc@69           2abracon,ab1805              i      	  Aschottky            R            i2c@30a50000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    &                                                 	  disabled          serial@30a60000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   sipg per         okay            )default         7   .        z                    G        Ĵ       mailbox@30aa0000             2fsl,imx8mq-mu fsl,imx6sx-mu          0                    X                         f         mmc@30b40000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0                                           i              sipg ahb per         r                                 okay            z              ׄ       "  )default state_100mhz state_200mhz           7   /           0           1               mmc@30b50000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0                                           i              sipg ahb per         r                                 okay            z                     "  )default state_100mhz state_200mhz           7   2   3           4   3           5   3           6                 7      spi@30bb0000                                       2fsl,imx8mq-qspi fsl,imx7d-qspi           0                   QuadSPI QuadSPI-memory                 k                               sqspi_en qspi            okay            )default         7   8   flash@0                                                2micron,n25q256a jedec,spi-nor           @      	  disabled             sdma@30bd0000            2fsl,imx8mq-sdma fsl,imx7d-sdma           0                                           t        sipg ahb         V           aimx/sdma/sdma-imx7d.bin                   ethernet@30be0000            2fsl,imx8mq-fec fsl,imx6sx-fec            0           0         v          w          x          y         (                                      "  sipg ahb ptp enet_clk_ref enet_out                                 okay            )default         7   9      	  rgmii-id            !   :         ,   mdio                                 ethernet-phy@4           2ethernet-phy-ieee802.3-c22                      =   +   	           I              :               bus@32c00000             2fsl,aips-bus simple-bus          2   @                                   P2  2   @     interrupt-controller@32e2d000         $   2fsl,imx8m-irqsteer fsl,imx-irqsteer          2                                            sipg         Y            e   @                             gpu@38000000             2vivante,gc           8                                             f      o      p        score shader bus reg         B         (  z      a      d      o      p            (                                        / / / /             ;   ;                  usb@38100000             2fsl,imx8mq-dwc3 snps,dwc3            8                                       sbus_early ref suspend           z      n                    V      H        e                 (           ~   <   <        usb2-phy usb3-phy           ;   =         r        okay            otg    port       endpoint               >            ,            usb-phy@381f0040             2fsl,imx8mq-usb-phy           8 @   @                      sphy         z                    H                             okay                <      usb@38200000             2fsl,imx8mq-dwc3 snps,dwc3            8                                        sbus_early ref suspend           z      n                    V      H        e                 )           ~   ?   ?        usb2-phy usb3-phy           ;   @         r        okay            host          usb-phy@382f0040             2fsl,imx8mq-usb-phy           8/ @   @                      sphy         z                    H                             okay                ?      video-codec@38300000             2nxp,imx8mq-vpu           80     81     82             g1 g2 ctrl                                      g1 g2                                   
  sg1 g2 bus            z      x      y      j                                 N              #F #F /             ;   A      pcie@33800000            2fsl,imx8mq-pcie          3   @               dbi config                                    pci                      0  P                                                                            z           msi                                                                    }                            |                            {                            z                      ;   B           &      &      &           pciephy apps turnoff            z      |      }      ~              T      P      G        沀        	  disabled          pcie@33c00000            2fsl,imx8mq-pcie          3   @  '             dbi config                                    pci       0  P           '                                                                   J           msi                                                                    M                            L                            K                            J                      ;   B           &   "   &   $   &   %        pciephy apps turnoff            z                                T      P      G        沀        	  disabled          interrupt-controller@38800000            2arm,gic-v3        (   8     8     1       1      1                                        	                                  memory-controller@3d400000           2fsl,imx8mq-ddrc fsl,imx8m-ddrc           =@   @          score pll alt apb                               v      w      ddr-pmu@3d800000          %   2fsl,imx8mq-ddr-pmu fsl,imx8m-ddr-pmu             =   @                              b            regulator-vdd-3v3            2regulator-fixed                  vdd_3v3          2Z         2Z      chosen        $  /soc@0/bus@30800000/serial@30860000       regulator-usdhc2-vmmc            2regulator-fixed         )default         7   C        VSD_3V3          2Z         2Z           +                  7      regulator-v-5v0          2regulator-fixed         v_5v0            LK@         LK@                  	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 serial0 serial1 serial2 serial3 spi0 spi1 spi2 #clock-cells clock-frequency clock-output-names phandle device_type reg clock-latency clocks enable-method next-level-cache operating-points-v2 #cooling-cells nvmem-cells nvmem-cell-names opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend interrupts interrupt-affinity polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend ranges dma-ranges #sound-dai-cells clock-names dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges little-endian fsl,tmu-range fsl,tmu-calibration #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name assigned-clocks assigned-clock-parents assigned-clock-rates remote-endpoint fsl,pins #mux-control-cells mux-reg-masks regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells power-domains power-supply #pwm-cells uart-has-rtscts mux-controls phys phy-names resets reset-names #phy-cells regulator-min-microvolt regulator-max-microvolt regulator-always-on label data-role power-role try-power-role source-pdos sink-pdos op-sink-microwatt abracon,tc-diode abracon,tc-resistor #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 non-removable cd-gpios vmmc-supply reg-names spi-max-frequency fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet reset-gpios reset-assert-us fsl,channel fsl,num-irqs usb3-resume-missing-cas dr_mode interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed regulator-name stdout-path gpio 