  u   8  n   (              nT                                                                      ,Google i.MX8MQ Phanbell       "   2google,imx8mq-phanbell fsl,imx8mq      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          $   /soc@0/bus@30800000/serial@30860000       $   /soc@0/bus@30800000/serial@30890000       $   /soc@0/bus@30800000/serial@30880000       $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30820000          !   /soc@0/bus@30800000/spi@30830000          !   /soc@0/bus@30800000/spi@30840000          clock-ckil           2fixed-clock                                   ckil                      clock-osc-25m            2fixed-clock                       }x@         osc_25m                   clock-osc-27m            2fixed-clock                                osc_27m                   clock-ext1           2fixed-clock                       k@      	   clk_ext1                      clock-ext2           2fixed-clock                       k@      	   clk_ext2                      clock-ext3           2fixed-clock                       k@      	   clk_ext3                      clock-ext4           2fixed-clock                       k@      	   clk_ext4                      cpus                                 cpu@0            cpu          2arm,cortex-a53                          l                     psci                       .           B           Q           ]speed_grade         n                     cpu@1            cpu          2arm,cortex-a53                         l                     psci                       .           B           n               	      cpu@2            cpu          2arm,cortex-a53                         l                     psci                       .           B           n               
      cpu@3            cpu          2arm,cortex-a53                         l                     psci                       .           B           n                     l2-cache0            2cache                        opp-table            2operating-points-v2          y               opp-800000000               /                                 I               opp-1000000000              ;                                 I               opp-1300000000              M|m          B@                       I               opp-1500000000              Yh/          B@                       I                  pmu          2arm,cortex-a53-pmu                                              	   
         psci             2arm,psci-1.0            smc       thermal-zones      cpu-thermal                              	          trips      cpu-alert            8        %           passive       cpu-crit             _        %        	   critical          trip0            $        %           passive                   trip1            8        %           passive                   trip3            _        %        	   critical          trip4                     %  '         active                       cooling-maps       map0            0           5                map1            0           5                map4            0           5                      gpu-thermal                              	         trips      gpu-alert            8        %           passive                   gpu-crit             _        %        	   critical             cooling-maps       map0            0           5               vpu-thermal                              	         trips      vpu-crit             _        %        	   critical                   timer            2arm,armv8-timer       0                                   
                         D      soc@0            2simple-bus                                   [            >           b@       @         bus@30000000             2fsl,aips-bus simple-bus          0    @                                   [0   0    @     sai@30010000            m             2fsl,imx8mq-sai           0                    _                                              ~bus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30030000            m             2fsl,imx8mq-sai           0                    Z                                              ~bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30040000            m             2fsl,imx8mq-sai           0                    Z                                              ~bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000            m             2fsl,imx8mq-sai           0                    d                                              ~bus mclk1 mclk2 mclk3                                               rx tx         	  disabled          gpio@30200000            2fsl,imx8mq-gpio fsl,imx35-gpio           0                     @          A                                                                          
               *      gpio@30210000            2fsl,imx8mq-gpio fsl,imx35-gpio           0!                    B          C                                                                          (               2      gpio@30220000            2fsl,imx8mq-gpio fsl,imx35-gpio           0"                    D          E                                                                          =               =      gpio@30230000            2fsl,imx8mq-gpio fsl,imx35-gpio           0#                    F          G                                                                          W          gpio@30240000            2fsl,imx8mq-gpio fsl,imx35-gpio           0$                    H          I                                                                          w         tmu@30260000             2fsl,imx8mq-tmu           0&                    1                                      
 &  H  a     @  
       #      )      /      5      =      C      K      Q      W   	   _   
   g      o           #     +     3     ;     C     K     U     ]  	   g  
   p           #     -     7     A     K     W     c     o           !     -     9     E     S     _     q                             watchdog@30280000            2fsl,imx8mq-wdt fsl,imx21-wdt             0(                    N                         okay            4default         B            L      watchdog@30290000            2fsl,imx8mq-wdt fsl,imx21-wdt             0)                    O                       	  disabled          watchdog@302a0000            2fsl,imx8mq-wdt fsl,imx21-wdt             0*                    
                       	  disabled          sdma@302c0000            2fsl,imx8mq-sdma fsl,imx7d-sdma           0,                    g                               ~ipg ahb         a           limx/sdma/sdma-imx7d.bin                   lcd-controller@30320000       !   2fsl,imx8mq-lcdif fsl,imx28-lcdif             02                                             ~pix                !      $            #                    #      %                    #g      	  disabled       port       endpoint                           &            pinctrl@30330000             2fsl,imx8mq-iomuxc            03                    fec1grp      h     h                    l              #   p                    t                    x                    |                                                                                                                                                                                     L                             4      gpiofangrp              p                          >      i2c1grp       0      |            @                  @              '      pmicirqgrp             4                 A            (      uart1grp          0    4               I  8                 I            !      usdhc1grp                                                                                                                                                             $                    (                    ,                    4                    0                           +      usdhc1-100mhzgrp                                                                                                                                                              $                    (                    ,                    4                    0                           ,      usdhc1-200mhzgrp                                                                                                                                                              $                    (                    ,                    4                    0                           -      usdhc2gpiogrp         0       8              A     T              A            /      usdhc2grp                <                    @                    D                    H                    L                    P                  8                            .      usdhc2-100mhzgrp                 <                    @                    D                    H                    L                    P                  8                            0      usdhc2-200mhzgrp                 <                    @                    D                    H                    L                    P                  8                            1      wdoggrp            0                                     syscon@30340000       =   2fsl,imx8mq-iomuxc-gpr fsl,imx6q-iomuxc-gpr syscon simple-mfd             04        mux-controller        	   2mmio-mux                          4               "         efuse@30350000           2fsl,imx8mq-ocotp syscon          05                                               speed-grade@10                                      syscon@30360000          2fsl,imx8mq-anatop syscon             06                    1         snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd           07                    snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                               	  ~snvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                                   ~snvs-pwrkey         	   t               	  disabled             clock-controller@30380000            2fsl,imx8mq-ccm           08                    U          V                                                  9  ~ckil osc_25m osc_27m clk_ext1 clk_ext2 clk_ext3 clk_ext4                  X     !      q                /               N                        reset-controller@30390000            2fsl,imx8mq-src syscon            09                    Y           %               %      gpc@303a0000             2fsl,imx8mq-gpc           0:                    W                                                   pgc                              power-domain@0          2                             #      power-domain@1          2                        F                <      power-domain@2          2                            8      power-domain@3          2                            :      power-domain@4          2                      power-domain@5          2                                     f      o      p            6      power-domain@6          2                                          ;      power-domain@7          2                      power-domain@8          2                      power-domain@9          2                	      power-domain@a          2                
                            bus@30400000             2fsl,aips-bus simple-bus          0@   @                                   [0@  0@   @     pwm@30660000             2fsl,imx8mq-pwm fsl,imx27-pwm             0f                    Q                               ~ipg per         T         	  disabled          pwm@30670000             2fsl,imx8mq-pwm fsl,imx27-pwm             0g                    R                               ~ipg per         T         	  disabled          pwm@30680000             2fsl,imx8mq-pwm fsl,imx27-pwm             0h                    S                               ~ipg per         T         	  disabled          pwm@30690000             2fsl,imx8mq-pwm fsl,imx27-pwm             0i                    T                               ~ipg per         T         	  disabled          timer@306a0000           2nxp,sysctr-timer             0j                    /                      ~per          bus@30800000             2fsl,aips-bus simple-bus          0   @                                   [0  0   @              spi@30820000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0                                                   ~ipg per       	  disabled          spi@30830000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0                                                    ~ipg per       	  disabled          spi@30840000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0                    !                               ~ipg per       	  disabled          serial@30860000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   ~ipg per         okay            4default         B   !      serial@30880000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   ~ipg per       	  disabled          serial@30890000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   ~ipg per       	  disabled          sai@308b0000            m             2fsl,imx8mq-sai           0                    `                                              ~bus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          sai@308c0000            m             2fsl,imx8mq-sai           0                    2                                              ~bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          crypto@30900000          2fsl,sec-v4.0                                      0             [    0                    [                 t            	  ~aclk ipg       jr@1000          2fsl,sec-v4.0-job-ring                                 i         jr@2000          2fsl,sec-v4.0-job-ring                                  j         jr@3000          2fsl,sec-v4.0-job-ring              0                   r            mipi-dsi@30a00000            2fsl,imx8mq-nwl-dsi           0           (                                      !  ~core rx_esc tx_esc phy_ref lcdif                                            G      L        Ĵ ր1-                "           _   "            F   #        l   $        qdphy             {   %      %      %      %           byte dpi esc pclk         	  disabled       ports                                port@0                                            endpoint@0                          &                           dphy@30a00300            2fsl,imx8mq-mipi-dphy             0                          ~phy_ref                             %        n6                     F   #      	  disabled                $      i2c@30a20000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    #                                                   okay                      4default         B   '   pmic@4b          2rohm,bd71837                K        4default         B   (                        )      	   pmic_clk                 *                 regulators     BUCK1           buck1            
`                                                       (         > 5       BUCK2           buck2            P         B@                           B@        (                   BUCK3           buck3            
`                                  BUCK4           buck4            
`                                           BUCK5           buck5            
`         p                        BUCK6           buck6            -         2Z                        BUCK7           buck7            }         p                        BUCK8           buck8            5          \                        LDO1            ldo1             -         2Z                        LDO2            ldo2                                              LDO3            ldo3             w@         2Z                        LDO4            ldo4                      w@                        LDO5            ldo5             w@         2Z                        LDO6            ldo6                      w@                        LDO7            ldo7             w@         2Z                                 i2c@30a30000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    $                                                 	  disabled          i2c@30a40000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    %                                                 	  disabled          i2c@30a50000             2fsl,imx8mq-i2c fsl,imx21-i2c             0                    &                                                 	  disabled          serial@30a60000          2fsl,imx8mq-uart fsl,imx6q-uart           0                                                   ~ipg per       	  disabled          mailbox@30aa0000             2fsl,imx8mq-mu fsl,imx6sx-mu          0                    X                         W         mmc@30b40000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0                                           i              ~ipg ahb per         c           x                      okay          "  4default state_100mhz state_200mhz           B   +           ,           -               mmc@30b50000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0                                           i              ~ipg ahb per         c           x                      okay          "  4default state_100mhz state_200mhz           B   .   /           0   /           1   /           2                 3      spi@30bb0000                                       2fsl,imx8mq-qspi fsl,imx7d-qspi           0                   QuadSPI QuadSPI-memory                 k                               ~qspi_en qspi          	  disabled          sdma@30bd0000            2fsl,imx8mq-sdma fsl,imx7d-sdma           0                                           t        ~ipg ahb         a           limx/sdma/sdma-imx7d.bin                   ethernet@30be0000            2fsl,imx8mq-fec fsl,imx6sx-fec            0           0         v          w          x          y         (                                      "  ~ipg ahb ptp enet_clk_ref enet_out                                 okay            4default         B   4      	  rgmii-id                5            mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                          *   	           (  '        8  P            5               bus@32c00000             2fsl,aips-bus simple-bus          2   @                                   [2  2   @     interrupt-controller@32e2d000         $   2fsl,imx8m-irqsteer fsl,imx-irqsteer          2                                            ~ipg         J            V   @                             gpu@38000000             2vivante,gc           8                                             f      o      p        ~core shader bus reg         B         (        a      d      o      p            (                                        / / / /             F   6                  usb@38100000             2fsl,imx8mq-dwc3 snps,dwc3            8                                       ~bus_early ref suspend                 n                    V      H        e                 (           l   7   7        qusb2-phy usb3-phy           F   8         c        okay            {otg       usb-phy@381f0040             2fsl,imx8mq-usb-phy           8 @   @                      ~phy                             H                             okay                7      usb@38200000             2fsl,imx8mq-dwc3 snps,dwc3            8                                        ~bus_early ref suspend                 n                    V      H        e                 )           l   9   9        qusb2-phy usb3-phy           F   :         c        okay            {host          usb-phy@382f0040             2fsl,imx8mq-usb-phy           8/ @   @                      ~phy                             H                             okay                9      video-codec@38300000             2nxp,imx8mq-vpu           80     81     82             g1 g2 ctrl                                      g1 g2                                   
  ~g1 g2 bus                  x      y      j                                 N              #F #F /             F   ;      pcie@33800000            2fsl,imx8mq-pcie          3   @               dbi config                                    pci                      0  [                                                                            z           msi                                                                    }                            |                            {                            z                      F   <        {   %      %      %           pciephy apps turnoff                  |      }      ~              T      P      G        沀        	  disabled          pcie@33c00000            2fsl,imx8mq-pcie          3   @  '             dbi config                                    pci       0  [           '                                                                   J           msi                                                                    M                            L                            K                            J                      F   <        {   %   "   %   $   %   %        pciephy apps turnoff                                            T      P      G        沀        	  disabled          interrupt-controller@38800000            2arm,gic-v3        (   8     8     1       1      1                                        	                                  memory-controller@3d400000           2fsl,imx8mq-ddrc fsl,imx8m-ddrc           =@   @          ~core pll alt apb                               v      w      ddr-pmu@3d800000          %   2fsl,imx8mq-ddr-pmu fsl,imx8m-ddr-pmu             =   @                              b            chosen        $  /soc@0/bus@30800000/serial@30860000       memory@40000000          memory               @       @         clock-pmic           2fixed-clock                                	   pmic_osc                )      regulator-usdhc2-vmmc            2regulator-fixed         VSD_3V3          2Z         2Z           2                            3      gpio-fan          	   2gpio-fan                      !              =               B           4default         B   >        okay                         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 serial0 serial1 serial2 serial3 spi0 spi1 spi2 #clock-cells clock-frequency clock-output-names phandle device_type reg clock-latency clocks enable-method next-level-cache operating-points-v2 #cooling-cells nvmem-cells nvmem-cell-names cpu-supply opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend interrupts interrupt-affinity polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend ranges dma-ranges #sound-dai-cells clock-names dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges little-endian fsl,tmu-range fsl,tmu-calibration #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name assigned-clocks assigned-clock-parents assigned-clock-rates remote-endpoint fsl,pins #mux-control-cells mux-reg-masks regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells power-domains #pwm-cells mux-controls phys phy-names resets reset-names #phy-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on regulator-ramp-delay rohm,dvs-run-voltage rohm,dvs-idle-voltage rohm,dvs-suspend-voltage #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 non-removable cd-gpios vmmc-supply reg-names fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet reset-gpios reset-assert-us reset-deassert-us fsl,channel fsl,num-irqs usb3-resume-missing-cas dr_mode interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed stdout-path gpio enable-active-high gpio-fan,speed-map 