  H   8  Ch   (            7  C0                                                                   :   ,Toradex Colibri iMX8QXP/DX on Colibri Evaluation Board V3         @   2toradex,colibri-imx8x-eval-v3 toradex,colibri-imx8x fsl,imx8qxp    aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@59000000/i2c@5a800000           /bus@59000000/i2c@5a810000           /bus@59000000/i2c@5a820000           /bus@59000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@59000000/serial@5a060000            /bus@59000000/serial@5a070000            /bus@59000000/serial@5a080000            /bus@59000000/serial@5a090000         "   /bus@59000000/i2c@5a810000/rtc@68         	   /scu/rtc          cpus                                 cpu@0            cpu          2arm,cortex-a35                            psci                                                 ,           ;   (      cpu@1            cpu          2arm,cortex-a35                           psci                                                 ,           ;   )      cpu@2            cpu          2arm,cortex-a35                           psci                                                 ,           ;   *      cpu@3            cpu          2arm,cortex-a35                           psci                                                 ,           ;   +      l2-cache0            2cache           ;            opp-table            2operating-points-v2          C        ;      opp-900000000           N    5         U B@        c I      opp-1200000000          N    G         U         c I         t         interrupt-controller@51a00000            2arm,gic-v3                Q             Q                                           	           ;         reserved-memory                                      dsp@92400000                 @                          ;            pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc       scu          2fsl,imx-scu         tx0 rx0 gip3          $                                   clock-controller             2fsl,imx8qxp-clk                                  xtal_32KHz xtal_24Mhz           ;         pinctrl          2fsl,imx8qxp-iomuxc          default               	   
   ad7879intgrp                     !        ;         adc0grp       0     d       `   c       `   h       `   g       `      canintgrp                    @      csictlgrp                                     extio0grp              1     @        ;         fec1grp       x     5          4          &       a   %     a   '       a   (       a   -       a   .       a   /       a   0      a        ;   #      fec1slpgrp        x     5     A   4     A   &      A   %      A   '      A   (      A   -      A   .      A   /      A   0      A        ;   $      flexcan0grp            j       !   i       !      flexcan1grp            l       !   k       !      flexcan2grp            n       !   m       !      gpioblongrp                  `      gpiokeysgrp               p A        ;   ,      hog0grp      8     *                a             S                 a   ,                a             T                 a             U                 a   R                 a                                                                         X                                             ;   	      hog1grp                                     ;   
      hogscfwgrp                          i2c0grp                 !        !        ;         i2c0mipilvds0grp               t          u             i2c0mipilvds1grp               x          y             i2c1grp            v     !   w     !        ;         lcdifgrp         ,     L      `   H      `   K      `   J      `         `   7      `         `   8      `   9      `   :      `   ;      `   <      `   =      `   >      `   ?      `   @      `   A      `   B      `   C      `   E      `   F      `   G      `   I      `   )      `   P      `      lpspi2grp         0     Y      !   Z      @   [      @   \      @      lpuart0grp        0     o          p          i         j              ;         lpuart2grp             r          q               ;         lpuart3grp             m         n              ;         lpuart3ctrlgrp        H     {          V          W                                             ;         pciebgrp          $          a        a          `      pwmagrp                   a   `      `      pwmbgrp            M      `      pwmcgrp            N      `      pwmdgrp                   a   O      `      sai0grp       0     ^     @   a     @   ]     @   _     @      sgtl5000grp                  A      sgtl5000usbclkgrp              e      !        ;         usb3503agrp                  a      usbcdetgrp             3     @      usbh1reggrp                 @      usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A          !        ;         usdhc1-100mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !        ;         usdhc1-200mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !        ;         usdhc2gpiogrp                   !        ;         usdhc2gpioslpgrp                     `        ;   "      usdhc2grp         T           A          !           !   !       !   "       !   #       !          !        ;         usdhc2-100mhzgrp          T           A          !           !   !       !   "       !   #       !          !        ;         usdhc2-200mhzgrp          T           A          !           !   !       !   "       !   #       !          !        ;          usdhc2slpgrp          T           `         `          `   !      `   "      `   #      `          !        ;   !      wifigrp                            imx8qx-ocotp             2fsl,imx8qxp-scu-ocotp                                  imx8qx-pd            2fsl,imx8qxp-scu-pd                     ;         scu-key       "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t      	  .disabled          rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt           5   <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal           A           ;   &         timer            2arm,armv8-timer       0                                   
         clock-xtal32k            2fixed-clock                     W           gxtal_32KHz          ;         clock-xtal24m            2fixed-clock                     Wn6         gxtal_24MHz          ;         bus@59000000             2simple-bus                                   Y       Y         clock-controller@59000000            2fsl,imx8qxp-lpcg-adma            Y                         ;         dsp@596e8000             2fsl,imx8qxp-dsp          Yn                 *      ,      +        ipg ocram core           z                               txdb0 txdb1 rxdb0 rxdb1       0                                                         	  .disabled          serial@5a060000       &   2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart            Z                                                  	  ipg baud            z      9        .okay            default                  serial@5a070000       &   2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart            Z                                                 	  ipg baud            z      :      	  .disabled          serial@5a080000       &   2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart            Z                                                 	  ipg baud            z      ;        .okay            default                  serial@5a090000       &   2fsl,imx8qxp-lpuart fsl,imx7ulp-lpuart            Z	                                                 	  ipg baud            z      <        .okay            default                     i2c@5a800000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          Z    @                                         per                       n6         z      `        .okay                                      W         default                  touchscreen@2c           2adi,ad7879-1            default                        ,                                                 x                                         2           @            i2c@5a810000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          Z    @                                         per                       n6         z      a        .okay                                      W         default               rtc@68        	   2st,m41t0                h         i2c@5a820000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          Z    @                                         per                       n6         z      b      	  .disabled          i2c@5a830000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          Z    @                                         per                       n6         z      c      	  .disabled             bus@5b000000             2simple-bus                                   [       [         clock-controller@5b200000            2fsl,imx8qxp-lpcg-conn            [                         ;         mmc@5b010000          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                              [                                        ipg per ahb         z              .okay            X            b         p         v      "  default state_100mhz state_200mhz                      ~                    mmc@5b020000          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                              [                                       ipg per ahb         z                                    .okay            X                 	                    (  default state_100mhz state_200mhz sleep                       ~                                !   "               mmc@5b030000          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                              [                                       ipg per ahb         z            	  .disabled          ethernet@5b040000            2fsl,imx8qxp-fec fsl,imx6sx-fec           [           0                                                                                ipg ahb enet_clk_ref ptp                                  z              .okay            default sleep              #        ~   $        rmii               %            mdio                                 ethernet-phy@2           2ethernet-phy-ieee802.3-c22          *   d                    ;   %            ethernet@5b050000            2fsl,imx8qxp-fec fsl,imx6sx-fec           [           0                                                                               ipg ahb enet_clk_ref ptp                                  z            	  .disabled             bus@5c000000             2simple-bus                                   \       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu             \                                bus@5d000000             2simple-bus                                   ]       ]         gpio@5d080000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]                                4        D                               z            gpio@5d090000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]	                                4        D                               z            gpio@5d0a0000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]
                                4        D                               z            gpio@5d0b0000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]                                4        D                               z              ;         gpio@5d0c0000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]                                4        D                               z            gpio@5d0d0000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]                                4        D                               z            gpio@5d0e0000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]                                4        D                               z            gpio@5d0f0000             2fsl,imx8qxp-gpio fsl,imx35-gpio          ]                                4        D                               z            mailbox@5d1b0000             2fsl,imx8qxp-mu fsl,imx6sx-mu             ]                               P         	  .disabled          mailbox@5d1c0000          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu             ]                               P           ;         mailbox@5d1d0000          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu             ]                               P         	  .disabled          mailbox@5d1e0000          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu             ]                               P         	  .disabled          mailbox@5d1f0000          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu             ]                               P         	  .disabled          mailbox@5d280000             2fsl,imx8qxp-mu fsl,imx6sx-mu             ](                               P           z              ;         clock-controller@5d400000            2fsl,imx8qxp-lpcg-lsio            ]@   @                      thermal-zones      cpu-thermal0            \           r             &  c   trips      trip0                               passive         ;   '      trip1                            	   critical             cooling-maps       map0               '      0     (   )   *   +               chosen          /bus@59000000/serial@5a090000         regulator-module-3v3             2regulator-fixed         +V3.3            2Z         2Z        ;         gpio-keys         
   2gpio-keys           default            ,   wakeup          Wake-Up               
                          
         )            	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 rtc0 rtc1 device_type reg enable-method next-level-cache clocks operating-points-v2 #cooling-cells phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map mbox-names mboxes #clock-cells clock-names pinctrl-names pinctrl-0 fsl,pins #power-domain-cells linux,keycodes status timeout-sec #thermal-sensor-cells clock-frequency clock-output-names power-domains memory-region assigned-clocks assigned-clock-rates touchscreen-max-pressure adi,resistance-plate-x adi,first-conversion-delay adi,acquisition-time adi,median-filter-size adi,averaging adi,conversion-interval bus-width non-removable no-sd no-sdio pinctrl-1 pinctrl-2 fsl,tuning-start-tap fsl,tuning-step cd-gpios vmmc-supply pinctrl-3 disable-wp fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet max-speed gpio-controller #gpio-cells #mbox-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt label linux,code debounce-interval wakeup-source 