     8     (              X                                 Marvell 8080 board        Z   marvell,armada-8080-db marvell,armada-8080 marvell,armada-ap810-octa marvell,armada-ap810                               aliases       /   ,/ap810-ap0/config-space@e8000000/serial@512000        /   4/ap810-ap0/config-space@e8000000/serial@512100        psci             arm,psci-0.2             <smc       ap810-ap0                                     simple-bus           C             T   config-space@e8000000                                     simple-bus           T                       C      interrupt-controller@3000000             arm,gic-v3           [                                      l               	             T      (                                                 interrupt-controller@3040000             arm,gic-v3-its                                                           timer            arm,armv8-timer       0                                    
         xor@400000        %   marvell,armada-7k-xor marvell,xor-v2              @      A                                    xor@420000        %   marvell,armada-7k-xor marvell,xor-v2              B      C                                    xor@440000        %   marvell,armada-7k-xor marvell,xor-v2              D      E                                    xor@460000        %   marvell,armada-7k-xor marvell,xor-v2              F      G                                    serial@512000            snps,dw-apb-uart              Q                                                         okay                     serial@512100            snps,dw-apb-uart              Q!                                                     	   disabled                cpus                                       marvell,armada-ap810-octa      cpu@0            cpu          arm,cortex-a72                       psci          cpu@1            cpu          arm,cortex-a72                      psci          cpu@100          cpu          arm,cortex-a72                      psci          cpu@101          cpu          arm,cortex-a72                     psci          cpu@200          cpu          arm,cortex-a72                      psci          cpu@201          cpu          arm,cortex-a72                     psci          cpu@300          cpu          arm,cortex-a72                      psci          cpu@301          cpu          arm,cortex-a72                     psci             chosen          serial0:115200n8          memory@0             memory                                   	model compatible #address-cells #size-cells serial0 serial1 method interrupt-parent ranges #interrupt-cells interrupt-controller interrupts reg phandle msi-controller #msi-cells msi-parent dma-coherent reg-shift reg-io-width status clock-frequency device_type enable-method stdout-path 