  p   8  k    (              j                             &    firefly,roc-rk3308-cc rockchip,rk3308                                    +            7Firefly ROC-RK3308-CC board    aliases          =/i2c@ff040000            B/i2c@ff050000            G/i2c@ff060000            L/i2c@ff070000            Q/serial@ff0a0000             Y/serial@ff0b0000             a/serial@ff0c0000             i/serial@ff0d0000             q/serial@ff0e0000             y/spi@ff120000            ~/spi@ff130000            /spi@ff140000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                           Z                                                                cpu@1            cpu           arm,cortex-a35                           psci                                                         cpu@2            cpu           arm,cortex-a35                           psci                                                   	      cpu@3            cpu           arm,cortex-a35                           psci                                                   
      idle-states         psci       cpu-sleep             arm,idle-state           +        <           S   x        d           t                      l2-cache              cache                       cpu0-opp-table            operating-points-v2                        opp-408000000               Q          ~ ~ r`          @               opp-600000000               #F          ~ ~ r`          @      opp-816000000               0,            r`          @      opp-1008000000              <          * * r`          @         arm-pmu           arm,cortex-a35-pmu        0         S          T          U          V                    	   
      external-mac-clock            fixed-clock               
  mac_clkin                     psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m        grf@ff000000          &    rockchip,rk3308-grf syscon simple-mfd                                     B   reboot-mode           syscon-reboot-mode                     RB        'RB        3RB         ?RB        MRB	         syscon@ff00b000       -    rockchip,rk3308-detect-grf syscon simple-mfd                                               +         syscon@ff00c000       +    rockchip,rk3308-core-grf syscon simple-mfd                                             +         i2c@ff040000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  [i2c pclk                              gdefault         u                        +          	  disabled          i2c@ff050000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  [i2c pclk                              gdefault         u                        +            okay                rtc@51            nxp,pcf8563             Q                     i2c@ff060000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  [i2c pclk                              gdefault         u                        +          	  disabled          i2c@ff070000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  [i2c pclk                              gdefault         u                        +          	  disabled          watchdog@ff080000             snps,dw-wdt                                                     
         	  disabled          serial@ff0a0000       &    rockchip,rk3308-uart snps,dw-apb-uart                
                                                        [baudclk apb_pclk                                  gdefault         u               	  disabled          serial@ff0b0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        [baudclk apb_pclk                                  gdefault         u               	  disabled          serial@ff0c0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        [baudclk apb_pclk                                  gdefault         u           okay          serial@ff0d0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        [baudclk apb_pclk                                  gdefault         u         	  disabled          serial@ff0e0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        [baudclk apb_pclk                                  gdefault         u               	  disabled          spi@ff120000          (    rockchip,rk3308-spi rockchip,rk3066-spi                                                              +                                 [spiclk apb_pclk                              tx rx           gdefault         u                  	  disabled          spi@ff130000          (    rockchip,rk3308-spi rockchip,rk3066-spi                                                              +                                 [spiclk apb_pclk                             tx rx           gdefault         u          !   "      	  disabled          spi@ff140000          (    rockchip,rk3308-spi rockchip,rk3066-spi                                                              +                                 [spiclk apb_pclk            #      #           tx rx           gdefault         u   $   %   &   '      	  disabled          pwm@ff160000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      y            	  [pwm pclk            gdefault         u   (                 	  disabled          pwm@ff160010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                     y            	  [pwm pclk            gdefault         u   )                 	  disabled          pwm@ff160020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      y            	  [pwm pclk            gdefault         u   *                 	  disabled          pwm@ff160030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                      y            	  [pwm pclk            gdefault         u   +                 	  disabled          pwm@ff170000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      x            	  [pwm pclk            gdefault         u   ,                 	  disabled          pwm@ff170010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                     x            	  [pwm pclk            gactive          u   -                   okay               P      pwm@ff170020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      x            	  [pwm pclk            gdefault         u   .                 	  disabled          pwm@ff170030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                      x            	  [pwm pclk            gdefault         u   /                 	  disabled          pwm@ff180000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                  	  [pwm pclk            gdefault         u   0                   okay               U      pwm@ff180010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                 	  [pwm pclk            gdefault         u   1                 	  disabled          pwm@ff180020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                  	  [pwm pclk            gdefault         u   2                 	  disabled          pwm@ff180030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                                  	  [pwm pclk            gdefault         u   3                 	  disabled          rktimer@ff1a0000              rockchip,rk3288-timer                                                                         [pclk timer        saradc@ff1e0000       .    rockchip,rk3308-saradc rockchip,rk3399-saradc                                        %                  %              [saradc apb_pclk                          F        saradc-apb        	  disabled          bus           simple-bus                       +               dma-controller@ff2c0000           arm,pl330 arm,primecell              ,        @                                                            	  [apb_pclk                                dma-controller@ff2d0000           arm,pl330 arm,primecell              -        @                                                           	  [apb_pclk                          #         i2s@ff350000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s              5                        4                  \              [i2s_clk i2s_hclk               #      #   	        tx rx                               reset-m reset-h         gdefault         u   4   5   6   7      	  disabled          i2s@ff360000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s              6                        5                  ^              [i2s_clk i2s_hclk               #           rx                              reset-m reset-h       	  disabled          spdif-tx@ff3a0000         ,    rockchip,rk3308-spdif rockchip,rk3066-spdif              :                        7                  b            
  [mclk hclk              #           tx          gdefault         u   8      	  disabled          mmc@ff480000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              H        @                L                                    0      1      2        [biu ciu ciu-drive ciu-sample                       р        gdefault         u   9   :   ;   <        okay             (         :        K  ,         ]         j         w           =           >      mmc@ff490000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              I        @                M                                    :      ;      <        [biu ciu ciu-drive ciu-sample                       р        okay             (                        mmc@ff4a0000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              J        @                N                                    5      6      7        [biu ciu ciu-drive ciu-sample                       р        gdefault         u   ?   @   A      	  disabled          clock-controller@ff500000             rockchip,rk3308-cru              P                                          B                                          interrupt-controller@ff580000             arm,gic-400       @       X            X              X@             X`                       	                                                     sram@fff80000         
    mmio-sram                                                                   +      ddr-sram@0                        vad-sram@8000                          pinctrl           rockchip,rk3308-pinctrl            B                     +                    gdefault         u   C   gpio0@ff220000            rockchip,gpio-bank               "                        (                                    0                                  N      gpio1@ff230000            rockchip,gpio-bank               #                        )                                    0                             gpio2@ff240000            rockchip,gpio-bank               $                        *                                    0                             gpio3@ff250000            rockchip,gpio-bank               %                        +                                    0                             gpio4@ff260000            rockchip,gpio-bank               &                        ,                                    0                                  S      pcfg-pull-up             <           M      pcfg-pull-down           I           J      pcfg-pull-none           X           F      pcfg-pull-none-2ma           X        e         pcfg-pull-up-2ma             <        e         pcfg-pull-up-4ma             <        e              L      pcfg-pull-none-4ma           X        e              K      pcfg-pull-down-4ma           I        e         pcfg-pull-none-8ma           X        e              D      pcfg-pull-up-8ma             <        e              E      pcfg-pull-none-12ma          X        e              H      pcfg-pull-up-12ma            <        e              G      pcfg-pull-none-smt           X         t           I      pcfg-output-high                   pcfg-output-low                pcfg-input-high          <               pcfg-input                 emmc       emmc-clk                  	      D      emmc-cmd                        E      emmc-pwren                      F      emmc-rstn                 
      F      emmc-bus1                        E      emmc-bus4         @               E            E            E            E      emmc-bus8                        E            E            E            E            E            E            E            E         flash      flash-csn0                      F      flash-rdy                       F      flash-ale                       F      flash-cle                 	      F      flash-wrn                       F      flash-rdn                 
      F      flash-bus8                       G            G            G            G            G            G            G            G         gmac       rmii-pins                       H            H            H            F            F            F            F            F            F      mac-refclk-12ma                     H      mac-refclk                      F         gmac-m1    rmiim1-pins                     H            H            H            F            F             F            F            F            F      macm1-refclk-12ma                       H      macm1-refclk                        F         i2c0       i2c0-xfer                        I            I                    i2c1       i2c1-xfer                         I             I                    i2c2       i2c2-xfer                        I            I                    i2c3-m0    i2c3m0-xfer                       I             I                    i2c3-m1    i2c3m1-xfer                      I            I         i2c3-m2    i2c3m2-xfer                      I             I         i2s_2ch_0      i2s-2ch-0-mclk                      F      i2s-2ch-0-sclk                      F           4      i2s-2ch-0-lrck                      F           5      i2s-2ch-0-sdo                       F           7      i2s-2ch-0-sdi                       F           6         i2s_8ch_0      i2s-8ch-0-mclk                      F      i2s-8ch-0-sclktx                        F      i2s-8ch-0-sclkrx                        F      i2s-8ch-0-lrcktx                        F      i2s-8ch-0-lrckrx                        F      i2s-8ch-0-sdo0                	      F      i2s-8ch-0-sdo1                
      F      i2s-8ch-0-sdo2                      F      i2s-8ch-0-sdo3                      F      i2s-8ch-0-sdi0                      F      i2s-8ch-0-sdi1                      F      i2s-8ch-0-sdi2                      F      i2s-8ch-0-sdi3                      F         i2s_8ch_1_m0       i2s-8ch-1-m0-mclk                       F      i2s-8ch-1-m0-sclktx                     F      i2s-8ch-1-m0-sclkrx                     F      i2s-8ch-1-m0-lrcktx                     F      i2s-8ch-1-m0-lrckrx                     F      i2s-8ch-1-m0-sdo0                       F      i2s-8ch-1-m0-sdo1-sdi3                      F      i2s-8ch-1-m0-sdo2-sdi2                	      F      i2s-8ch-1-m0-sdo3_sdi1                
      F      i2s-8ch-1-m0-sdi0                       F         i2s_8ch_1_m1       i2s-8ch-1-m1-mclk                       F      i2s-8ch-1-m1-sclktx                     F      i2s-8ch-1-m1-sclkrx                     F      i2s-8ch-1-m1-lrcktx                     F      i2s-8ch-1-m1-lrckrx                     F      i2s-8ch-1-m1-sdo0                       F      i2s-8ch-1-m1-sdo1-sdi3                      F      i2s-8ch-1-m1-sdo2-sdi2                      F      i2s-8ch-1-m1-sdo3_sdi1                      F      i2s-8ch-1-m1-sdi0                       F         pdm_m0     pdm-m0-clk                      F      pdm-m0-sdi0                     F      pdm-m0-sdi1               
      F      pdm-m0-sdi2               	      F      pdm-m0-sdi3                     F         pdm_m1     pdm-m1-clk                      F      pdm-m1-sdi0                     F      pdm-m1-sdi1                     F      pdm-m1-sdi2                     F      pdm-m1-sdi3                     F         pdm_m2     pdm-m2-clkm                     F      pdm-m2-clk                      F      pdm-m2-sdi0                     F      pdm-m2-sdi1                     F      pdm-m2-sdi2                     F      pdm-m2-sdi3                     F         pwm0       pwm0-pin                         F      pwm0-pin-pull-down                       J           0         pwm1       pwm1-pin                         F           1      pwm1-pin-pull-down                       J         pwm2       pwm2-pin                         F           2      pwm2-pin-pull-down                       J         pwm3       pwm3-pin                         F           3      pwm3-pin-pull-down                       J         pwm4       pwm4-pin                         F           ,      pwm4-pin-pull-down                       J         pwm5       pwm5-pin                         F      pwm5-pin-pull-down                       J           -         pwm6       pwm6-pin                         F           .      pwm6-pin-pull-down                       J         pwm7       pwm7-pin                        F           /      pwm7-pin-pull-down                      J         pwm8       pwm8-pin                  
      F           (      pwm8-pin-pull-down                
      J         pwm9       pwm9-pin                        F           )      pwm9-pin-pull-down                      J         pwm10      pwm10-pin                       F           *      pwm10-pin-pull-down                     J         pwm11      pwm11-pin                       F           +      pwm11-pin-pull-down                     J         rtc    rtc-32k                      F           C         sdmmc      sdmmc-clk                       K           9      sdmmc-cmd                       L           :      sdmmc-det                        L           ;      sdmmc-pwren                     K      sdmmc-bus1                      L      sdmmc-bus4        @              L            L            L            L           <         sdio       sdio-clk                        D           A      sdio-cmd                        E           @      sdio-pwren                       D      sdio-wrpt                        D      sdio-intn                         D      sdio-bus1                        E      sdio-bus4         @               E            E            E            E           ?         spdif_in       spdif-in                         F         spdif_out      spdif-out                        F           8         spi0       spi0-clk                        L                 spi0-csn0                       L                 spi0-miso                        L                 spi0-mosi                       L                    spi1       spi1-clk                        L                 spi1-csn0                       L                  spi1-miso                 
      L           !      spi1-mosi                       L           "         spi1-m1    spi1m1-miso                     L      spi1m1-mosi                     L      spi1m1-clk                      L      spi1m1-csn0               	      L         spi2       spi2-clk                        L           $      spi2-csn0                       L           %      spi2-miso                       L           &      spi2-mosi                       L           '         tsadc      tsadc-otp-pin                  
       F      tsadc-otp-out                  
      F         uart0      uart0-xfer                       M             M                 uart0-cts                       F                 uart0-rts                       F                 uart0-rts-pin                        F         uart1      uart1-xfer                       M            M                 uart1-cts                       F                 uart1-rts                       F                    uart2-m0       uart2m0-xfer                         M            M                    uart2-m1       uart2m1-xfer                         M            M         uart3      uart3-xfer                       M            M                    uart3-m1       uart3m1-xfer                          M             M         uart4      uart4-xfer                 	      M            M                 uart4-cts                       F                 uart4-rts                       F                 uart4-rts-pin                        F         ir-receiver    ir-recv-pin                       F           O         buttons    pwr-key                       M            chosen          serial2:1500000n8         ir_rx             gpio-ir-receiver               N               gdefault         u   O      ir_tx         
    pwm-ir-tx              P      a          leds          
    gpio-leds      led-0           firefly:red:power           ir-power-click          on             N             led-1           firefly:blue:user           ir-user-click           off            N   
             typec-vcc5v           regulator-fixed         typec_vcc5v          LK@        # LK@         ;         O           Q      vcc5v0-sys            regulator-fixed         vcc5v0_sys           LK@        # LK@         ;         O        a   Q           R      vcc-io            regulator-fixed         vcc_io           2Z        # 2Z         ;         O        a   R           T      vcc-sdmmc             regulator-gpio        
  vcc_sdmmc            w@        # 2Z           N                 w@     2Z           a   R           >      vcc-sd            regulator-fixed         l   S              vcc_sd           2Z        # 2Z         ;         O        a   T           =      vdd-core              pwm-regulator              U               	  vdd_core             x        # r`        q |                    ;         O           R                 vdd-log           regulator-fixed         vdd_log                  #          ;         O        a   R         	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 device_type reg enable-method clocks #cooling-cells dynamic-power-coefficient operating-points-v2 cpu-idle-states next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells offset mode-bootloader mode-loader mode-normal mode-recovery mode-fastboot clock-names pinctrl-names pinctrl-0 status reg-shift reg-io-width dmas dma-names #pwm-cells #io-channel-cells resets reset-names ranges arm,pl330-periph-burst #dma-cells bus-width fifo-depth max-frequency cap-mmc-highspeed cap-sd-highspeed card-detect-delay sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-hs200-1_8v non-removable #reset-cells rockchip,grf assigned-clocks assigned-clock-rates #interrupt-cells interrupt-controller gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path gpios pwms label linux,default-trigger default-state regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on vin-supply gpio regulator-init-microvolt regulator-settling-time-up-us pwm-supply 