     8  x   (            
  @                             '    friendlyarm,nanopi-r2s rockchip,rk3328                                   +            7FriendlyElec NanoPi R2S    aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/ethernet@ff550000        cpus                         +       cpu@0            }cpu           arm,cortex-a53                                                                      x         psci                                                   	      cpu@1            }cpu           arm,cortex-a53                                                                     x         psci                                                   
      cpu@2            }cpu           arm,cortex-a53                                                                     x         psci                                                         cpu@3            }cpu           arm,cortex-a53                                                                     x         psci                                                         idle-states         psci       cpu-sleep             arm,idle-state                    1           H   x        Y           i                      l2-cache0             cache                       opp_table0            operating-points-v2          z              opp-408000000               Q          ~          @               opp-600000000               #F          ~          @      opp-816000000               0,          B@          @      opp-1008000000              <                    @      opp-1200000000              G          (          @      opp-1296000000              M?d                     @         bus           simple-bus                       +               dmac@ff1f0000             arm,pl330 arm,primecell                      @                                                            	  apb_pclk                                   analog-sound              simple-audio-card           i2s                    *Analog        	  Adisabled       simple-audio-card,cpu           H         simple-audio-card,codec         H            arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g           R   	   
            display-subsystem             rockchip,display-subsystem          e         	  Adisabled          hdmi-sound            simple-audio-card           i2s                    *HDMI          	  Adisabled       simple-audio-card,cpu           H         simple-audio-card,codec         H            psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock         k            xn6         xin24m             D      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                     	  Adisabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                     	  Adisabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  Adisabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          default                              	  Adisabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          default sleep                                                       	  Adisabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    :   io-domains        "    rockchip,rk3328-io-voltage-domain           Aokay                                                                   "           0         grf-gpio              rockchip,rk3328-grf-gpio             >        N         power-controller          !    rockchip,rk3328-power-controller            Z                        +               <   power-domain@6                    power-domain@5                    power-domain@8                                  F         reboot-mode           syscon-reboot-mode          n          uRB         RB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           default                !   "                            	  Adisabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           default            #   $   %                            	  Adisabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           default            &                              Aokay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            default            '      	  Adisabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            default            (        Aokay       pmic@18           rockchip,rk805                          )                      k           xin32k rk805-clkout2             >        N              *        default                              +           +        	   +           +        !           -   +   regulators     DCDC_REG1           9vdd_log          H         \        n 
4                    0   regulator-state-mem                   B@         DCDC_REG2           9vdd_arm          H         \        n 
4                    0              regulator-state-mem                   ~         DCDC_REG3           9vcc_ddr          H         \   regulator-state-mem                   DCDC_REG4         
  9vcc_io_33            H         \        n 2Z         2Z              regulator-state-mem                   2Z         LDO_REG1            9vcc_18           H         \        n w@         w@              regulator-state-mem                   w@         LDO_REG2            9vcc18_emmc           H         \        n w@         w@              regulator-state-mem                   w@         LDO_REG3            9vdd_10           H         \        n B@         B@   regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            default            ,      	  Adisabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            default            -      	  Adisabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           default            .   /   0   1      	  Adisabled          watchdog@ff1a0000             snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            2                 	  Adisabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            default            3                 	  Adisabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            default            4                   Aokay          pwm@ff1b0030              rockchip,rk3328-pwm               0                      2                  <            	  pwm pclk            default            5                 	  Adisabled          thermal-zones      soc-thermal                                        (   6       trips      trip-point0         8 p        D           passive       trip-point1         8 L        D           passive            7      soc-crit            8 s        D        	   critical             cooling-maps       map0            O   7      0  T   	   
              c                  tsadc@ff250000            rockchip,rk3328-tsadc                %                        :           p      $          P               $              tsadc apb_pclk          init default sleep             8           9           8              B      
  tsadc-apb              :                            Aokay                                       6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                         2                 E         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P           7                  %              saradc apb_pclk               V        saradc-apb        	  Adisabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  Igp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                  f      iommu@ff330200            rockchip,iommu               3                       `         
  Ih265e_mmu                                aclk iface          Y          	  Adisabled          iommu@ff340800            rockchip,iommu               4        @               b         	  Ivepu_mmu                        F        aclk iface          Y          	  Adisabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           Ivdpu                        F      
  aclk hclk           f   ;        m   <         iommu@ff350800            rockchip,iommu               5        @                          Ivpu_mmu                     F        aclk iface          Y            m   <              ;      iommu@ff360480            rockchip,iommu                6       @    6       @               J           Irkvdec_mmu                      B        aclk iface          Y          	  Adisabled          vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk            f   =      	  Adisabled       port                         +                  endpoint@0                       {   >           C            iommu@ff373f00            rockchip,iommu               7?                                   Ivop_mmu                     ;        aclk iface          Y          	  Adisabled               =      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #          G                        F              iahb isfr cec              ?        hdmi            default            @   A   B           :                  	  Adisabled                  ports      port       endpoint            {   C           >               codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk              :                  	  Adisabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     D      y        sysclk refoclk refpclk        	  hdmi_phy            k               E        cpu-version                   	  Adisabled               ?      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    :        k                      p      x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               D   D   D      |           n6 n6 n6          n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2-phy@100              rockchip,rk3328-usb2phy                            D        phyclk          usb480m_phy         k            p      {           F        Aokay               F   otg-port                      $         ;          <          =           Iotg-bvalid otg-id linestate         Aokay               S      host-port                              >         
  Ilinestate           Aokay               T            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample                       р        Aokay                        	                    G   H   I   J        default          %         2         ?         L        Z   K        f         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample                       р      	  Adisabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample                       р      	  Adisabled          ethernet@ff540000             rockchip,rk3328-gmac                 T                                   Imacirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              :        s           Aokay            p      d      f           L   L        ~input              M        rgmii                         N        default                                $   mdio              snps,dwmac-mdio                      +       ethernet-phy@1                         O        default           '          P           )                 M            ethernet@ff550000             rockchip,rk3328-gmac                 U                    :                          Imacirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      d        stmmaceth mac-phy           rmii               P        s           ~output        	  Adisabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default            Q   R                    P            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         host                                 .            @                  S      	  usb2-phy            Aokay          usb@ff5c0000              generic-ehci                 \                                         N   F           T        usb         Aokay          usb@ff5d0000              generic-ohci                 ]                                         N   F           T        usb         Aokay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         otg       
  =utmi_wide            F         g                                          	  Adisabled          interrupt-controller@ff811000             arm,gic-400                                  	      @                                 @             `                       	                   pinctrl           rockchip,rk3328-pinctrl            :                     +               gpio0@ff210000            rockchip,gpio-bank               !                        3                           >        N            	                      a      gpio1@ff220000            rockchip,gpio-bank               "                        4                           >        N            	                      )      gpio2@ff230000            rockchip,gpio-bank               #                        5                           >        N            	                      e      gpio3@ff240000            rockchip,gpio-bank               $                        6                           >        N            	                 pcfg-pull-up             	           W      pcfg-pull-down           	'           _      pcfg-pull-none           	6           U      pcfg-pull-none-2ma           	6        	C              ^      pcfg-pull-up-2ma             	        	C         pcfg-pull-up-4ma             	        	C              X      pcfg-pull-none-4ma           	6        	C              [      pcfg-pull-down-4ma           	'        	C         pcfg-pull-none-8ma           	6        	C              Y      pcfg-pull-up-8ma             	        	C              Z      pcfg-pull-none-12ma          	6        	C              \      pcfg-pull-up-12ma            	        	C              ]      pcfg-output-high             	R      pcfg-output-low          	^      pcfg-input-high          	         	i           V      pcfg-input           	i      i2c0       i2c0-xfer            	v            U            U           '         i2c1       i2c1-xfer            	v            U            U           (         i2c2       i2c2-xfer            	v            U            U           ,         i2c3       i2c3-xfer            	v             U             U           -      i2c3-pins            	v              U              U         hdmi_i2c       hdmii2c-xfer             	v             U             U           A         pdm-0      pdmm0-clk           	v            U                 pdmm0-fsync         	v            U      pdmm0-sdi0          	v            U                 pdmm0-sdi1          	v            U                 pdmm0-sdi2          	v            U                 pdmm0-sdi3          	v            U                 pdmm0-clk-sleep         	v             V                 pdmm0-sdi0-sleep            	v             V                 pdmm0-sdi1-sleep            	v             V                 pdmm0-sdi2-sleep            	v             V                 pdmm0-sdi3-sleep            	v             V                 pdmm0-fsync-sleep           	v             V         tsadc      otp-pin         	v             U           8      otp-out         	v            U           9         uart0      uart0-xfer           	v      	      U            W                  uart0-cts           	v            U           !      uart0-rts           	v      
      U           "      uart0-rts-pin           	v      
       U         uart1      uart1-xfer           	v            U            W           #      uart1-cts           	v            U           $      uart1-rts           	v            U           %      uart1-rts-pin           	v             U         uart2-0    uart2m0-xfer             	v             U            W         uart2-1    uart2m1-xfer             	v             U            W           &         spi0-0     spi0m0-clk          	v            W      spi0m0-cs0          	v            W      spi0m0-tx           	v      	      W      spi0m0-rx           	v      
      W      spi0m0-cs1          	v            W         spi0-1     spi0m1-clk          	v            W      spi0m1-cs0          	v            W      spi0m1-tx           	v            W      spi0m1-rx           	v            W      spi0m1-cs1          	v            W         spi0-2     spi0m2-clk          	v             W           .      spi0m2-cs0          	v            W           1      spi0m2-tx           	v            W           /      spi0m2-rx           	v            W           0         i2s1       i2s1-mclk           	v            U      i2s1-sclk           	v            U      i2s1-lrckrx         	v            U      i2s1-lrcktx         	v            U      i2s1-sdi            	v            U      i2s1-sdo            	v            U      i2s1-sdio1          	v            U      i2s1-sdio2          	v            U      i2s1-sdio3          	v            U      i2s1-sleep          	v             V             V             V             V             V             V             V             V             V         i2s2-0     i2s2m0-mclk         	v            U      i2s2m0-sclk         	v            U      i2s2m0-lrckrx           	v            U      i2s2m0-lrcktx           	v            U      i2s2m0-sdi          	v            U      i2s2m0-sdo          	v            U      i2s2m0-sleep          `  	v             V             V             V             V             V             V         i2s2-1     i2s2m1-mclk         	v            U      i2s2m1-sclk         	v             U      i2sm1-lrckrx            	v            U      i2s2m1-lrcktx           	v            U      i2s2m1-sdi          	v            U      i2s2m1-sdo          	v            U      i2s2m1-sleep          P  	v             V              V             V             V             V         spdif-0    spdifm0-tx          	v             U         spdif-1    spdifm1-tx          	v            U         spdif-2    spdifm2-tx          	v             U                    sdmmc0-0       sdmmc0m0-pwren          	v            X      sdmmc0m0-pin            	v             X         sdmmc0-1       sdmmc0m1-pwren          	v             X      sdmmc0m1-pin            	v              X           g         sdmmc0     sdmmc0-clk          	v            Y           G      sdmmc0-cmd          	v            Z           H      sdmmc0-dectn            	v            X           I      sdmmc0-wrprt            	v            X      sdmmc0-bus1         	v             Z      sdmmc0-bus4       @  	v             Z            Z            Z            Z           J      sdmmc0-pins         	v             X             X             X             X             X             X             X              X         sdmmc0ext      sdmmc0ext-clk           	v            [      sdmmc0ext-cmd           	v             X      sdmmc0ext-wrprt         	v            X      sdmmc0ext-dectn         	v            X      sdmmc0ext-bus1          	v            X      sdmmc0ext-bus4        @  	v            X            X            X            X      sdmmc0ext-pins          	v              X             X             X             X             X             X             X             X         sdmmc1     sdmmc1-clk          	v            Y      sdmmc1-cmd          	v            Z      sdmmc1-pwren            	v            Z      sdmmc1-wrprt            	v            Z      sdmmc1-dectn            	v            Z      sdmmc1-bus1         	v            Z      sdmmc1-bus4       @  	v            Z            Z            Z            Z      sdmmc1-pins         	v             X             X             X             X             X             X             X             X             X         emmc       emmc-clk            	v            \      emmc-cmd            	v            ]      emmc-pwren          	v            U      emmc-rstnout            	v            U      emmc-bus1           	v             ]      emmc-bus4         @  	v             ]            ]            ]            ]      emmc-bus8           	v             ]            ]            ]            ]            ]            ]            ]            ]         pwm0       pwm0-pin            	v            U           2         pwm1       pwm1-pin            	v            U           3         pwm2       pwm2-pin            	v            U           4         pwmir      pwmir-pin           	v            U           5         gmac-1     rgmiim1-pins         `  	v            Y            [            [            Y            [            [            [      
      [            [            Y      	      Y            [            [            Y            Y             Y             Y             [             Y             Y             Y             Y           N      rmiim1-pins         	v            ^            \            ^            ^            ^            ^      
      ^            ^            \      	      \             U             U             U             U             U             U         gmac2phy       fephyled-speed10            	v             U      fephyled-duplex         	v             U      fephyled-rxm1           	v            U           Q      fephyled-txm1           	v            U      fephyled-linkm1         	v            U           R         tsadc_pin      tsadc-int           	v            U      tsadc-pin           	v             U         hdmi_pin       hdmi-cec            	v             U           @      hdmi-hpd            	v             _           B         cif-0      dvp-d2d9-m0         	v            U            U            U            U            U      	      U      
      U            U            U             U            U            U         cif-1      dvp-d2d9-m1         	v            U            U            U            U            U            U            U            U            U             U            U            U         button     reset-button-pin            	v               U           `         ethernet-phy       eth-phy-reset-pin           	v             _           O         leds       lan-led-pin         	v             U           b      sys-led-pin         	v              U           c      wan-led-pin         	v             U           d         pmic       pmic-int-l          	v             W           *         sd     sdio-vcc-pin            	v             W           f            chosen          	serial2:1500000n8         gmac-clock            fixed-clock         xsY@        gmac_clkin          k               L      keys          
    gpio-keys              `        default    reset           	reset              a               	          	   2         leds          
    gpio-leds              b   c   d        default    led-0              e               	nanopi-r2s:green:lan          led-1              a               	nanopi-r2s:red:sys        led-2              e               	nanopi-r2s:green:wan             sdmmcio-regulator             regulator-gpio           	           )                  f        default         9vcc_io_sdio          H        n w@         2Z        	          	voltage         	            w@    2Z            
                    sdmmc-regulator           regulator-fixed         
   a                 g        default         9vcc_sd           \        n 2Z         2Z        
              K      vdd-5v            regulator-fixed         9vdd_5v           H         \        n LK@         LK@           +         	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ranges interrupts arm,pl330-periph-burst clock-names #dma-cells simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupt-affinity ports #clock-cells clock-frequency clock-output-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 pmuio-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply snps,txpbl clock_in_out phy-handle phy-mode phy-supply rx_delay snps,aal tx_delay reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path label linux,code debounce-interval enable-active-high regulator-settling-time-us regulator-type startup-delay-us vin-supply gpio 