  d   8  ^    (              ]                                 rockchip,r88 rockchip,rk3368                                     +            7Rockchip R88       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff660000            Q/i2c@ff140000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/serial@ff180000             m/serial@ff190000             u/serial@ff690000             }/serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     bus           simple-bus                       +                dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                                                     $   
         	  +apb_pclk          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                                                      $   
         	  +apb_pclk                7         arm-pmu           arm,armv8-pmuv3       `          p          q          r          s          t          u          v          w            7            	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock         Jn6         Zxin24m          m          mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         zр         $   
     
   D   
   r   
   v        +biu ciu ciu-drive ciu-sample                                              
           reset         	  disabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         zр         $   
     
   E   
   s   
   w        +biu ciu ciu-drive ciu-sample                               !              
           reset           okay               
   E           
                                                                     +default         9                 C           O         mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         zр         $   
     
   G   
   u   
   y        +biu ciu ciu-drive ciu-sample                               #              
           reset           okay                        \                            +default         9               saradc@ff100000           rockchip,saradc                                       $           n           $   
   I   
  [        +saradc apb_pclk            
   W        saradc-apb          okay                     spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               $   
   A   
  R        +spiclk apb_pclk                 ,           +default         9                                 +          	  disabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               $   
   B   
  S        +spiclk apb_pclk                 -           +default         9                                 +          	  disabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               $   
   C   
  T        +spiclk apb_pclk                 )           +default         9             !                     +          	  disabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            +i2c         $   
  N        +default         9   "      	  disabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            +i2c         $   
  O        +default         9   #      	  disabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            +i2c         $   
  P        +default         9   $      	  disabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            +i2c         $   
  Q        +default         9   %      	  disabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 Jn6         $   
   M   
  U        +baudclk apb_pclk                    7                               	  disabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 Jn6         $   
   N   
  V        +baudclk apb_pclk                    8                               	  disabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 Jn6         $   
   P   
  X        +baudclk apb_pclk                    :                               	  disabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 Jn6         $   
   Q   
  Y        +baudclk apb_pclk                    ;                               	  disabled          thermal-zones      cpu            d                     &       trips      cpu_alert0           $                   passive             '      cpu_alert1           8                   passive             (      cpu_crit             s                	   critical             cooling-maps       map0               '      0                    map1               (      0              	            gpu            d                     &      trips      gpu_alert0           8                   passive             )      gpu_crit             8                	   critical             cooling-maps       map0               )      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           $   
   H   
  Z        +tsadc apb_pclk             
         
  tsadc-apb           +init default sleep          9   *           +           *                   , s        okay            C            Z                &      ethernet@ff290000             rockchip,rk3368-gmac                 )                                    umacirq             ,      8  $   
      
   f   
   g   
   c   
      
      
  ]      M  +stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            okay               -        rmii            output             .                              ' B@        +default         9   /           0                 usb@ff500000              generic-ehci                 P                                    $   
          okay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    $   
          +otg          host                                 )            @   @            okay          i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 $   
  L        +i2c                 <           +default         9   0                     +            okay       syr827@40             silergy,syr827              @        8           Uvdd_cpu         d  ,         
4         `          @                             1      hym8563@51            haoyu,hym8563               Q        m            J           Zxin32k              F         i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            +i2c         $   
  M        +default         9   2      	  disabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            +default         9   3        $   
  _        +pwm       	  disabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           +default         9   4        $   
  _        +pwm       	  disabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            $   
  _        +pwm       	  disabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          +default         9   5        $   
  _        +pwm       	  disabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 $   
   O   
  W        +baudclk apb_pclk                    9           +default         9   6                              okay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   $   
  E        +pclk_mailbox                     	  disabled          syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    :   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain           okay                                reboot-mode           syscon-reboot-mode          #           *RB         6RB        DRB	        TRB         clock-controller@ff760000             rockchip,rk3368-cru              v                    ,        m           `               
      syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     ,   io-domains        "    rockchip,rk3368-io-voltage-domain           okay            m           z                                  watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               $   
  p                O           okay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B         spdif@ff880000            rockchip,rk3368-spdif                                         6           $   
   S   
        
  +mclk hclk              7           tx          +default         9   8      	  disabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           +i2s_clk i2s_hclk            $   
   T   
             7      7           tx rx         	  disabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           +i2s_clk i2s_hclk            $   
   R   
             7       7           tx rx           +default         9   9      	  disabled          iommu@ff900800            rockchip,iommu                                                  uiep_mmu         $   
      
          +aclk iface                    	  disabled          iommu@ff914000            rockchip,iommu                @            P                                   uisp_mmu         $   
      
          +aclk iface                             	  disabled          iommu@ff930300            rockchip,iommu                                                  uvop_mmu         $   
      
          +aclk iface                    	  disabled          iommu@ff9a0440            rockchip,iommu                @       @           @                         	  uhevc_mmu            $   
      
          +aclk iface                    	  disabled          iommu@ff9a0800            rockchip,iommu                                       	          
           uvepu_mmu vdpu_mmu           $   
      
          +aclk iface                    	  disabled          efuse@ffb00000            rockchip,rk3368-efuse                                               +           $   
  q        +pclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl            ,           :                     +                gpio0@ff750000            rockchip,gpio-bank               u                 $   
  @                Q                                                       C      gpio1@ff780000            rockchip,gpio-bank               x                 $   
  A                R                                                 gpio2@ff790000            rockchip,gpio-bank               y                 $   
  B                S                                                       A      gpio3@ff7a0000            rockchip,gpio-bank               z                 $   
  C                T                                                       .      pcfg-pull-up             *            =      pcfg-pull-down           7      pcfg-pull-none           F            >      pcfg-pull-none-12ma          F        S               ?      emmc       emmc-clk            b            ;                  emmc-cmd            b            <                  emmc-pwr            b            =      emmc-bus1           b            =      emmc-bus4         @  b            =            =            =            =      emmc-bus8           b            <            <            <            <            <            <            <            <                  emmc-reset          b             >            @         gmac       rgmii-pins          b            >            >            >            ?      	      ?      
      ?            ?            ?            ?            >            >            >            >            >            >      rmii-pins           b            >            >            >            ?      	      ?            ?            >            >            >            >            /         i2c0       i2c0-xfer            b             >             >            0         i2c1       i2c1-xfer            b            >            >            2         i2c2       i2c2-xfer            b       	      >            >            "         i2c3       i2c3-xfer            b            >            >            #         i2c4       i2c4-xfer            b            >            >            $         i2c5       i2c5-xfer            b            >            >            %         i2s    i2s-8ch-bus         b            >            >            >            >            >            >            >            >            >            9         pwm0       pwm0-pin            b            >            3         pwm1       pwm1-pin            b             >            4         pwm3       pwm3-pin            b            >            5         sdio0      sdio0-bus1          b            =      sdio0-bus4        @  b            =            =            =            =                  sdio0-cmd           b             =                  sdio0-clk           b            >                  sdio0-cd            b            =      sdio0-wp            b            =      sdio0-pwr           b            =      sdio0-bkpwr         b            =      sdio0-int           b            =         sdmmc      sdmmc-clk           b      	      >      sdmmc-cmd           b      
      =      sdmmc-cd            b            =      sdmmc-bus1          b            =      sdmmc-bus4        @  b            =            =            =            =         spdif      spdif-tx            b            >            8         spi0       spi0-clk            b            =                  spi0-cs0            b            =                  spi0-cs1            b            =      spi0-tx         b            =                  spi0-rx         b            =                     spi1       spi1-clk            b            =                  spi1-cs0            b            =                  spi1-cs1            b            =      spi1-rx         b            =                  spi1-tx         b            =                     spi2       spi2-clk            b             =                  spi2-cs0            b             =            !      spi2-rx         b       
      =                   spi2-tx         b             =                     tsadc      otp-pin         b              >            *      otp-out         b             >            +         uart0      uart0-xfer           b            =            >      uart0-cts           b            >      uart0-rts           b            >         uart1      uart1-xfer           b             =             >      uart1-cts           b             >      uart1-rts           b             >         uart2      uart2-xfer           b            =            >            6         uart3      uart3-xfer           b            =            >      uart3-cts           b            >      uart3-rts           b            >         uart4      uart4-xfer           b             =             >      uart4-cts           b             >      uart4-rts           b             >         pcfg-pull-none-drv-8ma           F        S               ;      pcfg-pull-up-drv-8ma             *        S               <      ir     ir-int          b             =            E         keys       pwr-key         b              =            B         leds       stby-pwren          b              >      led-ctl         b             >            D         sdio       wifi-reg-on         b             >            H      bt-rst          b             >            G         usb    host-vbus-drv           b              >            I            chosen          pserial2:115200n8          memory           memory                       @         emmc-pwrseq           mmc-pwrseq-emmc         9   @        +default         |   A                         gpio-keys         
    gpio-keys           +default         9   B   power                       C              GPIO Power             t         gpio-leds         
    gpio-leds      led-0              .               r88:green:led           +default         9   D         ir-receiver           gpio-ir-receiver               .              +default         9   E      sdio-pwrseq           mmc-pwrseq-simple           $   F      
  +ext_clock           +default         9   G   H        |   .         .                        vcc18-regulator           regulator-fixed         Uvcc_18           w@         w@                             1                  vcc-host-regulator            regulator-fixed                     C               +default         9   I      	  Uvcc_host                                 1      vcc-io-regulator              regulator-fixed         Uvcc_io           2Z         2Z                             1                  vcc-lan-regulator             regulator-fixed         Uvcc_lan          2Z         2Z                                         -      vcc-sys-regulator             regulator-fixed         Uvcc_sys          LK@         LK@                              1      vccio-wl-regulator            regulator-fixed       	  Uvccio_wl             2Z         2Z                                               vdd-10-regulator              regulator-fixed         Uvdd_10           B@         B@                             1         	compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 cpu device_type reg enable-method #cooling-cells phandle ranges interrupts #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst clocks clock-names interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency fifo-depth resets reset-names status assigned-clocks assigned-clock-parents bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-mmc-highspeed #io-channel-cells vref-supply reg-shift reg-io-width polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-enable-ramp-delay regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply #pwm-cells #mbox-cells pmu-supply vop-supply offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells audio-supply gpio30-supply gpio1830-supply wifi-supply dmas dma-names #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path reset-gpios wakeup-source label linux,code enable-active-high 