  K   8  E   (              E                                                                     ,Hardkernel ODROID-C1          %   2hardkernel,odroid-c1 amlogic,meson8b       soc          2simple-bus                                     =   cbus@c1100000            2simple-bus           D                                        =             system-controller@4000        ,   2amlogic,meson-hhi-sysctrl simple-mfd syscon          D  @             H   	   clock-controller             2amlogic,meson8b-clkc             P                  Wxtal ddr_pll             c            p            H         power-controller             2amlogic,meson8b-pwrc             }                     X         B      C      K      O                                    
            F   dblk pic_dc hdmi_apb hdmi_system venci vencp vdac vencl viu venc rdma            P               Wvpu                         
G         H            assist@7c00          2amlogic,meson-mx-assist syscon           D  |          rng@8100          &   2amlogic,meson8b-rng amlogic,meson-rng            D               P               Wcore          serial@84c0          2amlogic,meson8b-uart             D                              	   disabled             P               
         Wxtal pclk baud        serial@84dc          2amlogic,meson8b-uart             D                     K         	   disabled             P               
         Wxtal pclk baud        i2c@8500             2amlogic,meson6-i2c           D                                                          	   disabled             P            pwm@8550             2amlogic,meson8b-pwm          D  P                     	   disabled          pwm@8650             2amlogic,meson8b-pwm          D  P                        okay                           default          P               Wclkin0 clkin1            H   ,      adc@8680          ,   2amlogic,meson8b-saradc amlogic,meson-saradc          D     4                           I            okay             P                  Wclkin core          #   	        7   
        Ctemperature_calib           T            H   *      serial@8700          2amlogic,meson8b-uart             D                      ]         	   disabled             P               
         Wxtal pclk baud        i2c@87c0             2amlogic,meson6-i2c           D                                                         	   disabled             P            phy@8800          3   2amlogic,meson8b-usb2-phy amlogic,meson-mx-usb2-phy          `             D             	   disabled             P      7      2         Wusb_general usb                "         H         phy@8820          3   2amlogic,meson8b-usb2-phy amlogic,meson-mx-usb2-phy          `             D                okay             P      7      3         Wusb_general usb                "         H         mmc@8c20          +   2amlogic,meson8b-sdio amlogic,meson-mx-sdio           D                                                             okay             P            
         Wcore clkin                      default    slot@1        	   2mmc-slot             D            okay            k            u         }                                5                                  spi@8c80             2amlogic,meson6-spifc             D                                     	   disabled          mmc@8e00          *   2amlogic,meson8-sdhc amlogic,meson-mx-sdhc            D      B                N            okay          $   P                                 !   Wclkin0 clkin1 clkin2 clkin3 pclk                        default         k                              }                  u                                       interrupt-controller@9880         2   2amlogic,meson-gpio-intc amlogic,meson8b-gpio-intc            D                      
               @   A   B   C   D   E   F   G         okay             H         watchdog@9900            2amlogic,meson8b-wdt          D                                timer@9940           2amlogic,meson6-timer             D  @         0          
                                          P         
      
   Wxtal pclk         reset-controller@4404            2amlogic,meson8b-reset            D  D            p            H         analog-top@81a8       "   2amlogic,meson8b-analog-top syscon            D           pwm@86c0             2amlogic,meson8b-pwm          D                       	   disabled          clock-measure@8758           2amlogic,meson8b-clk-measure          D  X         pinctrl@9880             2amlogic,meson8b-cbus-pinctrl             D                                        =         H      banks@80b0            D     (             0   8        6mux pull pull-enable gpio            @        P           \              S       hJ2 Header Pin 35 J2 Header Pin 36 J2 Header Pin 32 J2 Header Pin 31 J2 Header Pin 29 J2 Header Pin 18 J2 Header Pin 22 J2 Header Pin 16 J2 Header Pin 23 J2 Header Pin 21 J2 Header Pin 19 J2 Header Pin 33 J2 Header Pin 8 J2 Header Pin 10 J2 Header Pin 15 J2 Header Pin 13 J2 Header Pin 24 J2 Header Pin 26 Revision (upper) Revision (lower) J2 Header Pin 7  J2 Header Pin 12 J2 Header Pin 11    TFLASH_VDD_EN   VCCK_PWM (PWM_C) I2CA_SDA I2CA_SCL I2CB_SDA I2CB_SCL VDDEE_PWM (PWM_D)  HDMI_HPD HDMI_I2C_SDA HDMI_I2C_SCL ETH_PHY_INTR ETH_PHY_NRST ETH_TXD1 ETH_TXD0 ETH_TXD3 ETH_TXD2 ETH_RGMII_TX_CLK SD_DATA1 (SDB_D1) SD_DATA0 (SDB_D0) SD_CLK SD_CMD SD_DATA3 (SDB_D3) SD_DATA2 (SDB_D2) SD_CDN (SD_DET_N) SDC_D0 (EMMC) SDC_D1 (EMMC) SDC_D2 (EMMC) SDC_D3 (EMMC) SDC_D4 (EMMC) SDC_D5 (EMMC) SDC_D6 (EMMC) SDC_D7 (EMMC) SDC_CLK (EMMC) SDC_RSTn (EMMC) SDC_CMD (EMMC) BOOT_SEL        ETH_RXD1 ETH_RXD0 ETH_RX_DV RGMII_RX_CLK ETH_RXD3 ETH_RXD2 ETH_TXEN ETH_PHY_REF_CLK_25MOUT ETH_MDC ETH_MDIO             H         eth-rgmii            H      mux         xeth_tx_clk eth_tx_en eth_txd1_0 eth_txd0_0 eth_rx_clk eth_rx_dv eth_rxd1 eth_rxd0 eth_mdio_en eth_mdc eth_ref_clk eth_txd2 eth_txd3 eth_rxd3 eth_rxd2         	  ethernet                      eth-rmii       mux       [  xeth_tx_en eth_txd1_0 eth_txd0_0 eth_rx_clk eth_rx_dv eth_rxd1 eth_rxd0 eth_mdio_en eth_mdc        	  ethernet                      i2c-a      mux         xi2c_sda_a i2c_sck_a         i2c_a                     sd-b             H      mux       2  xsd_d0_b sd_d1_b sd_d2_b sd_d3_b sd_clk_b sd_cmd_b           sd_b                      sdxc-c           H      mux       6  xsdxc_d0_c sdxc_d13_c sdxc_d47_c sdxc_clk_c sdxc_cmd_c           sdxc_c                    pwm-c1           H      mux         xpwm_c1          pwm_c                     pwm-d            H      mux         xpwm_d           pwm_d                     uart-b0    mux         xuart_tx_b0 uart_rx_b0           uart_b                    uart-b0-cts-rts    mux         xuart_cts_b0 uart_rts_b0         uart_b                          cache-controller@c4200000            2arm,pl310-cache          D                                                                                                                  H          bus@c4300000             2simple-bus           D0                                       =    0        interrupt-controller@1000            2arm,cortex-a9-gic            D                             
            H         scu@0            2arm,cortex-a5-scu            D             timer@200            2arm,cortex-a5-global-timer           D                                 P      ~      	   disabled          timer@600            2arm,cortex-a5-twd-timer          D                                 P      ~         aobus@c8100000           2simple-bus           D                                       =            ir-receiver@480          2amlogic,meson6-ir            D                                  okay                        default       serial@4c0        +   2amlogic,meson8b-uart amlogic,meson-ao-uart           D                     Z            okay             P         
      
         Wxtal pclk baud                      default       i2c@500          2amlogic,meson6-i2c           D                       \                                   	   disabled             P      
      rtc@740          2amlogic,meson8b-rtc          D  @                   H                                  	   disabled                            P                     pmu@e0           2amlogic,meson8b-pmu syscon           D               H         pinctrl@84           2amlogic,meson8b-aobus-pinctrl            D                                         =         H      ao-bank@14           D         ,      $           6mux pull gpio            @        P           \                      hUART TX UART RX  TF_3V3N_1V8_EN USB_HUB_RST_N USB_OTG_PWREN J7 Header Pin 2 IR_IN J7 Header Pin 4 J7 Header Pin 6 J7 Header Pin 5 J7 Header Pin 7 HDMI_CEC SYS_LED               H   )   usb-hub          +                        4        @usb-hub-reset            uart_ao_a            H      mux         xuart_tx_ao_a uart_rx_ao_a           uart_ao                   remote           H      mux         xremote_input            remote                          usb@c9040000             2amlogic,meson8b-usb snps,dwc2                                      D                                J         	  Ousb2-phy            Y           h          z                       host          	   disabled             P      A         Wotg       usb@c90c0000             2amlogic,meson8b-usb snps,dwc2                                      D                                J         	  Ousb2-phy            host             okay             P      @         Wotg       ethernet@c9410000         2   2amlogic,meson8b-dwmac snps,dwmac-3.70a snps,dwmac            DA     @                              macirq           okay              P      $      _      _            *   Wstmmaceth clkin0 clkin1 timing-adjustment                                        +      
   stmmaceth                                     default                  	  rgmii-id            7           Cmac-address    mdio             2snps,dwmac-mdio                              ethernet-phy@0           D              '         8              )                                       H               sram@d9000000         
   2mmio-sram            D                                        =             smp-sram@1ff80           2amlogic,meson8b-smp-sram             D             bootrom@d9040000              2amlogic,meson-mx-bootrom syscon          D           secbus@da000000          2simple-bus           D     `                                   =         `    nvmem@0          2amlogic,meson8b-efuse            D                                          P      :         Wcore       calib@1f4            D              H   
      mac@1b4          D              H                  xtal-clk             2fixed-clock         n6         xtal             c             H         cpus                                 cpu@200         0cpu          2arm,cortex-a5           <             D           Mamlogic,meson8b-smp                        [   !         P              o   "         H   #      cpu@201         0cpu          2arm,cortex-a5           <             D          Mamlogic,meson8b-smp                        [   !         P               H   $      cpu@202         0cpu          2arm,cortex-a5           <             D          Mamlogic,meson8b-smp                        [   !         P               H   %      cpu@203         0cpu          2arm,cortex-a5           <             D          Mamlogic,meson8b-smp                        [   !         P               H   &         opp-table            2operating-points-v2          z         H   !   opp-96000000                          `      opp-192000000               q          `      opp-312000000                         `      opp-408000000               Q          `      opp-504000000               
n          `      opp-600000000               #F          `      opp-720000000               *T          `      opp-816000000               0,                opp-1008000000              <          e       opp-1200000000              G          e       opp-1320000000              N          e       opp-1488000000              X          e       opp-1536000000              [          e          gpu-opp-table            2operating-points-v2          H   '   opp-255000000               2               opp-364285714                              opp-425000000               T@               opp-510000000               e               opp-637500000               %z`                           pmu          2arm,cortex-a5-pmu         0                                                      #   $   %   &      reserved-memory                                    =   hwrom@0          D                          bus@c8000000             2simple-bus           D                                        =             clock-controller@400             2amlogic,meson8b-ddr-clkc             D                P            Wxtal             c            H         bus@6000             2simple-bus           D  `                                      =      `       video-lut@48          &   2amlogic,meson8b-canvas amlogic,canvas            D   H               bus@d0000000             2simple-bus           D                                         =              gpu@c0000         "   2amlogic,meson8b-mali arm,mali-450            D            `                                                                                         &  gp gpmmu pp pmu pp0 ppmmu0 pp1 ppmmu1                  N         P      
            	   Wbus core            [   '           (         aliases         /soc/aobus@c8100000/serial@4c0        #  /soc/cbus@c1100000/mmc@8c20/slot@1          /soc/cbus@c1100000/mmc@8e00       chosen          serial0:115200n8          memory          0memory           D@   @         emmc-pwrseq          2mmc-pwrseq-emmc               ?            H         leds          
   2gpio-leds      blue            c1:blue:alive              )            
  heartbeat           off          regulator-p5v0           2regulator-fixed         P5V0            " LK@        : LK@         H   +      regulator-tflash_vdd             2regulator-fixed         TFLASH_VDD          " 2Z        : 2Z        R           ]                   b         H         gpio-regulator-tf_io             2regulator-gpio          TF_IO           " w@        : 2Z        R              )               u            { 2Z     w@            H         iio-hwmon         
   2iio-hwmon              *         rtc32k-xtal-clk          2fixed-clock                    RTC32K           c             H         regulator-vcc-1v8            2regulator-fixed         VCC1V8          " w@        : w@        R   +         H         regulator-vcc-3v3            2regulator-fixed         VCC3V3          " 2Z        : 2Z        R   +         H         regulator-vcck           2pwm-regulator           VCCK            " `        : e            +           ,      /               [                               H   "      regulator-vddc-ddr           2regulator-fixed       	  DDR_VDDC            " `        : `        R   +      regulator-vddee          2pwm-regulator           VDDEE           " `        : e            +           ,     /               [                               H   (      regulator-vdd-rtc            2regulator-fixed         VDD_RTC         "         :         R            H            	#address-cells #size-cells interrupt-parent model compatible ranges reg phandle clocks clock-names #clock-cells #reset-cells #power-domain-cells amlogic,ao-sysctrl resets reset-names assigned-clocks assigned-clock-rates interrupts status #pwm-cells pinctrl-0 pinctrl-names #io-channel-cells amlogic,hhi-sysctrl nvmem-cells nvmem-cell-names vref-supply #phy-cells bus-width no-sdio cap-mmc-highspeed cap-sd-highspeed disable-wp cd-gpios vmmc-supply vqmmc-supply max-frequency mmc-hs200-1_8v mmc-pwrseq interrupt-controller #interrupt-cells amlogic,channel-interrupts reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names groups function bias-disable bias-pull-up cache-unified cache-level arm,data-latency arm,tag-latency arm,filter-ranges prefetch-data prefetch-instr arm,shared-override vdd-supply gpio-hog output-high line-name phys phy-names g-rx-fifo-size g-np-tx-fifo-size g-tx-fifo-size dr_mode interrupt-names rx-fifo-depth tx-fifo-depth power-domains phy-handle phy-mode reset-assert-us reset-deassert-us reset-gpios clock-frequency clock-output-names device_type next-level-cache enable-method operating-points-v2 cpu-supply opp-shared opp-hz opp-microvolt turbo-mode interrupt-affinity no-map mali-supply serial0 mmc0 mmc1 stdout-path label linux,default-trigger default-state regulator-name regulator-min-microvolt regulator-max-microvolt vin-supply gpio enable-active-high gpios-states io-channels pwm-supply pwms pwm-dutycycle-range regulator-boot-on regulator-always-on 