     8     (                                           4    ti,omap3-beagle-xm ti,omap3630 ti,omap36xx ti,omap3                                  +            7TI OMAP3 BeagleBoard xM    chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@49042000            {/connector0          /connector1       @   /ocp@68000000/usbhshost@48064000/ehci@48064800/hub@2/usbether@1       cpus                         +       cpu@0             arm,cortex-a8            cpu                                   cpu                                                                              pmu@54000000              arm,cortex-a8-pmu            T              	           debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu            mpu       iva       
    ti,iva2.2           iva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h              	   	   
                     +                    l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus                                       +                          pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +            %           4            E        Z           x          default                          pinmux_uart3_pins             n     p                     pinmux_hsusb2_pins        0                                           pinmux_dss_dpi_pins2                                                                                                                                                                                 pinmux_twl4030_pins             A                    scm_conf@270              syscon simple-bus              p  0                     +                 p  0              pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap                                pbias_mmc_omap2430          pbias_mmc_omap2430           w@         -                    clocks                       +       mcbsp5_mux_fck@68                         ti,composite-mux-clock                 	                       h                 mcbsp5_fck                        ti,composite-clock              
                    mcbsp1_mux_fck@4                          ti,composite-mux-clock                 	                                        mcbsp1_fck                        ti,composite-clock                                  mcbsp2_mux_fck@4                          ti,composite-mux-clock                 	                                        mcbsp2_fck                        ti,composite-clock                                  mcbsp3_mux_fck@68                         ti,composite-mux-clock                 	            h                 mcbsp3_fck                        ti,composite-clock                                  mcbsp4_mux_fck@68                         ti,composite-mux-clock                 	                       h                 mcbsp4_fck                        ti,composite-clock                                        clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +            %           4            E        Z           x     pinmux_gpio1_pins                A                 pinmux_dss_dpi_pins1          0     
                                                 pinmux_twl4030_vpins                                                                  target-module@480a6000            ti,sysc-omap2 ti,sysc            H
`D   H
`H   H
`L           !rev sysc syss           +           8                  F                        ick                      +               H
`        aes1@0            ti,omap3-aes                    P        	            S      	      
        Xtx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            HPD   HPH   HPL           !rev sysc syss           +           8                  F                        ick                      +               HP        aes2@0            ti,omap3-aes                    P        	            S      A      B        Xtx rx            prm@48306000              ti,omap3-prm             H0`   @         	      clocks                       +       virt_16_8m_ck                         fixed-clock         b Y                  osc_sys_ck@d40                        ti,mux-clock                                          @                 sys_ck@1270                       ti,divider-clock                                   r              p         }           #      sys_clkout1@d70                       ti,gate-clock                          p                 dpll3_x2_ck                       fixed-factor-clock                                          dpll3_m2x2_ck                         fixed-factor-clock                                                "      dpll4_x2_ck                       fixed-factor-clock              !                            corex2_fck                        fixed-factor-clock              "                                 $      wkup_l4_ick                       fixed-factor-clock              #                                 S      corex2_d3_fck                         fixed-factor-clock              $                                       corex2_d5_fck                         fixed-factor-clock              $                                          clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk                        fixed-clock         b          omap_32k_fck                          fixed-clock         b              E      virt_12m_ck                       fixed-clock         b                   virt_13m_ck                       fixed-clock         b ]@                 virt_19200000_ck                          fixed-clock         b$                  virt_26000000_ck                          fixed-clock         b                 virt_38_4m_ck                         fixed-clock         bI                  dpll4_ck@d00                          ti,omap3-dpll-per-j-type-clock              #   #                 D  0           !      dpll4_m2_ck@d48                       ti,divider-clock                !        r   ?           H         }           %      dpll4_m2x2_mul_ck                         fixed-factor-clock              %                                 &      dpll4_m2x2_ck@d00                         ti,hsdiv-gate-clock             &                                           '      omap_96m_alwon_fck                        fixed-factor-clock              '                                 .      dpll3_ck@d00                          ti,omap3-dpll-core-clock                #   #                 @  0                 dpll3_m3_ck@1140                          ti,divider-clock                                   r              @         }           (      dpll3_m3x2_mul_ck                         fixed-factor-clock              (                                 )      dpll3_m3x2_ck@d00                         ti,hsdiv-gate-clock             )                                           *      emu_core_alwon_ck                         fixed-factor-clock              *                                 g      sys_altclk                        fixed-clock         b               3      mcbsp_clks                        fixed-clock         b               	      dpll3_m2_ck@d40                       ti,divider-clock                                   r              @         }                  core_ck                       fixed-factor-clock                                                +      dpll1_fck@940                         ti,divider-clock                +                   r              	@         }           ,      dpll1_ck@904                          ti,omap3-dpll-clock             #   ,           	  	$  	@  	4                 dpll1_x2_ck                       fixed-factor-clock                                               -      dpll1_x2m2_ck@944                         ti,divider-clock                -        r              	D         }           A      cm_96m_fck                        fixed-factor-clock              .                                 /      omap_96m_fck@d40                          ti,mux-clock                /   #                      @           J      dpll4_m3_ck@e40                       ti,divider-clock                !                   r               @         }           0      dpll4_m3x2_mul_ck                         fixed-factor-clock              0                                 1      dpll4_m3x2_ck@d00                         ti,hsdiv-gate-clock             1                                           2      omap_54m_fck@d40                          ti,mux-clock                2   3                      @           =      cm_96m_d2_fck                         fixed-factor-clock              /                                 4      omap_48m_fck@d40                          ti,mux-clock                4   3                      @           5      omap_12m_fck                          fixed-factor-clock              5                                 L      dpll4_m4_ck@e40                       ti,divider-clock                !        r              @         }           6      dpll4_m4x2_mul_ck                         ti,fixed-factor-clock               6                                          7      dpll4_m4x2_ck@d00                         ti,gate-clock               7                                                          dpll4_m5_ck@f40                       ti,divider-clock                !        r   ?           @         }           8      dpll4_m5x2_mul_ck                         ti,fixed-factor-clock               8                                          9      dpll4_m5x2_ck@d00                         ti,hsdiv-gate-clock             9                                                    o      dpll4_m6_ck@1140                          ti,divider-clock                !                   r   ?           @         }           :      dpll4_m6x2_mul_ck                         fixed-factor-clock              :                                 ;      dpll4_m6x2_ck@d00                         ti,hsdiv-gate-clock             ;                                           <      emu_per_alwon_ck                          fixed-factor-clock              <                                 h      clkout2_src_gate_ck@d70                        ti,composite-no-wait-gate-clock             +                      p           >      clkout2_src_mux_ck@d70                        ti,composite-mux-clock              +   #   /   =           p           ?      clkout2_src_ck                        ti,composite-clock              >   ?           @      sys_clkout2@d70                       ti,divider-clock                @                   r   @           p               mpu_ck                        fixed-factor-clock              A                                 B      arm_fck@924                       ti,divider-clock                B           	$        r         emu_mpu_alwon_ck                          fixed-factor-clock              B                                 i      l3_ick@a40                        ti,divider-clock                +        r              
@         }           C      l4_ick@a40                        ti,divider-clock                C                   r              
@         }           D      rm_ick@c40                        ti,divider-clock                D                   r              @         }      gpt10_gate_fck@a00                        ti,composite-gate-clock             #                      
            F      gpt10_mux_fck@a40                         ti,composite-mux-clock              E   #                      
@           G      gpt10_fck                         ti,composite-clock              F   G      gpt11_gate_fck@a00                        ti,composite-gate-clock             #                      
            H      gpt11_mux_fck@a40                         ti,composite-mux-clock              E   #                      
@           I      gpt11_fck                         ti,composite-clock              H   I      core_96m_fck                          fixed-factor-clock              J                                       mmchs2_fck@a00                        ti,wait-gate-clock                         
                             mmchs1_fck@a00                        ti,wait-gate-clock                         
                             i2c3_fck@a00                          ti,wait-gate-clock                         
                             i2c2_fck@a00                          ti,wait-gate-clock                         
                             i2c1_fck@a00                          ti,wait-gate-clock                         
                             mcbsp5_gate_fck@a00                       ti,composite-gate-clock             	           
           
            
      mcbsp1_gate_fck@a00                       ti,composite-gate-clock             	           	           
                  core_48m_fck                          fixed-factor-clock              5                                 K      mcspi4_fck@a00                        ti,wait-gate-clock              K           
                             mcspi3_fck@a00                        ti,wait-gate-clock              K           
                             mcspi2_fck@a00                        ti,wait-gate-clock              K           
                             mcspi1_fck@a00                        ti,wait-gate-clock              K           
                             uart2_fck@a00                         ti,wait-gate-clock              K           
                             uart1_fck@a00                         ti,wait-gate-clock              K           
                             core_12m_fck                          fixed-factor-clock              L                                 M      hdq_fck@a00                       ti,wait-gate-clock              M           
                             core_l3_ick                       fixed-factor-clock              C                                 N      sdrc_ick@a10                          ti,wait-gate-clock              N           
                            gpmc_fck                          fixed-factor-clock              N                            core_l4_ick                       fixed-factor-clock              D                                 O      mmchs2_ick@a10                        ti,omap3-interface-clock                O           
                            mmchs1_ick@a10                        ti,omap3-interface-clock                O           
                            hdq_ick@a10                       ti,omap3-interface-clock                O           
                            mcspi4_ick@a10                        ti,omap3-interface-clock                O           
                            mcspi3_ick@a10                        ti,omap3-interface-clock                O           
                            mcspi2_ick@a10                        ti,omap3-interface-clock                O           
                            mcspi1_ick@a10                        ti,omap3-interface-clock                O           
                            i2c3_ick@a10                          ti,omap3-interface-clock                O           
                            i2c2_ick@a10                          ti,omap3-interface-clock                O           
                            i2c1_ick@a10                          ti,omap3-interface-clock                O           
                            uart2_ick@a10                         ti,omap3-interface-clock                O           
                            uart1_ick@a10                         ti,omap3-interface-clock                O           
                            gpt11_ick@a10                         ti,omap3-interface-clock                O           
                            gpt10_ick@a10                         ti,omap3-interface-clock                O           
                            mcbsp5_ick@a10                        ti,omap3-interface-clock                O           
           
                 mcbsp1_ick@a10                        ti,omap3-interface-clock                O           
           	                 omapctrl_ick@a10                          ti,omap3-interface-clock                O           
                            dss_tv_fck@e00                        ti,gate-clock               =                                        dss_96m_fck@e00                       ti,gate-clock               J                                        dss2_alwon_fck@e00                        ti,gate-clock               #                                        dummy_ck                          fixed-clock         b          gpt1_gate_fck@c00                         ti,composite-gate-clock             #                                   P      gpt1_mux_fck@c40                          ti,composite-mux-clock              E   #           @           Q      gpt1_fck                          ti,composite-clock              P   Q                 aes2_ick@a10                          ti,omap3-interface-clock                O                      
                 wkup_32k_fck                          fixed-factor-clock              E                                 R      gpio1_dbck@c00                        ti,gate-clock               R                                        sha12_ick@a10                         ti,omap3-interface-clock                O           
                            wdt2_fck@c00                          ti,wait-gate-clock              R                                        wdt2_ick@c10                          ti,omap3-interface-clock                S                                       wdt1_ick@c10                          ti,omap3-interface-clock                S                                       gpio1_ick@c10                         ti,omap3-interface-clock                S                                       omap_32ksync_ick@c10                          ti,omap3-interface-clock                S                                       gpt12_ick@c10                         ti,omap3-interface-clock                S                                       gpt1_ick@c10                          ti,omap3-interface-clock                S                                        per_96m_fck                       fixed-factor-clock              .                                       per_48m_fck                       fixed-factor-clock              5                                 T      uart3_fck@1000                        ti,wait-gate-clock              T                                        gpt2_gate_fck@1000                        ti,composite-gate-clock             #                                  U      gpt2_mux_fck@1040                         ti,composite-mux-clock              E   #           @           V      gpt2_fck                          ti,composite-clock              U   V                 gpt3_gate_fck@1000                        ti,composite-gate-clock             #                                  W      gpt3_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           X      gpt3_fck                          ti,composite-clock              W   X      gpt4_gate_fck@1000                        ti,composite-gate-clock             #                                  Y      gpt4_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           Z      gpt4_fck                          ti,composite-clock              Y   Z      gpt5_gate_fck@1000                        ti,composite-gate-clock             #                                  [      gpt5_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           \      gpt5_fck                          ti,composite-clock              [   \      gpt6_gate_fck@1000                        ti,composite-gate-clock             #                                  ]      gpt6_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           ^      gpt6_fck                          ti,composite-clock              ]   ^      gpt7_gate_fck@1000                        ti,composite-gate-clock             #                                  _      gpt7_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           `      gpt7_fck                          ti,composite-clock              _   `      gpt8_gate_fck@1000                        ti,composite-gate-clock             #           	                       a      gpt8_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           b      gpt8_fck                          ti,composite-clock              a   b      gpt9_gate_fck@1000                        ti,composite-gate-clock             #           
                       c      gpt9_mux_fck@1040                         ti,composite-mux-clock              E   #                      @           d      gpt9_fck                          ti,composite-clock              c   d      per_32k_alwon_fck                         fixed-factor-clock              E                                 e      gpio6_dbck@1000                       ti,gate-clock               e                                        gpio5_dbck@1000                       ti,gate-clock               e                                        gpio4_dbck@1000                       ti,gate-clock               e                                        gpio3_dbck@1000                       ti,gate-clock               e                                        gpio2_dbck@1000                       ti,gate-clock               e                                        wdt3_fck@1000                         ti,wait-gate-clock              e                                        per_l4_ick                        fixed-factor-clock              D                                 f      gpio6_ick@1010                        ti,omap3-interface-clock                f                                       gpio5_ick@1010                        ti,omap3-interface-clock                f                                       gpio4_ick@1010                        ti,omap3-interface-clock                f                                       gpio3_ick@1010                        ti,omap3-interface-clock                f                                       gpio2_ick@1010                        ti,omap3-interface-clock                f                                       wdt3_ick@1010                         ti,omap3-interface-clock                f                                       uart3_ick@1010                        ti,omap3-interface-clock                f                                       uart4_ick@1010                        ti,omap3-interface-clock                f                                       gpt9_ick@1010                         ti,omap3-interface-clock                f                      
                 gpt8_ick@1010                         ti,omap3-interface-clock                f                      	                 gpt7_ick@1010                         ti,omap3-interface-clock                f                                       gpt6_ick@1010                         ti,omap3-interface-clock                f                                       gpt5_ick@1010                         ti,omap3-interface-clock                f                                       gpt4_ick@1010                         ti,omap3-interface-clock                f                                       gpt3_ick@1010                         ti,omap3-interface-clock                f                                       gpt2_ick@1010                         ti,omap3-interface-clock                f                                       mcbsp2_ick@1010                       ti,omap3-interface-clock                f                                        mcbsp3_ick@1010                       ti,omap3-interface-clock                f                                       mcbsp4_ick@1010                       ti,omap3-interface-clock                f                                       mcbsp2_gate_fck@1000                          ti,composite-gate-clock             	                                         mcbsp3_gate_fck@1000                          ti,composite-gate-clock             	                                        mcbsp4_gate_fck@1000                          ti,composite-gate-clock             	                                        emu_src_mux_ck@1140                       ti,mux-clock                #   g   h   i           @           j      emu_src_ck                        ti,clkdm-gate-clock             j           k      pclk_fck@1140                         ti,divider-clock                k                   r              @         }      pclkx2_fck@1140                       ti,divider-clock                k                   r              @         }      atclk_fck@1140                        ti,divider-clock                k                   r              @         }      traceclk_src_fck@1140                         ti,mux-clock                #   g   h   i                      @           l      traceclk_fck@1140                         ti,divider-clock                l                   r              @         }      secure_32k_fck                        fixed-clock         b              m      gpt12_fck                         fixed-factor-clock              m                                       wdt1_fck                          fixed-factor-clock              m                            security_l4_ick2                          fixed-factor-clock              D                                 n      aes1_ick@a14                          ti,omap3-interface-clock                n                      
                 rng_ick@a14                       ti,omap3-interface-clock                n           
                            sha11_ick@a14                         ti,omap3-interface-clock                n           
                 des1_ick@a14                          ti,omap3-interface-clock                n           
                  cam_mclk@f00                          ti,gate-clock               o                                       cam_ick@f10                   !    ti,omap3-no-wait-interface-clock                D                                        csi2_96m_fck@f00                          ti,gate-clock                                                       security_l3_ick                       fixed-factor-clock              C                                 p      pka_ick@a14                       ti,omap3-interface-clock                p           
                 icr_ick@a10                       ti,omap3-interface-clock                O           
                 des2_ick@a10                          ti,omap3-interface-clock                O           
                 mspro_ick@a10                         ti,omap3-interface-clock                O           
                 mailboxes_ick@a10                         ti,omap3-interface-clock                O           
                 ssi_l4_ick                        fixed-factor-clock              D                                 w      sr1_fck@c00                       ti,wait-gate-clock              #                                 
      sr2_fck@c00                       ti,wait-gate-clock              #                                 	      sr_l4_ick                         fixed-factor-clock              D                            dpll2_fck@40                          ti,divider-clock                +                   r               @         }           q      dpll2_ck@4                        ti,omap3-dpll-clock             #   q               $   @   4                                      r      dpll2_m2_ck@44                        ti,divider-clock                r        r               D         }           s      iva2_ck@0                         ti,wait-gate-clock              s                                          modem_fck@a00                         ti,omap3-interface-clock                #           
                             sad2d_ick@a10                         ti,omap3-interface-clock                C           
                            mad2d_ick@a18                         ti,omap3-interface-clock                C           
                            mspro_fck@a00                         ti,wait-gate-clock                         
                  ssi_ssr_gate_fck_3430es2@a00                           ti,composite-no-wait-gate-clock             $                       
            t      ssi_ssr_div_fck_3430es2@a40                       ti,composite-divider-clock              $                      
@      $  1                                         u      ssi_ssr_fck_3430es2                       ti,composite-clock              t   u           v      ssi_sst_fck_3430es2                       fixed-factor-clock              v                                      hsotgusb_ick_3430es2@a10                      "    ti,omap3-hsotgusb-interface-clock               N           
                            ssi_ick_3430es2@a10                       ti,omap3-ssi-interface-clock                w           
                            usim_gate_fck@c00                         ti,composite-gate-clock             J           	                             sys_d2_ck                         fixed-factor-clock              #                                 y      omap_96m_d2_fck                       fixed-factor-clock              J                                 z      omap_96m_d4_fck                       fixed-factor-clock              J                                 {      omap_96m_d8_fck                       fixed-factor-clock              J                                 |      omap_96m_d10_fck                          fixed-factor-clock              J                      
           }      dpll5_m2_d4_ck                        fixed-factor-clock              x                                 ~      dpll5_m2_d8_ck                        fixed-factor-clock              x                                       dpll5_m2_d16_ck                       fixed-factor-clock              x                                       dpll5_m2_d20_ck                       fixed-factor-clock              x                                       usim_mux_fck@c40                          ti,composite-mux-clock        (      #   y   z   {   |   }   ~                               @         }                 usim_fck                          ti,composite-clock                       usim_ick@c10                          ti,omap3-interface-clock                S                      	                 dpll5_ck@d04                          ti,omap3-dpll-clock             #   #             $  L  4                                   dpll5_m2_ck@d50                       ti,divider-clock                        r              P         }           x      sgx_gate_fck@b00                          ti,composite-gate-clock             +                                        core_d3_ck                        fixed-factor-clock              +                                       core_d4_ck                        fixed-factor-clock              +                                       core_d6_ck                        fixed-factor-clock              +                                       omap_192m_alwon_fck                       fixed-factor-clock              '                                       core_d2_ck                        fixed-factor-clock              +                                       sgx_mux_fck@b40                       ti,composite-mux-clock                        /                       @                 sgx_fck                       ti,composite-clock                                 sgx_ick@b10                       ti,wait-gate-clock              C                                        cpefuse_fck@a08                       ti,gate-clock               #           
                             ts_fck@a08                        ti,gate-clock               E           
                            usbtll_fck@a08                        ti,wait-gate-clock              x           
                            usbtll_ick@a18                        ti,omap3-interface-clock                O           
                            mmchs3_ick@a10                        ti,omap3-interface-clock                O           
                            mmchs3_fck@a00                        ti,wait-gate-clock                         
                             dss1_alwon_fck_3430es2@e00                        ti,dss-gate-clock                                                                 dss_ick_3430es2@e10                       ti,omap3-dss-interface-clock                D                                        usbhost_120m_fck@1400                         ti,gate-clock               x                                        usbhost_48m_fck@1400                          ti,dss-gate-clock               5                                         usbhost_ick@1410                          ti,omap3-dss-interface-clock                D                                        uart4_fck@1000                        ti,wait-gate-clock              T                                           clockdomains       core_l3_clkdm             ti,clockdomain                       dpll3_clkdm           ti,clockdomain                    dpll1_clkdm           ti,clockdomain                    per_clkdm             ti,clockdomain        l                                                                                          emu_clkdm             ti,clockdomain              k      dpll4_clkdm           ti,clockdomain              !      wkup_clkdm            ti,clockdomain        $                                    dss_clkdm             ti,clockdomain                                core_l4_clkdm             ti,clockdomain                                                                                                                                cam_clkdm             ti,clockdomain                       iva2_clkdm            ti,clockdomain                    dpll2_clkdm           ti,clockdomain              r      d2d_clkdm             ti,clockdomain                          dpll5_clkdm           ti,clockdomain                    sgx_clkdm             ti,clockdomain                    usbhost_clkdm             ti,clockdomain                                target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  !rev sysc            8                   R            fck ick                      +               H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc            E        4            H                       target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           !rev sysc syss           +  #        =                  8                  F               N         ick                      +               H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma                           	                    K           V            c   `                    gpio@48310000             ti,omap3-gpio            H1             	           gpio1            p                             E        4           default                            gpio@49050000             ti,omap3-gpio            I             	           gpio2                                E        4         gpio@49052000             ti,omap3-gpio            I             	           gpio3                                E        4         gpio@49054000             ti,omap3-gpio            I@            	            gpio4                                E        4         gpio@49056000             ti,omap3-gpio            I`            	   !        gpio5                                E        4                   gpio@49058000             ti,omap3-gpio            I            	   "        gpio6                                E        4         serial@4806a000           ti,omap3-uart            H                   H        S      1      2        Xtx rx           uart1           bl       serial@4806c000           ti,omap3-uart            H                  I        S      3      4        Xtx rx           uart2           bl       serial@49020000           ti,omap3-uart            I                   J     n        S      5      6        Xtx rx           uart3           bl         default                  i2c@48070000              ti,omap3-i2c             H             	   8        S                    Xtx rx                        +            i2c1            b '@   twl@48              H        	                                    fck           ti,twl4030           E        4           default                  audio             ti,twl4030-audio       codec            power         >    ti,twl4030-power-beagleboard-xm ti,twl4030-power-idle-osc-off                  rtc           ti,twl4030-rtc          	         bci           ti,twl4030-bci          	   	                                    vac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2            usb_1v8          w@         w@               regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1          	'                           regulator-vdac            ti,twl4030-vdac          w@         w@                regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1             :         0                 regulator-vmmc2           ti,twl4030-vmmc2             :         0      regulator-vusb1v5             ti,twl4030-vusb1v5                   regulator-vusb1v8             ti,twl4030-vusb1v8                   regulator-vusb3v1             ti,twl4030-vusb3v1                   regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2             w@         w@      regulator-vsim            ti,twl4030-vsim          w@         -                 gpio              ti,twl4030-gpio                              E        4                                                twl4030-usb           ti,twl4030-usb          	   
           %           3           A           O           X                     pwm           ti,twl4030-pwm          c         pwmled            ti,twl4030-pwmled           c                   pwrbutton             ti,twl4030-pwrbutton            	         keypad            ti,twl4030-keypad           	           n           ~         madc              ti,twl4030-madc         	                                     i2c@48072000              ti,omap3-i2c             H             	   9        S                    Xtx rx                        +            i2c2            b       i2c@48060000              ti,omap3-i2c             H             	   =        S                    Xtx rx                        +            i2c3            b                 mailbox@48094000              ti,omap3-mailbox            mailbox          H	@            	                                       dsp                                                 spi@48098000              ti,omap2-mcspi           H	            	   A                     +            mcspi1                   @  S      #      $      %      &      '      (      )      *         Xtx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       spi@4809a000              ti,omap2-mcspi           H	            	   B                     +            mcspi2                      S      +      ,      -      .        Xtx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           H            	   [                     +            mcspi3                      S                                Xtx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           H            	   0                     +            mcspi4                     S      F      G        Xtx0 rx0       1w@480b2000           ti,omap3-1w          H             	   :        hdq1w         mmc@4809c000              ti,omap3-hsmmc           H	            	   S        mmc1                     S      =      >        Xtx rx                                            *         mmc@480b4000              ti,omap3-hsmmc           H@            	   V        mmc2            S      /      0        Xtx rx         	  4disabled          mmc@480ad000              ti,omap3-hsmmc           H
            	   ^        mmc3            S      M      N        Xtx rx         	  4disabled          mmu@480bd400            ;              ti,omap2-iommu           H            	           mmu_isp         H                   mmu@5d000000            ;              ti,omap2-iommu           ]              	           mmu_iva       	  4disabled          wdt@48314000              ti,omap3-wdt             H1@          
  wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@            !mpu         	      ;   <        Xcommon tx rx            h           mcbsp1          S                     Xtx rx                        fck       	  4disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           !rev sysc syss           +           8               F                        ick                      +               H
         rng@0             ti,omap2-rng                             	   4         mcbsp@49022000            ti,omap3-mcbsp           I     I            !mpu sidetone            	      >   ?           Xcommon tx rx sidetone           h           mcbsp2 mcbsp2_sidetone          S      !      "        Xtx rx                           fck ick         4okay                    mcbsp@49024000            ti,omap3-mcbsp           I@    I            !mpu sidetone            	      Y   Z           Xcommon tx rx sidetone           h           mcbsp3 mcbsp3_sidetone          S                    Xtx rx                           fck ick       	  4disabled          mcbsp@49026000            ti,omap3-mcbsp           I`            !mpu         	      6   7        Xcommon tx rx            h           mcbsp4          S                    Xtx rx                        fck         w          	  4disabled          mcbsp@48096000            ti,omap3-mcbsp           H	`            !mpu         	      Q   R        Xcommon tx rx            h           mcbsp5          S                    Xtx rx                        fck       	  4disabled          sham@480c3000             ti,omap3-sham           sham             H0    d        	   1        S      E        Xrx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1    H1   H1           !rev sysc syss           +  '        8                  F                           fck ick                      +               H1                         timer@0           ti,omap3430-timer                                        fck         	   %                               E         target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            !rev sysc syss           +  '        8                  F                           fck ick                      +               I        timer@0           ti,omap3430-timer                           	   &         timer@49034000            ti,omap3430-timer            I@            	   '        timer3        timer@49036000            ti,omap3430-timer            I`            	   (        timer4        timer@49038000            ti,omap3430-timer            I            	   )        timer5                 timer@4903a000            ti,omap3430-timer            I            	   *        timer6                 timer@4903c000            ti,omap3430-timer            I            	   +        timer7                 timer@4903e000            ti,omap3430-timer            I            	   ,        timer8                          timer@49040000            ti,omap3430-timer            I             	   -        timer9                 timer@48086000            ti,omap3430-timer            H`            	   .        timer10                timer@48088000            ti,omap3430-timer            H            	   /        timer11                target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           !rev sysc syss           +  '        8                  F                           fck ick                      +               H0@       timer@0           ti,omap3430-timer                           	   _                           usbhstll@48062000             ti,usbhs-tll             H             	   N        usb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@            usb_host_hs                      +                  	  ehci-phy       ohci@48064400             ti,ohci-omap3            HD            	   L               ehci@48064800             ti,ehci-omap             HH            	   M        *                            +       hub@2             usb424,9514                                  +       usbether@1            usb424,ec00                            gpmc@6e000000             ti,omap3430-gpmc            gpmc             n             	           S              Xrxtx            /           ;                        +            E        4                             usb_otg_hs@480ab000           ti,omap3-musb            H
            	   \   ]        Xmc dma          usb_otg_hs          M           X           `           i            x           *         	  usb2-phy            S              2      dss@48050000              ti,omap3-dss             H             4okay          	  dss_core                         fck                      +                    default                 dispc@48050400            ti,omap3-dispc           H            	         
  dss_dispc                        fck       encoder@4804fc00              ti,omap3-dsi             H    H    @H             !proto phy pll           	         	  4disabled          	  dss_dsi1                            fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	  4disabled          	  dss_rfbi                            fck ick       encoder@48050c00              ti,omap3-venc            H            4okay          	  dss_venc                            fck tv_dac_clk               port       endpoint                                               port       endpoint                                               ssi-controller@48058000           ti,omap3-ssi            ssi         4okay             H    H            !sys gdd         	   G        Xgdd_mpu                      +                        v              ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            H    H            !tx rx           	   C   D      ssi-port@4805b000             ti,omap3-ssi-port            H    H            !tx rx           	   E   F         serial@49042000           ti,omap3-uart            I             	   P        S      Q      R        Xtx rx           uart4           bl       regulator-abb-mpu         
    ti,abb-v1           abb_mpu_iva                       +             H0r   H0h           !base-address int-address                           #                            `   s                     O                     7                                                         pinmux@480025a0            ti,omap3-padconf pinctrl-single          H %   \                     +            %           4            E        Z           x          default              pinmux_hsusb2_2_pins          0     P      R      T     V     X     Z                     isp@480bc000              ti,omap3-isp             H   H            	           	                                        ports                        +             bandgap@48002524             H %$             ti,omap36xx-bandgap                             target-module@480cb000            ti,sysc-omap3630-sr ti,sysc         smartreflex_core             H8           !sysc            +           8                     	         fck                      +               H       smartreflex@0             ti,omap3-smartreflex-core                           	            target-module@480c9000            ti,sysc-omap3630-sr ti,sysc         smartreflex_mpu_iva          H8           !sysc            +           8                     
         fck                      +               H       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva                            	            target-module@50000000            ti,sysc-omap4 ti,sysc            P     P          	  !rev sysc            =                  8                                 fck ick                      +               P               opp-table             operating-points-v2-ti-cpu                           opp50-300000000         2             9 s s s s s s        G            X      opp100-600000000            2    #F         9 O O O O O O        G         opp130-800000000            2    /         9 7 7 7 7 7 7        G         opp1g-1000000000            2    ;         9              G            d         opp_supply            ti,omap-opp-supply          o       thermal-zones      cpu_thermal                                    N                  trips      cpu_alert            8                   passive                 cpu_crit             _                	   critical             cooling-maps       map0                                       memory@80000000          memory                        oscillator                        fixed-clock         b                 leds          
    gpio-leds      heartbeat           beagleboard::usr0                          
  heartbeat         mmc         beagleboard::usr1                            mmc0             pwmleds       	    pwm-leds       pmu_stat            beagleboard::pmu_stat                 w5                    sound             ti,omap-twl4030         ,omap3beagle         5        gpio_keys         
    gpio-keys      user            user                             >           I         hsusb2_power_reg              regulator-fixed         hsusb2_vbus          2Z         2Z        W                 \ p                hsusb2_phy            usb-nop-xceiv           m                y          X                     encoder0          
    ti,tfp410                      ports                        +       port@0                  endpoint                                 port@1                 endpoint                                       connector0            dvi-connector           dvi                       port       endpoint                                    connector1            svideo-connector            tv     port       endpoint                                    etb@5401b000          "    arm,coresight-etb10 arm,primecell            T                k      	   apb_pclk       in-ports       port       endpoint                                       etm@54010000          "    arm,coresight-etm3x arm,primecell            T                 k      	   apb_pclk       out-ports      port       endpoint                                          	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 display0 display1 ethernet device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells ti,bit-shift reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,low-power-stop ti,lock ti,low-power-bypass ti,dividers ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended ti,use_poweroff bci3v1-supply io-channels io-channel-names regulator-always-on ti,use-leds ti,pullups ti,pulldowns usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply vqmmc-supply bus-width status #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins multipoint num-eps ram-bits interface-type usb-phy phy-names power vdda-supply remote-endpoint ti,channels data-lines ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device label gpios linux,default-trigger pwms max-brightness ti,model ti,mcbsp linux,code wakeup-source gpio startup-delay-us reset-gpios vcc-supply powerdown-gpios digital ddc-i2c-bus 