  '   8  \   (            	  $                             D    compulab,omap3-sbc-t3517 compulab,omap3-cm-t3517 ti,am3517 ti,omap3                                  +         !   7CompuLab SBC-T3517 with CM-T3517       chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@4809e000            {/ocp@68000000/can@5c050000           /dvi-connector           /svideo-connector         cpus                         +       cpu@0             arm,cortex-a8            cpu                                   cpu                                pmu@54000000              arm,cortex-a8-pmu            T                           debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             mpu       iva       
    ti,iva2.2            iva       	   disabled       dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h                  	   
                     +                      l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +                H         scm@2000              ti,omap3-scm simple-bus                                       +                           pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +                                            .           L          idefault         w         pinmux_uart3_pins             n     p                     pinmux_mmc1_pins          0                                           pinmux_green_led_pins                                 pinmux_dss_dpi_pins_common                                                                                                                                                                                     pinmux_dss_dpi_pins_cm_t35x       0                                                             pinmux_ads7846_pins                               pinmux_mcspi1_pins                                               pinmux_i2c1_pins                                     pinmux_mcbsp2_pins                                                 pinmux_hsusb1_phy_reset_pins              H                    pinmux_hsusb2_phy_reset_pins              J                    pinmux_otg_drv_vbus                              pinmux_mmc2_pins          0    (    *    ,    .    0    2                   pinmux_wl12xx_core_pins                 F                   pinmux_usb_hub_pins           T                    pinmux_smsc2_pins                                        pinmux_tfp410_pins                                 pinmux_i2c3_pins                                     pinmux_sb_t35_audio_amp                               pinmux_mmc1_aux_pins                   D                   pinmux_sb_t35_usb_hub_pins                                   scm_conf@270              syscon simple-bus              p  0                     +                  p  0              pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap                                pbias_mmc_omap2430          pbias_mmc_omap2430           w@         -                    clocks                       +       mcbsp5_mux_fck@68                         ti,composite-mux-clock                                        h           
      mcbsp5_fck                        ti,composite-clock              	   
                 mcbsp1_mux_fck@4                          ti,composite-mux-clock                                                         mcbsp1_fck                        ti,composite-clock                                  mcbsp2_mux_fck@4                          ti,composite-mux-clock                                                         mcbsp2_fck                        ti,composite-clock                                  mcbsp3_mux_fck@68                         ti,composite-mux-clock                             h                 mcbsp3_fck                        ti,composite-clock                                  mcbsp4_mux_fck@68                         ti,composite-mux-clock                                        h                 mcbsp4_fck                        ti,composite-clock                                  emac_ick@32c                          ti,am35xx-gate-clock                           ,                      z      emac_fck@32c                          ti,gate-clock                          ,           	                 vpfe_ick@32c                          ti,am35xx-gate-clock                           ,                      {      vpfe_fck@32c                          ti,gate-clock                          ,           
      hsotgusb_ick_am35xx@32c                       ti,am35xx-gate-clock                           ,                       |      hsotgusb_fck_am35xx@32c                       ti,gate-clock                          ,                      }      hecc_ck@32c                       ti,am35xx-gate-clock                           ,                      ~            clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +                                            .           L     pinmux_wl12xx_wkup_pins                                               prm@48306000              ti,omap3-prm             H0`   @                clocks                       +       virt_16_8m_ck                         fixed-clock          Y                  osc_sys_ck@d40                        ti,mux-clock                                          @                 sys_ck@1270                       ti,divider-clock                                                 p                          sys_clkout1@d70                       ti,gate-clock                          p                 dpll3_x2_ck                       fixed-factor-clock                      /           :         dpll3_m2x2_ck                         fixed-factor-clock                       /           :              "      dpll4_x2_ck                       fixed-factor-clock              !        /           :         corex2_fck                        fixed-factor-clock              "        /           :              #      wkup_l4_ick                       fixed-factor-clock                      /           :              R      corex2_d3_fck                         fixed-factor-clock              #        /           :              s      corex2_d5_fck                         fixed-factor-clock              #        /           :              t         clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk                        fixed-clock                   omap_32k_fck                          fixed-clock                       D      virt_12m_ck                       fixed-clock                            virt_13m_ck                       fixed-clock          ]@                 virt_19200000_ck                          fixed-clock         $                  virt_26000000_ck                          fixed-clock                          virt_38_4m_ck                         fixed-clock         I                  dpll4_ck@d00                          ti,omap3-dpll-per-clock                                 D  0           !      dpll4_m2_ck@d48                       ti,divider-clock                !           ?           H                    $      dpll4_m2x2_mul_ck                         fixed-factor-clock              $        /           :              %      dpll4_m2x2_ck@d00                         ti,gate-clock               %                                D           &      omap_96m_alwon_fck                        fixed-factor-clock              &        /           :              -      dpll3_ck@d00                          ti,omap3-dpll-core-clock                                    @  0                 dpll3_m3_ck@1140                          ti,divider-clock                                                 @                    '      dpll3_m3x2_mul_ck                         fixed-factor-clock              '        /           :              (      dpll3_m3x2_ck@d00                         ti,gate-clock               (                                D           )      emu_core_alwon_ck                         fixed-factor-clock              )        /           :              f      sys_altclk                        fixed-clock                        2      mcbsp_clks                        fixed-clock                              dpll3_m2_ck@d40                       ti,divider-clock                                                 @                           core_ck                       fixed-factor-clock                       /           :              *      dpll1_fck@940                         ti,divider-clock                *                                 	@                    +      dpll1_ck@904                          ti,omap3-dpll-clock                +           	  	$  	@  	4                 dpll1_x2_ck                       fixed-factor-clock                      /           :              ,      dpll1_x2m2_ck@944                         ti,divider-clock                ,                      	D                    @      cm_96m_fck                        fixed-factor-clock              -        /           :              .      omap_96m_fck@d40                          ti,mux-clock                .                         @           I      dpll4_m3_ck@e40                       ti,divider-clock                !                                  @                    /      dpll4_m3x2_mul_ck                         fixed-factor-clock              /        /           :              0      dpll4_m3x2_ck@d00                         ti,gate-clock               0                                D           1      omap_54m_fck@d40                          ti,mux-clock                1   2                      @           <      cm_96m_d2_fck                         fixed-factor-clock              .        /           :              3      omap_48m_fck@d40                          ti,mux-clock                3   2                      @           4      omap_12m_fck                          fixed-factor-clock              4        /           :              K      dpll4_m4_ck@e40                       ti,divider-clock                !                      @                    5      dpll4_m4x2_mul_ck                         ti,fixed-factor-clock               5        Z           h            u           6      dpll4_m4x2_ck@d00                         ti,gate-clock               6                                D         u           x      dpll4_m5_ck@f40                       ti,divider-clock                !           ?           @                    7      dpll4_m5x2_mul_ck                         ti,fixed-factor-clock               7        Z           h            u           8      dpll4_m5x2_ck@d00                         ti,gate-clock               8                                D         u      dpll4_m6_ck@1140                          ti,divider-clock                !                      ?           @                    9      dpll4_m6x2_mul_ck                         fixed-factor-clock              9        /           :              :      dpll4_m6x2_ck@d00                         ti,gate-clock               :                                D           ;      emu_per_alwon_ck                          fixed-factor-clock              ;        /           :              g      clkout2_src_gate_ck@d70                        ti,composite-no-wait-gate-clock             *                      p           =      clkout2_src_mux_ck@d70                        ti,composite-mux-clock              *      .   <           p           >      clkout2_src_ck                        ti,composite-clock              =   >           ?      sys_clkout2@d70                       ti,divider-clock                ?                      @           p               mpu_ck                        fixed-factor-clock              @        /           :              A      arm_fck@924                       ti,divider-clock                A           	$                 emu_mpu_alwon_ck                          fixed-factor-clock              A        /           :              h      l3_ick@a40                        ti,divider-clock                *                      
@                    B      l4_ick@a40                        ti,divider-clock                B                                 
@                    C      rm_ick@c40                        ti,divider-clock                C                                 @               gpt10_gate_fck@a00                        ti,composite-gate-clock                                   
            E      gpt10_mux_fck@a40                         ti,composite-mux-clock              D                         
@           F      gpt10_fck                         ti,composite-clock              E   F      gpt11_gate_fck@a00                        ti,composite-gate-clock                                   
            G      gpt11_mux_fck@a40                         ti,composite-mux-clock              D                         
@           H      gpt11_fck                         ti,composite-clock              G   H      core_96m_fck                          fixed-factor-clock              I        /           :                    mmchs2_fck@a00                        ti,wait-gate-clock                         
                             mmchs1_fck@a00                        ti,wait-gate-clock                         
                             i2c3_fck@a00                          ti,wait-gate-clock                         
                             i2c2_fck@a00                          ti,wait-gate-clock                         
                             i2c1_fck@a00                          ti,wait-gate-clock                         
                             mcbsp5_gate_fck@a00                       ti,composite-gate-clock                        
           
            	      mcbsp1_gate_fck@a00                       ti,composite-gate-clock                        	           
                  core_48m_fck                          fixed-factor-clock              4        /           :              J      mcspi4_fck@a00                        ti,wait-gate-clock              J           
                             mcspi3_fck@a00                        ti,wait-gate-clock              J           
                             mcspi2_fck@a00                        ti,wait-gate-clock              J           
                             mcspi1_fck@a00                        ti,wait-gate-clock              J           
                             uart2_fck@a00                         ti,wait-gate-clock              J           
                             uart1_fck@a00                         ti,wait-gate-clock              J           
                             core_12m_fck                          fixed-factor-clock              K        /           :              L      hdq_fck@a00                       ti,wait-gate-clock              L           
                             core_l3_ick                       fixed-factor-clock              B        /           :              M      sdrc_ick@a10                          ti,wait-gate-clock              M           
                      y      gpmc_fck                          fixed-factor-clock              M        /           :         core_l4_ick                       fixed-factor-clock              C        /           :              N      mmchs2_ick@a10                        ti,omap3-interface-clock                N           
                            mmchs1_ick@a10                        ti,omap3-interface-clock                N           
                            hdq_ick@a10                       ti,omap3-interface-clock                N           
                            mcspi4_ick@a10                        ti,omap3-interface-clock                N           
                            mcspi3_ick@a10                        ti,omap3-interface-clock                N           
                            mcspi2_ick@a10                        ti,omap3-interface-clock                N           
                            mcspi1_ick@a10                        ti,omap3-interface-clock                N           
                            i2c3_ick@a10                          ti,omap3-interface-clock                N           
                            i2c2_ick@a10                          ti,omap3-interface-clock                N           
                            i2c1_ick@a10                          ti,omap3-interface-clock                N           
                            uart2_ick@a10                         ti,omap3-interface-clock                N           
                            uart1_ick@a10                         ti,omap3-interface-clock                N           
                            gpt11_ick@a10                         ti,omap3-interface-clock                N           
                            gpt10_ick@a10                         ti,omap3-interface-clock                N           
                            mcbsp5_ick@a10                        ti,omap3-interface-clock                N           
           
                 mcbsp1_ick@a10                        ti,omap3-interface-clock                N           
           	                 omapctrl_ick@a10                          ti,omap3-interface-clock                N           
                            dss_tv_fck@e00                        ti,gate-clock               <                                        dss_96m_fck@e00                       ti,gate-clock               I                                        dss2_alwon_fck@e00                        ti,gate-clock                                                       dummy_ck                          fixed-clock                   gpt1_gate_fck@c00                         ti,composite-gate-clock                                                O      gpt1_mux_fck@c40                          ti,composite-mux-clock              D              @           P      gpt1_fck                          ti,composite-clock              O   P                 aes2_ick@a10                          ti,omap3-interface-clock                N                      
                 wkup_32k_fck                          fixed-factor-clock              D        /           :              Q      gpio1_dbck@c00                        ti,gate-clock               Q                                        sha12_ick@a10                         ti,omap3-interface-clock                N           
                            wdt2_fck@c00                          ti,wait-gate-clock              Q                                        wdt2_ick@c10                          ti,omap3-interface-clock                R                                       wdt1_ick@c10                          ti,omap3-interface-clock                R                                       gpio1_ick@c10                         ti,omap3-interface-clock                R                                       omap_32ksync_ick@c10                          ti,omap3-interface-clock                R                                       gpt12_ick@c10                         ti,omap3-interface-clock                R                                       gpt1_ick@c10                          ti,omap3-interface-clock                R                                        per_96m_fck                       fixed-factor-clock              -        /           :                    per_48m_fck                       fixed-factor-clock              4        /           :              S      uart3_fck@1000                        ti,wait-gate-clock              S                                        gpt2_gate_fck@1000                        ti,composite-gate-clock                                               T      gpt2_mux_fck@1040                         ti,composite-mux-clock              D              @           U      gpt2_fck                          ti,composite-clock              T   U                 gpt3_gate_fck@1000                        ti,composite-gate-clock                                               V      gpt3_mux_fck@1040                         ti,composite-mux-clock              D                         @           W      gpt3_fck                          ti,composite-clock              V   W      gpt4_gate_fck@1000                        ti,composite-gate-clock                                               X      gpt4_mux_fck@1040                         ti,composite-mux-clock              D                         @           Y      gpt4_fck                          ti,composite-clock              X   Y      gpt5_gate_fck@1000                        ti,composite-gate-clock                                               Z      gpt5_mux_fck@1040                         ti,composite-mux-clock              D                         @           [      gpt5_fck                          ti,composite-clock              Z   [      gpt6_gate_fck@1000                        ti,composite-gate-clock                                               \      gpt6_mux_fck@1040                         ti,composite-mux-clock              D                         @           ]      gpt6_fck                          ti,composite-clock              \   ]      gpt7_gate_fck@1000                        ti,composite-gate-clock                                               ^      gpt7_mux_fck@1040                         ti,composite-mux-clock              D                         @           _      gpt7_fck                          ti,composite-clock              ^   _      gpt8_gate_fck@1000                        ti,composite-gate-clock                        	                       `      gpt8_mux_fck@1040                         ti,composite-mux-clock              D                         @           a      gpt8_fck                          ti,composite-clock              `   a      gpt9_gate_fck@1000                        ti,composite-gate-clock                        
                       b      gpt9_mux_fck@1040                         ti,composite-mux-clock              D                         @           c      gpt9_fck                          ti,composite-clock              b   c      per_32k_alwon_fck                         fixed-factor-clock              D        /           :              d      gpio6_dbck@1000                       ti,gate-clock               d                                        gpio5_dbck@1000                       ti,gate-clock               d                                        gpio4_dbck@1000                       ti,gate-clock               d                                        gpio3_dbck@1000                       ti,gate-clock               d                                        gpio2_dbck@1000                       ti,gate-clock               d                                        wdt3_fck@1000                         ti,wait-gate-clock              d                                        per_l4_ick                        fixed-factor-clock              C        /           :              e      gpio6_ick@1010                        ti,omap3-interface-clock                e                                       gpio5_ick@1010                        ti,omap3-interface-clock                e                                       gpio4_ick@1010                        ti,omap3-interface-clock                e                                       gpio3_ick@1010                        ti,omap3-interface-clock                e                                       gpio2_ick@1010                        ti,omap3-interface-clock                e                                       wdt3_ick@1010                         ti,omap3-interface-clock                e                                       uart3_ick@1010                        ti,omap3-interface-clock                e                                       uart4_ick@1010                        ti,omap3-interface-clock                e                                       gpt9_ick@1010                         ti,omap3-interface-clock                e                      
                 gpt8_ick@1010                         ti,omap3-interface-clock                e                      	                 gpt7_ick@1010                         ti,omap3-interface-clock                e                                       gpt6_ick@1010                         ti,omap3-interface-clock                e                                       gpt5_ick@1010                         ti,omap3-interface-clock                e                                       gpt4_ick@1010                         ti,omap3-interface-clock                e                                       gpt3_ick@1010                         ti,omap3-interface-clock                e                                       gpt2_ick@1010                         ti,omap3-interface-clock                e                                       mcbsp2_ick@1010                       ti,omap3-interface-clock                e                                        mcbsp3_ick@1010                       ti,omap3-interface-clock                e                                       mcbsp4_ick@1010                       ti,omap3-interface-clock                e                                       mcbsp2_gate_fck@1000                          ti,composite-gate-clock                                                      mcbsp3_gate_fck@1000                          ti,composite-gate-clock                                                     mcbsp4_gate_fck@1000                          ti,composite-gate-clock                                                     emu_src_mux_ck@1140                       ti,mux-clock                   f   g   h           @           i      emu_src_ck                        ti,clkdm-gate-clock             i           j      pclk_fck@1140                         ti,divider-clock                j                                 @               pclkx2_fck@1140                       ti,divider-clock                j                                 @               atclk_fck@1140                        ti,divider-clock                j                                 @               traceclk_src_fck@1140                         ti,mux-clock                   f   g   h                      @           k      traceclk_fck@1140                         ti,divider-clock                k                                 @               secure_32k_fck                        fixed-clock                       l      gpt12_fck                         fixed-factor-clock              l        /           :                    wdt1_fck                          fixed-factor-clock              l        /           :         ipss_ick@a10                          ti,am35xx-interface-clock               M           
                            rmii_ck                       fixed-clock                          pclk_ck                       fixed-clock                          uart4_ick_am35xx@a10                          ti,omap3-interface-clock                N           
                 uart4_fck_am35xx@a00                          ti,wait-gate-clock              J           
                  dpll5_ck@d04                          ti,omap3-dpll-clock                             $  L  4                             m      dpll5_m2_ck@d50                       ti,divider-clock                m                      P                    w      sgx_gate_fck@b00                          ti,composite-gate-clock             *                                  u      core_d3_ck                        fixed-factor-clock              *        /           :              n      core_d4_ck                        fixed-factor-clock              *        /           :              o      core_d6_ck                        fixed-factor-clock              *        /           :              p      omap_192m_alwon_fck                       fixed-factor-clock              &        /           :              q      core_d2_ck                        fixed-factor-clock              *        /           :              r      sgx_mux_fck@b40                       ti,composite-mux-clock               n   o   p   .   q   r   s   t           @           v      sgx_fck                       ti,composite-clock              u   v                 sgx_ick@b10                       ti,wait-gate-clock              B                                        cpefuse_fck@a08                       ti,gate-clock                          
                             ts_fck@a08                        ti,gate-clock               D           
                            usbtll_fck@a08                        ti,wait-gate-clock              w           
                            usbtll_ick@a18                        ti,omap3-interface-clock                N           
                            mmchs3_ick@a10                        ti,omap3-interface-clock                N           
                            mmchs3_fck@a00                        ti,wait-gate-clock                         
                             dss1_alwon_fck_3430es2@e00                        ti,dss-gate-clock               x                                 u                 dss_ick_3430es2@e10                       ti,omap3-dss-interface-clock                C                                        usbhost_120m_fck@1400                         ti,gate-clock               w                                        usbhost_48m_fck@1400                          ti,dss-gate-clock               4                                         usbhost_ick@1410                          ti,omap3-dss-interface-clock                C                                           clockdomains       core_l3_clkdm             ti,clockdomain              y      z   {   |   }   ~      dpll3_clkdm           ti,clockdomain                    dpll1_clkdm           ti,clockdomain                    per_clkdm             ti,clockdomain        h                                                                                       emu_clkdm             ti,clockdomain              j      dpll4_clkdm           ti,clockdomain              !      wkup_clkdm            ti,clockdomain                                          dss_clkdm             ti,clockdomain                                core_l4_clkdm             ti,clockdomain                                                                                                                                dpll5_clkdm           ti,clockdomain              m      sgx_clkdm             ti,clockdomain                    usbhost_clkdm             ti,clockdomain                                target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  rev sysc                               Q            fck ick                      +                H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc                                H                       target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           rev sysc syss             #                                                           M         ick                      +                H`       dma-controller@0              ti,omap3430-sdma ti,omap-sdma                                                                          `                    gpio@48310000             ti,omap3-gpio            H1                          gpio1                     /        ?                                        gpio@49050000             ti,omap3-gpio            I                          gpio2            /        ?                                        gpio@49052000             ti,omap3-gpio            I                          gpio3            /        ?                                        gpio@49054000             ti,omap3-gpio            I@                          gpio4            /        ?                             gpio@49056000             ti,omap3-gpio            I`                !         gpio5            /        ?                                        gpio@49058000             ti,omap3-gpio            I                "         gpio6            /        ?                                        serial@4806a000           ti,omap3-uart            H             K      H        _      1      2        dtx rx            uart1           l       serial@4806c000           ti,omap3-uart            H            K      I        _      3      4        dtx rx            uart2           l       serial@49020000           ti,omap3-uart            I             K      J        _      5      6        dtx rx            uart3           l         idefault         w         i2c@48070000              ti,omap3-i2c             H                 8        _                    dtx rx                        +             i2c1            idefault         w               at24@50           atmel,24c02         n               P         i2c@48072000              ti,omap3-i2c             H                 9        _                    dtx rx                        +             i2c2          i2c@48060000              ti,omap3-i2c             H                 =        _                    dtx rx                        +             i2c3                     idefault         w      at24@50           atmel,24c02         n               P         mailbox@48094000              ti,omap3-mailbox             mailbox          H	@                        w                               	   disabled       dsp                                                 spi@48098000              ti,omap2-mcspi           H	                A                     +             mcspi1                   @  _      #      $      %      &      '      (      )      *         dtx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3         idefault         w      ads7846@0           idefault         w             ti,ads7846                                   `                                                                                                             )           9           I 
          Y            i         spi@4809a000              ti,omap2-mcspi           H	                B                     +             mcspi2                      _      +      ,      -      .        dtx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           H                [                     +             mcspi3                      _                                dtx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           H                0                     +             mcspi4                     _      F      G        dtx0 rx0       1w@480b2000           ti,omap3-1w          H                 :         hdq1w         mmc@4809c000              ti,omap3-hsmmc           H	                S         mmc1             w        _      =      >        dtx rx                      idefault         w                                                                      mmc@480b4000              ti,omap3-hsmmc           H@                V         mmc2            _      /      0        dtx rx           idefault         w                                                                           +       wlcore@2          
    ti,wl1271                                                  I          mmc@480ad000              ti,omap3-hsmmc           H
                ^         mmc3            _      M      N        dtx rx         	   disabled          mmu@480bd400                          ti,omap2-iommu           H                         mmu_isp                  	   disabled          mmu@5d000000                          ti,omap2-iommu           ]                           mmu_iva       	   disabled          wdt@48314000              ti,omap3-wdt             H1@          
   wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@            mpu                ;   <        common tx rx            (            mcbsp1          _                     dtx rx                        fck       	   disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           rev sysc syss                                                 ick                      +                H
            	   disabled       rng@0             ti,omap2-rng                                 4         mcbsp@49022000            ti,omap3-mcbsp           I     I            mpu sidetone                   >   ?           common tx rx sidetone           (            mcbsp2 mcbsp2_sidetone          _      !      "        dtx rx                           fck ick          okay            idefault         w         mcbsp@49024000            ti,omap3-mcbsp           I@    I            mpu sidetone                   Y   Z           common tx rx sidetone           (            mcbsp3 mcbsp3_sidetone          _                    dtx rx                           fck ick       	   disabled          mcbsp@49026000            ti,omap3-mcbsp           I`            mpu                6   7        common tx rx            (            mcbsp4          _                    dtx rx                        fck         7          	   disabled          mcbsp@48096000            ti,omap3-mcbsp           H	`            mpu                Q   R        common tx rx            (            mcbsp5          _                    dtx rx                        fck       	   disabled          sham@480c3000             ti,omap3-sham            sham             H0    d            1        _      E        drx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1    H1   H1           rev sysc syss             '                                                     fck ick                      +                H1             H         \   timer@0           ti,omap3430-timer                                        fck             %         g        v                       target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            rev sysc syss             '                                                     fck ick                      +                I              H         \   timer@0           ti,omap3430-timer                               &        v                       timer@49034000            ti,omap3430-timer            I@                '         timer3        timer@49036000            ti,omap3430-timer            I`                (         timer4        timer@49038000            ti,omap3430-timer            I                )         timer5                 timer@4903a000            ti,omap3430-timer            I                *         timer6                 timer@4903c000            ti,omap3430-timer            I                +         timer7                 timer@4903e000            ti,omap3430-timer            I                ,         timer8                          timer@49040000            ti,omap3430-timer            I                 -         timer9                 timer@48086000            ti,omap3430-timer            H`                .         timer10                timer@48088000            ti,omap3430-timer            H                /         timer11                target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           rev sysc syss             '                                                     fck ick                      +                H0@       timer@0           ti,omap3430-timer                               _         g                  usbhstll@48062000             ti,usbhs-tll             H                 N         usb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@             usb_host_hs                      +                   	  ehci-phy          	  ehci-phy       ohci@48064400             ti,ohci-omap3            HD                L               ehci@48064800             ti,ehci-omap             HH                M                       gpmc@6e000000             ti,omap3430-gpmc             gpmc             n                         _              drxtx                                               +                                /        ?                    -                                   nand@0,0              ti,omap2-nand                                                                              '           9sw          I            W   x        i   x        {               x           x                      Z                      Z                      H           <        -   x        >   x        O           a   Z                     +      partition@0         yxloader                       partition@80000         yuboot                        partition@260000            yuboot environment             &           partition@2a0000            ylinux             *   @        partition@6a0000            yrootfs            j             ethernet@4,0              smsc,lan9221 smsc,lan9115           idefault         w                                                                    '                                 I           W           i           {                          (           -                      -                   -           >              x                      K           K                                a            O                                  "            /         usb_otg_hs@480ab000           ti,omap3-musb            H
                \   ]        mc dma           usb_otg_hs          E           P           X         	   disabled          dss@48050000              ti,omap3-dss             H              okay          	   dss_core                         fck                      +                     idefault         w         dispc@48050400            ti,omap3-dispc           H                      
   dss_dispc                        fck       encoder@4804fc00              ti,omap3-dsi             H    H    @H             proto phy pll                     	   disabled          	   dss_dsi1                            fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	   disabled          	   dss_rfbi                            fck ick       encoder@48050c00              ti,omap3-venc            H             okay          	   dss_venc                         fck    port       endpoint            a           q                          port       endpoint            a           }                         ssi-controller@48058000           ti,omap3-ssi             ssi       	   disabled             H    H            sys gdd             G        gdd_mpu                      +                ssi-port@4805a000             ti,omap3-ssi-port            H    H            tx rx               C   D      ssi-port@4805b000             ti,omap3-ssi-port            H    H            tx rx               E   F         am35x_otg_hs@5c040000             ti,omap3-musb            am35x_otg_hs             okay             \                 G        mc          idefault         w         ethernet@5c000000             ti,am3517-emac           davinci_emac             okay             \                  C   D   E   F                                                                            		                    z         ick       mdio@5c030000             ti,davinci_mdio          davinci_mdio             okay             \             	 B@                     +                         fck       serial@4809e000           ti,omap3-uart            uart4         	   disabled             H	                T        _      7      6        dtx rx           l       pinmux@480025d8            ti,omap3-padconf pinctrl-single          H %   $                     +                                            .           L        can@5c050000              ti,am3517-hecc        	   disabled             \     \0   \             hecc hecc-ram mbx                           ~      target-module@50000000            ti,sysc-omap2 ti,sysc            P             rev                         fck ick                      +                P     @          opp-table             operating-points-v2-ti-cpu                           opp50-300000000         	$             	+ O        	9         	J      opp100-600000000            	$    #F         	+ O        	9         memory@80000000          memory                       leds          
    gpio-leds           idefault         w      ledb            ycm-t3x:green                            
  	Vheartbeat            hsusb1_power_reg              regulator-fixed         hsusb1_vbus          2Z         2Z        	l p                 hsusb2_power_reg              regulator-fixed         hsusb2_vbus          2Z         2Z        	l p                 hsusb1_phy            usb-nop-xceiv                      	}            idefault         w           	                          hsusb2_phy            usb-nop-xceiv                      	}            idefault         w           	                          ads7846-reg           regulator-fixed         ads7846-reg          2Z         2Z                 svideo-connector              svideo-connector            ytv     port       endpoint            a                          regulator-vmmc            regulator-fixed         vmmc             2Z         2Z                 wl12xx_vmmc2              regulator-fixed         vw1271          idefault         w               w@         w@                          	l  N          	                 wl12xx_vaux2              regulator-fixed         vwl1271_vaux2            w@         w@                 encoder       
    ti,tfp410           	                 idefault         w      ports                        +       port@0                  endpoint            a                      port@1                 endpoint            a                           dvi-connector             dvi-connector           ydvi    port       endpoint            a                        audio_amp             regulator-fixed       
  audio_amp           idefault         w                            	      regulator-vddvario-sb-t35             regulator-fixed       	  vddvario             	                 regulator-vdd33a-sb-t35           regulator-fixed         vdd33a           	                    	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 can display0 display1 device_type reg clocks clock-names clock-latency operating-points-v2 interrupts ti,hwmods status ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins phandle syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells ti,bit-shift clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,low-power-stop ti,lock reg-names ti,sysc-sidle ti,sysc-mask ti,sysc-midle ti,syss-mask #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended dmas dma-names pagesize #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs vcc-supply spi-max-frequency pendown-gpio ti,x-min ti,x-max ti,y-min ti,y-max ti,x-plate-ohms ti,pressure-max ti,debounce-max ti,debounce-tol ti,debounce-rep wakeup-source ti,dual-volt pbias-supply bus-width vmmc-supply wp-gpios cd-gpios vqmmc-supply non-removable cap-power-off-card ref-clock-frequency #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port1-mode port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,page-burst-access-ns gpmc,access-ns gpmc,cycle2cycle-delay-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns label bank-width gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen gpmc,bus-turnaround-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address multipoint num-eps ram-bits remote-endpoint ti,channels data-lines ti,davinci-ctrl-reg-offset ti,davinci-ctrl-mod-reg-offset ti,davinci-ctrl-ram-offset ti,davinci-ctrl-ram-size ti,davinci-rmii-en local-mac-address bus_freq opp-hz opp-microvolt opp-supported-hw opp-suspend linux,default-trigger startup-delay-us #phy-cells reset-gpios enable-active-high powerdown-gpios regulator-always-on 