    8    (            
                              R    compulab,omap3-sbc-t3530 compulab,omap3-cm-t3530 ti,omap3430 ti,omap34xx ti,omap3                                    +         !   7CompuLab SBC-T3530 with CM-T3530       chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/dvi-connector           |/svideo-connector         cpus                         +       cpu@0             arm,cortex-a8            cpu                                   cpu                                                                   pmu@54000000              arm,cortex-a8-pmu            T                           debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             mpu       iva       
    ti,iva2.2            iva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h                  	   
                     +                     l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus                                       +                          pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +            	                       )        >           \          ydefault               pinmux_uart3_pins             n     p                      pinmux_mmc1_pins          0                                            pinmux_green_led_pins                                 pinmux_dss_dpi_pins_common                                                                                                                                                                                     pinmux_dss_dpi_pins_cm_t35x       0                                                             pinmux_ads7846_pins                                pinmux_mcspi1_pins                                                pinmux_i2c1_pins                                      pinmux_mcbsp2_pins                                                  pinmux_smsc1_pins                    j                   pinmux_hsusb0_pins        `    r      t      v    x    z    |    ~                                       pinmux_twl4030_pins             A                  pinmux_mmc2_pins          P    (    *    ,    .    0    2    4     6     8     :                    pinmux_smsc2_pins                                  
      pinmux_tfp410_pins                           !      pinmux_i2c3_pins                                      pinmux_sb_t35_audio_amp                          %      pinmux_sb_t35_usb_hub_pins                                     scm_conf@270              syscon simple-bus              p  0                     +                 p  0               pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap                                pbias_mmc_omap2430          pbias_mmc_omap2430           w@         -                     clocks                       +       mcbsp5_mux_fck@68                         ti,composite-mux-clock                                        h            
      mcbsp5_fck                        ti,composite-clock              	   
                  mcbsp1_mux_fck@4                          ti,composite-mux-clock                                                          mcbsp1_fck                        ti,composite-clock                                   mcbsp2_mux_fck@4                          ti,composite-mux-clock                                                          mcbsp2_fck                        ti,composite-clock                                   mcbsp3_mux_fck@68                         ti,composite-mux-clock                             h                  mcbsp3_fck                        ti,composite-clock                                   mcbsp4_mux_fck@68                         ti,composite-mux-clock                                        h                  mcbsp4_fck                        ti,composite-clock                                         clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +            	                       )        >           \     pinmux_twl4030_vpins                                                                   target-module@480a6000            ti,sysc-omap2 ti,sysc            H
`D   H
`H   H
`L           rev sysc syss                                        *                        ick                      +               H
`        aes1@0            ti,omap3-aes                    P                     7      	      
        <tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            HPD   HPH   HPL           rev sysc syss                                        *                        ick                      +               HP        aes2@0            ti,omap3-aes                    P                     7      A      B        <tx rx            prm@48306000              ti,omap3-prm             H0`   @                clocks                       +       virt_16_8m_ck                         fixed-clock         F Y                   osc_sys_ck@d40                        ti,mux-clock                                          @                  sys_ck@1270                       ti,divider-clock                                   V              p         a            "      sys_clkout1@d70                       ti,gate-clock                          p                 dpll3_x2_ck                       fixed-factor-clock                      x                    dpll3_m2x2_ck                         fixed-factor-clock                      x                          !      dpll4_x2_ck                       fixed-factor-clock                       x                    corex2_fck                        fixed-factor-clock              !        x                          #      wkup_l4_ick                       fixed-factor-clock              "        x                          R      corex2_d3_fck                         fixed-factor-clock              #        x                                corex2_d5_fck                         fixed-factor-clock              #        x                                   clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk                        fixed-clock         F          omap_32k_fck                          fixed-clock         F               D      virt_12m_ck                       fixed-clock         F                    virt_13m_ck                       fixed-clock         F ]@                  virt_19200000_ck                          fixed-clock         F$                   virt_26000000_ck                          fixed-clock         F                  virt_38_4m_ck                         fixed-clock         FI                   dpll4_ck@d00                          ti,omap3-dpll-per-clock             "   "                 D  0                   dpll4_m2_ck@d48                       ti,divider-clock                         V   ?           H         a            $      dpll4_m2x2_mul_ck                         fixed-factor-clock              $        x                          %      dpll4_m2x2_ck@d00                         ti,gate-clock               %                                            &      omap_96m_alwon_fck                        fixed-factor-clock              &        x                          -      dpll3_ck@d00                          ti,omap3-dpll-core-clock                "   "                 @  0                  dpll3_m3_ck@1140                          ti,divider-clock                                   V              @         a            '      dpll3_m3x2_mul_ck                         fixed-factor-clock              '        x                          (      dpll3_m3x2_ck@d00                         ti,gate-clock               (                                            )      emu_core_alwon_ck                         fixed-factor-clock              )        x                          f      sys_altclk                        fixed-clock         F                2      mcbsp_clks                        fixed-clock         F                      dpll3_m2_ck@d40                       ti,divider-clock                                   V              @         a                  core_ck                       fixed-factor-clock                      x                          *      dpll1_fck@940                         ti,divider-clock                *                   V              	@         a            +      dpll1_ck@904                          ti,omap3-dpll-clock             "   +           	  	$  	@  	4                  dpll1_x2_ck                       fixed-factor-clock                      x                          ,      dpll1_x2m2_ck@944                         ti,divider-clock                ,        V              	D         a            @      cm_96m_fck                        fixed-factor-clock              -        x                          .      omap_96m_fck@d40                          ti,mux-clock                .   "                      @            I      dpll4_m3_ck@e40                       ti,divider-clock                                    V               @         a            /      dpll4_m3x2_mul_ck                         fixed-factor-clock              /        x                          0      dpll4_m3x2_ck@d00                         ti,gate-clock               0                                            1      omap_54m_fck@d40                          ti,mux-clock                1   2                      @            <      cm_96m_d2_fck                         fixed-factor-clock              .        x                          3      omap_48m_fck@d40                          ti,mux-clock                3   2                      @            4      omap_12m_fck                          fixed-factor-clock              4        x                          K      dpll4_m4_ck@e40                       ti,divider-clock                         V              @         a            5      dpll4_m4x2_mul_ck                         ti,fixed-factor-clock               5                                           6      dpll4_m4x2_ck@d00                         ti,gate-clock               6                                                           dpll4_m5_ck@f40                       ti,divider-clock                         V   ?           @         a            7      dpll4_m5x2_mul_ck                         ti,fixed-factor-clock               7                                           8      dpll4_m5x2_ck@d00                         ti,gate-clock               8                                                     n      dpll4_m6_ck@1140                          ti,divider-clock                                    V   ?           @         a            9      dpll4_m6x2_mul_ck                         fixed-factor-clock              9        x                          :      dpll4_m6x2_ck@d00                         ti,gate-clock               :                                            ;      emu_per_alwon_ck                          fixed-factor-clock              ;        x                          g      clkout2_src_gate_ck@d70                        ti,composite-no-wait-gate-clock             *                      p            =      clkout2_src_mux_ck@d70                        ti,composite-mux-clock              *   "   .   <           p            >      clkout2_src_ck                        ti,composite-clock              =   >            ?      sys_clkout2@d70                       ti,divider-clock                ?                   V   @           p               mpu_ck                        fixed-factor-clock              @        x                          A      arm_fck@924                       ti,divider-clock                A           	$        V         emu_mpu_alwon_ck                          fixed-factor-clock              A        x                          h      l3_ick@a40                        ti,divider-clock                *        V              
@         a            B      l4_ick@a40                        ti,divider-clock                B                   V              
@         a            C      rm_ick@c40                        ti,divider-clock                C                   V              @         a      gpt10_gate_fck@a00                        ti,composite-gate-clock             "                      
             E      gpt10_mux_fck@a40                         ti,composite-mux-clock              D   "                      
@            F      gpt10_fck                         ti,composite-clock              E   F      gpt11_gate_fck@a00                        ti,composite-gate-clock             "                      
             G      gpt11_mux_fck@a40                         ti,composite-mux-clock              D   "                      
@            H      gpt11_fck                         ti,composite-clock              G   H      core_96m_fck                          fixed-factor-clock              I        x                                mmchs2_fck@a00                        ti,wait-gate-clock                         
                              mmchs1_fck@a00                        ti,wait-gate-clock                         
                              i2c3_fck@a00                          ti,wait-gate-clock                         
                              i2c2_fck@a00                          ti,wait-gate-clock                         
                              i2c1_fck@a00                          ti,wait-gate-clock                         
                              mcbsp5_gate_fck@a00                       ti,composite-gate-clock                        
           
             	      mcbsp1_gate_fck@a00                       ti,composite-gate-clock                        	           
                   core_48m_fck                          fixed-factor-clock              4        x                          J      mcspi4_fck@a00                        ti,wait-gate-clock              J           
                              mcspi3_fck@a00                        ti,wait-gate-clock              J           
                              mcspi2_fck@a00                        ti,wait-gate-clock              J           
                              mcspi1_fck@a00                        ti,wait-gate-clock              J           
                              uart2_fck@a00                         ti,wait-gate-clock              J           
                              uart1_fck@a00                         ti,wait-gate-clock              J           
                              core_12m_fck                          fixed-factor-clock              K        x                          L      hdq_fck@a00                       ti,wait-gate-clock              L           
                              core_l3_ick                       fixed-factor-clock              B        x                          M      sdrc_ick@a10                          ti,wait-gate-clock              M           
                             gpmc_fck                          fixed-factor-clock              M        x                    core_l4_ick                       fixed-factor-clock              C        x                          N      mmchs2_ick@a10                        ti,omap3-interface-clock                N           
                             mmchs1_ick@a10                        ti,omap3-interface-clock                N           
                             hdq_ick@a10                       ti,omap3-interface-clock                N           
                             mcspi4_ick@a10                        ti,omap3-interface-clock                N           
                             mcspi3_ick@a10                        ti,omap3-interface-clock                N           
                             mcspi2_ick@a10                        ti,omap3-interface-clock                N           
                             mcspi1_ick@a10                        ti,omap3-interface-clock                N           
                             i2c3_ick@a10                          ti,omap3-interface-clock                N           
                             i2c2_ick@a10                          ti,omap3-interface-clock                N           
                             i2c1_ick@a10                          ti,omap3-interface-clock                N           
                             uart2_ick@a10                         ti,omap3-interface-clock                N           
                             uart1_ick@a10                         ti,omap3-interface-clock                N           
                             gpt11_ick@a10                         ti,omap3-interface-clock                N           
                             gpt10_ick@a10                         ti,omap3-interface-clock                N           
                             mcbsp5_ick@a10                        ti,omap3-interface-clock                N           
           
                  mcbsp1_ick@a10                        ti,omap3-interface-clock                N           
           	                  omapctrl_ick@a10                          ti,omap3-interface-clock                N           
                             dss_tv_fck@e00                        ti,gate-clock               <                                         dss_96m_fck@e00                       ti,gate-clock               I                                         dss2_alwon_fck@e00                        ti,gate-clock               "                                         dummy_ck                          fixed-clock         F          gpt1_gate_fck@c00                         ti,composite-gate-clock             "                                    O      gpt1_mux_fck@c40                          ti,composite-mux-clock              D   "           @            P      gpt1_fck                          ti,composite-clock              O   P                  aes2_ick@a10                          ti,omap3-interface-clock                N                      
                  wkup_32k_fck                          fixed-factor-clock              D        x                          Q      gpio1_dbck@c00                        ti,gate-clock               Q                                         sha12_ick@a10                         ti,omap3-interface-clock                N           
                             wdt2_fck@c00                          ti,wait-gate-clock              Q                                         wdt2_ick@c10                          ti,omap3-interface-clock                R                                        wdt1_ick@c10                          ti,omap3-interface-clock                R                                        gpio1_ick@c10                         ti,omap3-interface-clock                R                                        omap_32ksync_ick@c10                          ti,omap3-interface-clock                R                                        gpt12_ick@c10                         ti,omap3-interface-clock                R                                        gpt1_ick@c10                          ti,omap3-interface-clock                R                                         per_96m_fck                       fixed-factor-clock              -        x                                per_48m_fck                       fixed-factor-clock              4        x                          S      uart3_fck@1000                        ti,wait-gate-clock              S                                         gpt2_gate_fck@1000                        ti,composite-gate-clock             "                                   T      gpt2_mux_fck@1040                         ti,composite-mux-clock              D   "           @            U      gpt2_fck                          ti,composite-clock              T   U                 gpt3_gate_fck@1000                        ti,composite-gate-clock             "                                   V      gpt3_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            W      gpt3_fck                          ti,composite-clock              V   W      gpt4_gate_fck@1000                        ti,composite-gate-clock             "                                   X      gpt4_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            Y      gpt4_fck                          ti,composite-clock              X   Y      gpt5_gate_fck@1000                        ti,composite-gate-clock             "                                   Z      gpt5_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            [      gpt5_fck                          ti,composite-clock              Z   [      gpt6_gate_fck@1000                        ti,composite-gate-clock             "                                   \      gpt6_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            ]      gpt6_fck                          ti,composite-clock              \   ]      gpt7_gate_fck@1000                        ti,composite-gate-clock             "                                   ^      gpt7_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            _      gpt7_fck                          ti,composite-clock              ^   _      gpt8_gate_fck@1000                        ti,composite-gate-clock             "           	                        `      gpt8_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            a      gpt8_fck                          ti,composite-clock              `   a      gpt9_gate_fck@1000                        ti,composite-gate-clock             "           
                        b      gpt9_mux_fck@1040                         ti,composite-mux-clock              D   "                      @            c      gpt9_fck                          ti,composite-clock              b   c      per_32k_alwon_fck                         fixed-factor-clock              D        x                          d      gpio6_dbck@1000                       ti,gate-clock               d                                         gpio5_dbck@1000                       ti,gate-clock               d                                         gpio4_dbck@1000                       ti,gate-clock               d                                         gpio3_dbck@1000                       ti,gate-clock               d                                         gpio2_dbck@1000                       ti,gate-clock               d                                         wdt3_fck@1000                         ti,wait-gate-clock              d                                         per_l4_ick                        fixed-factor-clock              C        x                          e      gpio6_ick@1010                        ti,omap3-interface-clock                e                                        gpio5_ick@1010                        ti,omap3-interface-clock                e                                        gpio4_ick@1010                        ti,omap3-interface-clock                e                                        gpio3_ick@1010                        ti,omap3-interface-clock                e                                        gpio2_ick@1010                        ti,omap3-interface-clock                e                                        wdt3_ick@1010                         ti,omap3-interface-clock                e                                        uart3_ick@1010                        ti,omap3-interface-clock                e                                        uart4_ick@1010                        ti,omap3-interface-clock                e                                        gpt9_ick@1010                         ti,omap3-interface-clock                e                      
                  gpt8_ick@1010                         ti,omap3-interface-clock                e                      	                  gpt7_ick@1010                         ti,omap3-interface-clock                e                                        gpt6_ick@1010                         ti,omap3-interface-clock                e                                        gpt5_ick@1010                         ti,omap3-interface-clock                e                                        gpt4_ick@1010                         ti,omap3-interface-clock                e                                        gpt3_ick@1010                         ti,omap3-interface-clock                e                                        gpt2_ick@1010                         ti,omap3-interface-clock                e                                        mcbsp2_ick@1010                       ti,omap3-interface-clock                e                                         mcbsp3_ick@1010                       ti,omap3-interface-clock                e                                        mcbsp4_ick@1010                       ti,omap3-interface-clock                e                                        mcbsp2_gate_fck@1000                          ti,composite-gate-clock                                                       mcbsp3_gate_fck@1000                          ti,composite-gate-clock                                                      mcbsp4_gate_fck@1000                          ti,composite-gate-clock                                                      emu_src_mux_ck@1140                       ti,mux-clock                "   f   g   h           @            i      emu_src_ck                        ti,clkdm-gate-clock             i            j      pclk_fck@1140                         ti,divider-clock                j                   V              @         a      pclkx2_fck@1140                       ti,divider-clock                j                   V              @         a      atclk_fck@1140                        ti,divider-clock                j                   V              @         a      traceclk_src_fck@1140                         ti,mux-clock                "   f   g   h                      @            k      traceclk_fck@1140                         ti,divider-clock                k                   V              @         a      secure_32k_fck                        fixed-clock         F               l      gpt12_fck                         fixed-factor-clock              l        x                               wdt1_fck                          fixed-factor-clock              l        x                    security_l4_ick2                          fixed-factor-clock              C        x                          m      aes1_ick@a14                          ti,omap3-interface-clock                m                      
                  rng_ick@a14                       ti,omap3-interface-clock                m           
                             sha11_ick@a14                         ti,omap3-interface-clock                m           
                 des1_ick@a14                          ti,omap3-interface-clock                m           
                  cam_mclk@f00                          ti,gate-clock               n                                       cam_ick@f10                   !    ti,omap3-no-wait-interface-clock                C                                         csi2_96m_fck@f00                          ti,gate-clock                                                        security_l3_ick                       fixed-factor-clock              B        x                          o      pka_ick@a14                       ti,omap3-interface-clock                o           
                 icr_ick@a10                       ti,omap3-interface-clock                N           
                 des2_ick@a10                          ti,omap3-interface-clock                N           
                 mspro_ick@a10                         ti,omap3-interface-clock                N           
                 mailboxes_ick@a10                         ti,omap3-interface-clock                N           
                 ssi_l4_ick                        fixed-factor-clock              C        x                          v      sr1_fck@c00                       ti,wait-gate-clock              "                                        sr2_fck@c00                       ti,wait-gate-clock              "                                        sr_l4_ick                         fixed-factor-clock              C        x                    dpll2_fck@40                          ti,divider-clock                *                   V               @         a            p      dpll2_ck@4                        ti,omap3-dpll-clock             "   p               $   @   4                                       q      dpll2_m2_ck@44                        ti,divider-clock                q        V               D         a            r      iva2_ck@0                         ti,wait-gate-clock              r                                           modem_fck@a00                         ti,omap3-interface-clock                "           
                              sad2d_ick@a10                         ti,omap3-interface-clock                B           
                             mad2d_ick@a18                         ti,omap3-interface-clock                B           
                             mspro_fck@a00                         ti,wait-gate-clock                         
                  ssi_ssr_gate_fck_3430es2@a00                           ti,composite-no-wait-gate-clock             #                       
             s      ssi_ssr_div_fck_3430es2@a40                       ti,composite-divider-clock              #                      
@      $                                            t      ssi_ssr_fck_3430es2                       ti,composite-clock              s   t            u      ssi_sst_fck_3430es2                       fixed-factor-clock              u        x                               hsotgusb_ick_3430es2@a10                      "    ti,omap3-hsotgusb-interface-clock               M           
                             ssi_ick_3430es2@a10                       ti,omap3-ssi-interface-clock                v           
                             usim_gate_fck@c00                         ti,composite-gate-clock             I           	                              sys_d2_ck                         fixed-factor-clock              "        x                          x      omap_96m_d2_fck                       fixed-factor-clock              I        x                          y      omap_96m_d4_fck                       fixed-factor-clock              I        x                          z      omap_96m_d8_fck                       fixed-factor-clock              I        x                          {      omap_96m_d10_fck                          fixed-factor-clock              I        x              
            |      dpll5_m2_d4_ck                        fixed-factor-clock              w        x                          }      dpll5_m2_d8_ck                        fixed-factor-clock              w        x                          ~      dpll5_m2_d16_ck                       fixed-factor-clock              w        x                                dpll5_m2_d20_ck                       fixed-factor-clock              w        x                                usim_mux_fck@c40                          ti,composite-mux-clock        (      "   x   y   z   {   |   }   ~                            @         a                  usim_fck                          ti,composite-clock                       usim_ick@c10                          ti,omap3-interface-clock                R                      	                  dpll5_ck@d04                          ti,omap3-dpll-clock             "   "             $  L  4                                    dpll5_m2_ck@d50                       ti,divider-clock                        V              P         a            w      sgx_gate_fck@b00                          ti,composite-gate-clock             *                                         core_d3_ck                        fixed-factor-clock              *        x                                core_d4_ck                        fixed-factor-clock              *        x                                core_d6_ck                        fixed-factor-clock              *        x                                omap_192m_alwon_fck                       fixed-factor-clock              &        x                                core_d2_ck                        fixed-factor-clock              *        x                                sgx_mux_fck@b40                       ti,composite-mux-clock                        .                       @                  sgx_fck                       ti,composite-clock                                  sgx_ick@b10                       ti,wait-gate-clock              B                                         cpefuse_fck@a08                       ti,gate-clock               "           
                              ts_fck@a08                        ti,gate-clock               D           
                             usbtll_fck@a08                        ti,wait-gate-clock              w           
                             usbtll_ick@a18                        ti,omap3-interface-clock                N           
                             mmchs3_ick@a10                        ti,omap3-interface-clock                N           
                             mmchs3_fck@a00                        ti,wait-gate-clock                         
                              dss1_alwon_fck_3430es2@e00                        ti,dss-gate-clock                                                                  dss_ick_3430es2@e10                       ti,omap3-dss-interface-clock                C                                         usbhost_120m_fck@1400                         ti,gate-clock               w                                         usbhost_48m_fck@1400                          ti,dss-gate-clock               4                                          usbhost_ick@1410                          ti,omap3-dss-interface-clock                C                                            clockdomains       core_l3_clkdm             ti,clockdomain                       dpll3_clkdm           ti,clockdomain                    dpll1_clkdm           ti,clockdomain                    per_clkdm             ti,clockdomain        h                                                                                       emu_clkdm             ti,clockdomain              j      dpll4_clkdm           ti,clockdomain                     wkup_clkdm            ti,clockdomain        $                                    dss_clkdm             ti,clockdomain                                core_l4_clkdm             ti,clockdomain                                                                                                                                cam_clkdm             ti,clockdomain                       iva2_clkdm            ti,clockdomain                    dpll2_clkdm           ti,clockdomain              q      d2d_clkdm             ti,clockdomain                          dpll5_clkdm           ti,clockdomain                    sgx_clkdm             ti,clockdomain                    usbhost_clkdm             ti,clockdomain                                target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  rev sysc                               Q            fck ick                      +               H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc            )                    H                        target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           rev sysc syss             #        !                                    *               M         ick                      +               H`       dma-controller@0              ti,omap3430-sdma ti,omap-sdma                                                /           :            G   `                     gpio@48310000             ti,omap3-gpio            H1                          gpio1            T         f        v            )                 gpio@49050000             ti,omap3-gpio            I                          gpio2            f        v            )                             gpio@49052000             ti,omap3-gpio            I                          gpio3            f        v            )                            gpio@49054000             ti,omap3-gpio            I@                          gpio4            f        v            )                 gpio@49056000             ti,omap3-gpio            I`                !         gpio5            f        v            )                 gpio@49058000             ti,omap3-gpio            I                "         gpio6            f        v            )                      	      serial@4806a000           ti,omap3-uart            H                   H        7      1      2        <tx rx            uart1           Fl       serial@4806c000           ti,omap3-uart            H                  I        7      3      4        <tx rx            uart2           Fl       serial@49020000           ti,omap3-uart            I                   J        7      5      6        <tx rx            uart3           Fl         ydefault                  i2c@48070000              ti,omap3-i2c             H                 8        7                    <tx rx                        +             i2c1            ydefault                    F    at24@50           atmel,24c02                        P      twl@48              H                                  ti,twl4030           )                   ydefault                  audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc                    bci           ti,twl4030-bci              	                                    vac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1          	'                            regulator-vdac            ti,twl4030-vdac          w@         w@                 regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1             :         0                  regulator-vmmc2           ti,twl4030-vmmc2             :         0      regulator-vusb1v5             ti,twl4030-vusb1v5                    regulator-vusb1v8             ti,twl4030-vusb1v8                    regulator-vusb3v1             ti,twl4030-vusb3v1                    regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2             w@         w@      regulator-vsim            ti,twl4030-vsim          w@         -      gpio              ti,twl4030-gpio          f        v            )                                                 twl4030-usb           ti,twl4030-usb              
                                                                            pwm           ti,twl4030-pwm                   pwmled            ti,twl4030-pwmled                    pwrbutton             ti,twl4030-pwrbutton                      keypad            ti,twl4030-keypad                       *           :         $  M    0  i g  l j .        madc              ti,twl4030-madc                     Z                           i2c@48072000              ti,omap3-i2c             H                 9        7                    <tx rx                        +             i2c2          i2c@48060000              ti,omap3-i2c             H                 =        7                    <tx rx                        +             i2c3            F         ydefault               at24@50           atmel,24c02                        P         mailbox@48094000              ti,omap3-mailbox             mailbox          H	@                        l           x                 dsp                                                 spi@48098000              ti,omap2-mcspi           H	                A                     +             mcspi1                   @  7      #      $      %      &      '      (      )      *         <tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3         ydefault               ads7846@0           ydefault                      ti,ads7846                                   `                                                                                                                        .           > 
          N            ^         spi@4809a000              ti,omap2-mcspi           H	                B                     +             mcspi2                      7      +      ,      -      .        <tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           H                [                     +             mcspi3                      7                                <tx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           H                0                     +             mcspi4                     7      F      G        <tx0 rx0       1w@480b2000           ti,omap3-1w          H                 :         hdq1w         mmc@4809c000              ti,omap3-hsmmc           H	                S         mmc1             l        7      =      >        <tx rx           y           ydefault                                                           mmc@480b4000              ti,omap3-hsmmc           H@                V         mmc2            7      /      0        <tx rx           ydefault                                                          mmc@480ad000              ti,omap3-hsmmc           H
                ^         mmc3            7      M      N        <tx rx         	  disabled          mmu@480bd400                          ti,omap2-iommu           H                         mmu_isp                             mmu@5d000000                          ti,omap2-iommu           ]                           mmu_iva       	  disabled          wdt@48314000              ti,omap3-wdt             H1@          
   wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@            mpu                ;   <        common tx rx                        mcbsp1          7                     <tx rx                        fck       	  disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           rev sysc syss                                     *                        ick                      +               H
         rng@0             ti,omap2-rng                                 4         mcbsp@49022000            ti,omap3-mcbsp           I     I            mpu sidetone                   >   ?           common tx rx sidetone                       mcbsp2 mcbsp2_sidetone          7      !      "        <tx rx                           fck ick         okay            ydefault                              mcbsp@49024000            ti,omap3-mcbsp           I@    I            mpu sidetone                   Y   Z           common tx rx sidetone                       mcbsp3 mcbsp3_sidetone          7                    <tx rx                           fck ick       	  disabled          mcbsp@49026000            ti,omap3-mcbsp           I`            mpu                6   7        common tx rx                        mcbsp4          7                    <tx rx                        fck         	          	  disabled          mcbsp@48096000            ti,omap3-mcbsp           H	`            mpu                Q   R        common tx rx                        mcbsp5          7                    <tx rx                        fck       	  disabled          sham@480c3000             ti,omap3-sham            sham             H0    d            1        7      E        <rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1    H1   H1           rev sysc syss             '                          *                           fck ick                      +               H1                      .   timer@0           ti,omap3430-timer                                        fck             %         9        H           X   D         target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            rev sysc syss             '                          *                          fck ick                      +               I        timer@0           ti,omap3430-timer                               &         timer@49034000            ti,omap3430-timer            I@                '         timer3        timer@49036000            ti,omap3430-timer            I`                (         timer4        timer@49038000            ti,omap3430-timer            I                )         timer5           o      timer@4903a000            ti,omap3430-timer            I                *         timer6           o      timer@4903c000            ti,omap3430-timer            I                +         timer7           o      timer@4903e000            ti,omap3430-timer            I                ,         timer8           |         o      timer@49040000            ti,omap3430-timer            I                 -         timer9           |      timer@48086000            ti,omap3430-timer            H`                .         timer10          |      timer@48088000            ti,omap3430-timer            H                /         timer11          |      target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           rev sysc syss             '                          *                          fck ick                      +               H0@       timer@0           ti,omap3430-timer                               _         9                  usbhstll@48062000             ti,usbhs-tll             H                 N         usb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@             usb_host_hs                      +                  	  ehci-phy          	  ehci-phy       ohci@48064400             ti,ohci-omap3            HD                L               ehci@48064800             ti,ehci-omap             HH                M                     gpmc@6e000000             ti,omap3430-gpmc             gpmc             n                         7              <rxtx                                               +            )                    f        v         0         ,             -                                   nand@0,0              ti,omap2-nand                                                                                        sw                      )   x        ;   x        M            \   x        o   x                      Z                      Z                      H           <           x           x        !           3   Z                     +      partition@0         Kxloader                       partition@80000         Kuboot                        partition@260000            Kuboot environment             &           partition@2a0000            Klinux             *   @        partition@6a0000            Krootfs            j             ethernet@gpmc             smsc,lan9221 smsc,lan9115           Q                      \           v                      )           ;           M            \           o   (           -                      -                                            x                      K           K                                3            !                                            	        ydefault                      	                                        ethernet@4,0              smsc,lan9221 smsc,lan9115           ydefault           
                                                     Q                      \           v                      )           ;           M            \           o   (           -                      -                                            x                      K           K                                3            !                                            	         usb_otg_hs@480ab000           ti,omap3-musb            H
                \   ]        mc dma           usb_otg_hs          	           	"           	*           ydefault                   	3            	B                  	  	Jusb2-phy                       	T   2      dss@48050000              ti,omap3-dss             H             okay          	   dss_core                         fck                      +                    ydefault                dispc@48050400            ti,omap3-dispc           H                      
   dss_dispc                        fck       encoder@4804fc00              ti,omap3-dsi             H    H    @H             proto phy pll                     	  disabled          	   dss_dsi1                            fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	  disabled          	   dss_rfbi                            fck ick       encoder@48050c00              ti,omap3-venc            H            okay          	   dss_venc                         fck         	Z     port       endpoint            	f          	v                          port       endpoint            	f          	              "            ssi-controller@48058000           ti,omap3-ssi             ssi         okay             H    H            sys gdd             G        gdd_mpu                      +                        u              ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            H    H            tx rx               C   D      ssi-port@4805b000             ti,omap3-ssi-port            H    H            tx rx               E   F         pinmux@480025d8            ti,omap3-padconf pinctrl-single          H %   $                     +            	                       )        >           \        isp@480bc000              ti,omap3-isp             H   H   |                    	                l        	                  ports                        +             bandgap@48002524             H %$             ti,omap34xx-bandgap         	                     target-module@480cb000            ti,sysc-omap3430-sr ti,sysc          smartreflex_core             H$           sysc                                   fck                      +               H       smartreflex@0             ti,omap3-smartreflex-core                                        target-module@480c9000            ti,sysc-omap3430-sr ti,sysc          smartreflex_mpu_iva          H$           sysc                                   fck                      +               H       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva                                         target-module@50000000            ti,sysc-omap2 ti,sysc            P             rev                        fck ick                      +               P     @          opp-table             operating-points-v2-ti-cpu                            opp1-125000000          	    sY@        	           	         opp2-250000000          	    沀        	 g8 g8 g8        	            	      opp3-500000000          	    e         	 O O O        	         opp4-550000000          	     U        	 tx tx tx        	         opp5-600000000          	    #F         	 p p p        	         opp6-720000000          	    *T         	 p p p        	            	         thermal-zones      cpu_thermal         	           
	          
      N         
$         trips      cpu_alert           
4 8        
@           passive                  cpu_crit            
4 _        
@        	   critical             cooling-maps       map0            
K          
P                 memory@80000000          memory                       leds          
    gpio-leds           ydefault              ledb            Kcm-t3x:green              	             
  
_heartbeat            hsusb1_power_reg              regulator-fixed         hsusb1_vbus          2Z         2Z        
u p                 hsusb2_power_reg              regulator-fixed         hsusb2_vbus          2Z         2Z        
u p                 hsusb1_phy            usb-nop-xceiv                                 
                          hsusb2_phy            usb-nop-xceiv                                 
                          ads7846-reg           regulator-fixed         ads7846-reg          2Z         2Z                  svideo-connector              svideo-connector            Ktv     port       endpoint            	f                         sound             ti,omap-twl4030         
cm-t35          
         regulator-vddvario            regulator-fixed       	  vddvario             
                 regulator-vdd33a              regulator-fixed         vdd33a           
                 regulator-mmc2-sdio-reset             regulator-fixed         regulator-mmc2-sdio-reset            2Z         2Z                           
                  encoder       
    ti,tfp410           
                 ydefault           !   ports                        +       port@0                  endpoint            	f  "                    port@1                 endpoint            	f  #           $               dvi-connector             dvi-connector           Kdvi    port       endpoint            	f  $           #            audio_amp             regulator-fixed       
  audio_amp           ydefault           %                          
         	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 display0 display1 device_type reg clocks clock-names clock-latency operating-points-v2 #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells ti,bit-shift reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,low-power-stop ti,lock ti,low-power-bypass ti,dividers ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended pagesize bci3v1-supply io-channels io-channel-names ti,use-leds ti,pullups usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns linux,keymap #io-channel-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs vcc-supply spi-max-frequency pendown-gpio ti,x-min ti,x-max ti,y-min ti,y-max ti,x-plate-ohms ti,pressure-max ti,debounce-max ti,debounce-tol ti,debounce-rep wakeup-source ti,dual-volt pbias-supply bus-width vmmc-supply cd-gpios non-removable cap-power-off-card status #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port1-mode port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,page-burst-access-ns gpmc,access-ns gpmc,cycle2cycle-delay-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns label bank-width gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen gpmc,bus-turnaround-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address multipoint num-eps ram-bits interface-type usb-phy phy-names power vdda-supply remote-endpoint ti,channels data-lines iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device linux,default-trigger startup-delay-us reset-gpios ti,model ti,mcbsp regulator-always-on enable-active-high powerdown-gpios 