  TR   8  N   (            j  N                                                                  !   ,Rockchip RK3228 Evaluation board          $   2rockchip,rk3228-evb rockchip,rk3228    aliases          =/serial@11010000             E/serial@11020000             M/serial@11030000             U/spi@11090000         cpus                                 cpu@f00          Zcpu          2arm,cortex-a7            f            j               q                          @                        psci                      cpu@f01          Zcpu          2arm,cortex-a7            f           j               q                        psci                      cpu@f02          Zcpu          2arm,cortex-a7            f           j               q                        psci                      cpu@f03          Zcpu          2arm,cortex-a7            f           j               q                        psci                         opp_table0           2operating-points-v2                          opp-408000000                Q           ~           @                opp-600000000                #F                 opp-816000000                0,           B@      opp-1008000000               <                 opp-1200000000               G           tx         bus          2simple-bus                                        pdma@110f0000            2arm,pl330 arm,primecell          f    @                                                                       	  0apb_pclk                	         arm-pmu          2arm,cortex-a7-pmu         0         L          M          N          O           <                  psci             2arm,psci-1.0 arm,psci-0.2            smc       timer            2arm,armv7-timer          O      0                                
          sn6       oscillator           2fixed-clock         sn6         xin24m                                display-subsystem            2rockchip,display-subsystem                   i2s1@100b0000         (   2rockchip,rk3228-i2s rockchip,rk3066-i2s          f    @                           0i2s_clk i2s_hclk                   Q                	      	           tx rx           default            
      	  disabled          i2s0@100c0000         (   2rockchip,rk3228-i2s rockchip,rk3066-i2s          f    @                           0i2s_clk i2s_hclk                   P                	      	           tx rx         	  disabled          spdif@100d0000           2rockchip,rk3228-spdif            f                                      S           
  0mclk hclk              	   
        tx          default                  	  disabled          i2s2@100e0000         (   2rockchip,rk3228-i2s rockchip,rk3066-i2s          f    @                           0i2s_clk i2s_hclk                   R                	       	           tx rx         	  disabled          syscon@11000000       &   2rockchip,rk3228-grf syscon simple-mfd            f                                              io-domains        "   2rockchip,rk3228-io-voltage-domain         	  disabled          usb2-phy@760             2rockchip,rk3228-usb2phy          f  `                          0phyclk          usb480m_phy0                      	  disabled                6   otg-port          $         ;          <          =           otg-bvalid otg-id linestate                   	  disabled                5      host-port                  >         
  linestate                     	  disabled                7         usb2-phy@800             2rockchip,rk3228-usb2phy          f                             0phyclk          usb480m_phy1                      	  disabled                8   otg-port                   D         
  linestate                     	  disabled                9      host-port                  E         
  linestate                     	  disabled                :            serial@11010000          2snps,dw-apb-uart             f                    7           sn6                M     U        0baudclk apb_pclk            default                                              	  disabled          serial@11020000          2snps,dw-apb-uart             f                    8           sn6                N     V        0baudclk apb_pclk            default                                        	  disabled          serial@11030000          2snps,dw-apb-uart             f                    9           sn6                O     W        0baudclk apb_pclk            default                                          okay          efuse@11040000           2rockchip,rk3228-efuse            f                    G        0pclk_efuse                              id@7             f            cpu_leakage@17           f               i2c@11050000             2rockchip,rk3228-i2c          f                    $                                     0i2c               L        default                  	  disabled          i2c@11060000             2rockchip,rk3228-i2c          f                    %                                     0i2c               M        default                  	  disabled          i2c@11070000             2rockchip,rk3228-i2c          f                    &                                     0i2c               N        default                  	  disabled          i2c@11080000             2rockchip,rk3228-i2c          f                    '                                     0i2c               O        default                  	  disabled          spi@11090000             2rockchip,rk3228-spi          f	                    1                                            A     R        0spiclk apb_pclk         default                              	  disabled          watchdog@110a0000            2snps,dw-wdt          f
                    (                 b      	  disabled          pwm@110b0000             2rockchip,rk3288-pwm          f             	                 ^        0pwm         default                  	  disabled          pwm@110b0010             2rockchip,rk3288-pwm          f            	                 ^        0pwm         default                  	  disabled          pwm@110b0020             2rockchip,rk3288-pwm          f             	                 ^        0pwm         default                  	  disabled          pwm@110b0030             2rockchip,rk3288-pwm          f 0           	                 ^        0pwm         default                  	  disabled          timer@110c0000        ,   2rockchip,rk3228-timer rockchip,rk3288-timer          f                     +                    a        0timer pclk        clock-controller@110e0000            2rockchip,rk3228-cru          f                                   !         H  .                                  k                b      $  >#g0, e ррxhррxh                  thermal-zones      cpu-thermal         S   d        i          w           trips      cpu_alert0           p                   apassive             !      cpu_alert1           $                   apassive             "      cpu_crit             _                	   acritical             cooling-maps       map0               !      0                                map1               "      0                             tsadc@11150000           2rockchip,rk3228-tsadc            f                    :                  H     X        0tsadc apb_pclk          .      H        >            j      W      
  tsadc-apb           init default sleep             #           $           #                    s        okay                                              hdmi-phy@12030000            2rockchip,rk3228-hdmi-phy             f                   m                 0sysclk refoclk refpclk                      hdmiphy_phy                   	  disabled                '      gpu@20000000          "   2rockchip,rk3228-mali arm,mali-400            f             H                                                                      gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  0bus core             j      ~      	  disabled          iommu@20020800           2rockchip,iommu           f                    
                               0aclk iface          1          	  disabled          iommu@20030480           2rockchip,iommu           f    @    @                                              0aclk iface          1          	  disabled          vop@20050000             2rockchip,rk3228-vop          f                                                          0aclk_vop dclk_vop hclk_vop           j      d      e      f        axi ahb dclk            >   %      	  disabled       port                                             endpoint@0           f            E   &            +            iommu@20053f00           2rockchip,iommu           f ?                                                   0aclk iface          1          	  disabled                %      rga@20060000          (   2rockchip,rk3228-rga rockchip,rk3288-rga          f                     !                                     0aclk hclk sclk           j      k      m      n        core axi ahb          iommu@20070800           2rockchip,iommu           f                                                   0aclk iface          1          	  disabled          hdmi@200a0000            2rockchip,rk3228-dw-hdmi          f 
                               #           .              U   '              l      {              0iahb isfr cec           default            (   )   *         j      `        hdmi            l   '        qhdmi                     	  disabled       ports      port                                 endpoint@0           f            E   +            &               mmc@30000000          0   2rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          f0     @                                        D      r      v        0biu ciu ciu-drive ciu-sample            {           default            ,   -   .      	  disabled          mmc@30010000          0   2rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          f0    @                                        E      s      w        0biu ciu ciu-drive ciu-sample            {           default            /   0   1      	  disabled          mmc@30020000          0   2rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          f0    @                           s<4`        <4`                     G      u      y        0biu ciu ciu-drive ciu-sample                                  {           default            2   3   4         j      S        reset           okay                                              usb@30040000          2   2rockchip,rk3228-usb rockchip,rk3066-usb snps,dwc2            f0                                             0otg         otg                                          @               l   5      	  qusb2-phy          	  disabled          usb@30080000             2generic-ehci             f0                                        6        l   7        qusb       	  disabled          usb@300a0000             2generic-ohci             f0
                                        6        l   7        qusb       	  disabled          usb@300c0000             2generic-ehci             f0                                        8        l   9        qusb       	  disabled          usb@300e0000             2generic-ohci             f0                                        8        l   9        qusb       	  disabled          usb@30100000             2generic-ehci             f0                    B                    8        l   :        qusb       	  disabled          usb@30120000             2generic-ohci             f0                    C                    8        l   :        qusb       	  disabled          ethernet@30200000            2rockchip,rk3228-gmac             f0                                macirq        8         ~                                   o      M  0stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac             j      8      
  stmmaceth                      okay            .      |        >        ,output          9   ;        Drmii            M   <   mdio             2snps,dwmac-mdio                              ethernet-phy@0        4   2ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22          f                            j      ?         X            <            interrupt-controller@32010000            2arm,gic-400          j                                   f2    2      2@     2`                   	                    pinctrl          2rockchip,rk3228-pinctrl                                                  gpio0@11110000           2rockchip,gpio-bank           f                    3                 @                             j                 gpio1@11120000           2rockchip,gpio-bank           f                    4                 A                             j                 gpio2@11130000           2rockchip,gpio-bank           f                    5                 B                             j                 gpio3@11140000           2rockchip,gpio-bank           f                    6                 C                             j                 pcfg-pull-up                         @      pcfg-pull-down                       ?      pcfg-pull-none                       >      pcfg-pull-none-drv-12ma                        =      sdmmc      sdmmc-clk                       =            ,      sdmmc-cmd                       =            -      sdmmc-bus4        @              =            =            =            =            .         sdio       sdio-clk                         =            /      sdio-cmd                        =            0      sdio-bus4         @              =            =            =            =            1         emmc       emmc-clk                        >            2      emmc-cmd                        >            3      emmc-bus8                       >            >            >            >            >            >            >            >            4         gmac       rgmii-pins                      >            >            >            =            =            =            =      	      =            =            >            >            >            >            >            >      rmii-pins                       >            >            >            =            =            =            >            >            >            >      phy-pins                         >            >         hdmi       hdmi-hpd                         ?            )      hdmii2c-xfer                          >             >            (      hdmi-cec                         >            *         i2c0       i2c0-xfer                          >             >                     i2c1       i2c1-xfer                         >             >                     i2c2       i2c2-xfer                        >            >                     i2c3       i2c3-xfer                         >             >                     spi0       spi0-clk                   	      @                  spi0-cs0                         @                  spi0-tx                      @                  spi0-rx                      @                  spi0-cs1                        @                     spi1       spi1-clk                         @      spi1-cs0                        @      spi1-rx                      @      spi1-tx                     @      spi1-cs1                        @         i2s1       i2s1-bus                         >       	      >             >             >             >             >            >            >            >            
         pwm0       pwm0-pin                        >                     pwm1       pwm1-pin                         >                     pwm2       pwm2-pin                        >                     pwm3       pwm3-pin                        >                     spdif      spdif-tx                        >                     tsadc      otp-pin                       >            #      otp-out                      >            $         uart0      uart0-xfer                       >            >                  uart0-cts                       >                  uart0-rts                        >                     uart1      uart1-xfer                 	      >      
      >                  uart1-cts                       >      uart1-rts                       >         uart2      uart2-xfer                       @            >                  uart21-xfer                
      @      	      >      uart2-cts                        >      uart2-rts                        >            memory@60000000          Zmemory           f`   @         vcc-phy-regulator            2regulator-fixed                  vcc_phy          w@        , w@         D         X            ;         	#address-cells #size-cells interrupt-parent model compatible serial0 serial1 serial2 spi0 device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks enable-method phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ranges interrupts #dma-cells arm,pl330-periph-burst clock-names interrupt-affinity arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ports dmas dma-names pinctrl-names pinctrl-0 status interrupt-names #phy-cells reg-shift reg-io-width #pwm-cells rockchip,grf #reset-cells assigned-clocks assigned-clock-rates polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reset-names pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #iommu-cells iommus remote-endpoint assigned-clock-parents phys phy-names fifo-depth max-frequency bus-width rockchip,default-sample-phase cap-mmc-highspeed mmc-ddr-1_8v disable-wp non-removable dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size clock_in_out phy-supply phy-mode phy-handle phy-is-integrated interrupt-controller #interrupt-cells gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins enable-active-high regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on 