     8     (            x                                                        7   radxa,rockpi-n8 vamrs,rk3288-vmarc-som rockchip,rk3288           &            7Radxa ROCK Pi N8       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        V         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        V         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        V            cpu-opp-table            operating-points-v2          ^        V      opp-126000000           i            p       opp-216000000           i             p       opp-312000000           i             p       opp-408000000           i    Q         p       opp-600000000           i    #F         p       opp-696000000           i    )|         p ~      opp-816000000           i    0,         p B@      opp-1008000000          i    <         p       opp-1200000000          i    G         p       opp-1416000000          i    Tfr         p O      opp-1512000000          i    ZJ         p        opp-1608000000          i    _"         p p         bus          simple-bus                                    ~   dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                                                   5            	  apb_pclk            V         dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                                                    5            	  apb_pclk          	  disabled          dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                                                    5            	  apb_pclk            V   U         reserved-memory                                   ~   dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      V   	      timer            arm,armv7-timer                0                                 
          n6          )      timer@ff810000           rockchip,rk3288-timer                                          H           5     a   	        pclk timer        display-subsystem            rockchip,display-subsystem          @   
         mmc@ff0c0000             rockchip,rk3288-dw-mshc         Fр         5           D      r      v        biu ciu ciu-drive ciu-sample            T                                            @                        _reset           okay            k            u                                     default                           mmc@ff0d0000             rockchip,rk3288-dw-mshc         Fр         5           E      s      w        biu ciu ciu-drive ciu-sample            T                   !                        @                        _reset         	  disabled          mmc@ff0e0000             rockchip,rk3288-dw-mshc         Fр         5           F      t      x        biu ciu ciu-drive ciu-sample            T                   "                        @                        _reset         	  disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Fр         5           G      u      y        biu ciu ciu-drive ciu-sample            T                   #                        @                        _reset           okay            k            u                          default                                                 saradc@ff100000          rockchip,saradc                                       $                      5      I     [        saradc apb_pclk                W        _saradc-apb        	  disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk                             tx rx                   ,           default                                                                           	  disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk                             tx rx                   -           default                                                                           	  disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk                             tx rx                   .           default                !   "   #                                                      	  disabled          i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        default            $      	  disabled          i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        default            %      	  disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        default            &      	  disabled          i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        default            '        okay            V   k      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                                 5      M     U        baudclk apb_pclk                                tx rx           default            (   )        okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                                 5      N     V        baudclk apb_pclk                                tx rx           default            *      	  disabled          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                                 5      O     W        baudclk apb_pclk            default            +        okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                                 5      P     X        baudclk apb_pclk                                tx rx           default            ,      	  disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                                 5      Q     Y        baudclk apb_pclk                  	      
        tx rx           default            -      	  disabled          thermal-zones      reserve_thermal                   0          >   .          cpu_thermal            d        0          >   .      trips      cpu_alert0          N p        Z           passive         V   /      cpu_alert1          N $        Z           passive         V   0      cpu_crit            N _        Z        	   critical             cooling-maps       map0            e   /      0  j                              map1            e   0      0  j                        gpu_thermal            d        0          >   .      trips      gpu_alert0          N p        Z           passive         V   1      gpu_crit            N _        Z        	   critical             cooling-maps       map0            e   1        j   2               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  _tsadc-apb           init default sleep             3        y   4           3                      5         s      	  disabled            V   .      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              macirq eth_wake_irq            5      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  _stmmaceth           okay               6        input           rgmii           default            7                       '  P        /   (        8           A              Q           \   8             usb@ff500000             generic-ehci                 P                                    5             l   9        qusb         okay          usb@ff520000             generic-ohci                 R                         )           5             l   9        qusb         okay          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         {host            l   :      	  qusb2-phy                     okay          usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         {otg                                          @   @            l   ;      	  qusb2-phy            okay          usb@ff5c0000             generic-ehci                 \                                    5           	  disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        default            <        okay                pmic@1b          rockchip,rk808                       &   =                       default            >   ?                                     rk808-clkout1 rk808-clkout2            @           @           @           @        )   @        5   @        A           M           Y   @        f   @        s                 regulators     DCDC_REG1           vdd_arm                            q         \   regulator-state-mem                   DCDC_REG2           vdd_gpu                            P                   p   regulator-state-mem                   DCDC_REG3           vcc_ddr                      regulator-state-mem                    DCDC_REG4           vcc_io                             2Z         2Z        V      regulator-state-mem                   8 2Z         LDO_REG1            vcc_tp                             2Z         2Z   regulator-state-mem                   LDO_REG2            vcca_codec                             2Z         2Z   regulator-state-mem                   8 2Z         LDO_REG3            vdd_10                             B@         B@   regulator-state-mem                   8 B@         LDO_REG4            vcc_wl                             w@         w@   regulator-state-mem                    LDO_REG5          	  vccio_sd                               w@         2Z        V      regulator-state-mem                   8 2Z         LDO_REG6          
  vdd10_lcd                              B@         B@   regulator-state-mem                   LDO_REG7            vcc_18                             w@         w@        V   T   regulator-state-mem                   8 w@         LDO_REG8          
  vcc18_lcd                              w@         w@   regulator-state-mem                   SWITCH_REG1         vcc_sd                       regulator-state-mem                   SWITCH_REG2         vcc_lcd                      regulator-state-mem                            i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        default            A      	  disabled          pwm@ff680000             rockchip,rk3288-pwm              h                 T           default            B        5     _        pwm         okay          pwm@ff680010             rockchip,rk3288-pwm              h                T           default            C        5     _        pwm       	  disabled          pwm@ff680020             rockchip,rk3288-pwm              h                 T           default            D        5     _        pwm         okay          pwm@ff680030             rockchip,rk3288-pwm              h 0               T           default            E        5     _        pwm       	  disabled          sram@ff700000         
   mmio-sram                p                                         ~        p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 V      power-controller          !   rockchip,rk3288-power-controller            _                                     A      h           	        V   X   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  s   F   G   H   I   J   K   L   M   N      power-domain@11                     5            o      p        s   O   P      power-domain@12                     5                   s   Q      power-domain@13                     5              s   R   S         reboot-mode          syscon-reboot-mode          z           RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                    5                            H  A                                  j                k      $  #gׄ e  рxh рxh        V         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 V   5   edp-phy          rockchip,rk3288-dp-phy          5      h        24m                   	  disabled            V   h      io-domains        "   rockchip,rk3288-io-voltage-domain           okay                                     T                            usbphy           rockchip,rk3288-usb-phy                                   okay       usb-phy@320                                 5      ]        phyclk                                   
  _phy-reset           V   ;      usb-phy@334                        4        5      ^        phyclk                                   
  _phy-reset           V   9      usb-phy@348                        H        5      _        phyclk                                   
  _phy-reset           V   :            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O         	  disabled          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                               (            5      T           
  mclk hclk              U           tx                  6           default            V           5      	  disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                               (                    5           5      R             i2s_clk i2s_hclk               U       U           tx rx           default            W        9           T         	  disabled          crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        _crypto-rst          okay          iommu@ff900800           rockchip,iommu                       @                           iep_mmu         5                   aclk iface          n          	  disabled          iommu@ff914000           rockchip,iommu                @            P                                   isp_mmu         5                   aclk iface          n             {      	  disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk             X   	               i      l      m        _core axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             X   	               d      e      f        _axi ahb dclk               Y        okay       port                                      V      endpoint@0                          Z        V   m      endpoint@1                         [        V   i      endpoint@2                         \        V   c      endpoint@3                         ]        V   f            iommu@ff930300           rockchip,iommu                                                	  vopb_mmu            5                   aclk iface             X   	        n            okay            V   Y      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             X   	                                   _axi ahb dclk               ^        okay       port                                      V   
   endpoint@0                          _        V   n      endpoint@1                         `        V   j      endpoint@2                         a        V   d      endpoint@3                         b        V   g            iommu@ff940300           rockchip,iommu                                                	  vopl_mmu            5                   aclk iface             X   	        n            okay            V   ^      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk               X   	           5      	  disabled       ports      port                                 endpoint@0                          c        V   \      endpoint@1                         d        V   a               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           lcdc               e           X   	           5      	  disabled       ports                                port@0                                            endpoint@0                          f        V   ]      endpoint@1                         g        V   b               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk         l   h        qdp                 o        _dp             5      	  disabled       ports                                port@0                                            endpoint@0                          i        V   [      endpoint@1                         j        V   `               hdmi@ff980000            rockchip,rk3288-dw-hdmi                                          (               5                g           5     h      m      n        iahb isfr cec              X   	        okay               k        default            l   ports      port                                 endpoint@0                          m        V   Z      endpoint@1                         n        V   _               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  vepu vdpu           5                 
  aclk hclk              o           X         iommu@ff9a0800           rockchip,iommu                                                  vpu_mmu         5                   aclk iface          n               X           V   o      iommu@ff9c0440           rockchip,iommu                @       @           @                o         	  hevc_mmu            5                   aclk iface          n          	  disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         job mmu gpu         5                 p                      X         	  disabled            V   2      gpu-opp-table            operating-points-v2         V   p   opp-100000000           i             p ~      opp-200000000           i             p ~      opp-300000000           i             p B@      opp-400000000           i    ׄ         p       opp-600000000           i    #F         p          qos@ffaa0000             syscon                                 V   R      qos@ffaa0080             syscon                                V   S      qos@ffad0000             syscon                                 V   G      qos@ffad0100             syscon                                V   H      qos@ffad0180             syscon                               V   I      qos@ffad0400             syscon                                V   J      qos@ffad0480             syscon                               V   K      qos@ffad0500             syscon                                V   F      qos@ffad0800             syscon                                V   L      qos@ffad0880             syscon                               V   M      qos@ffad0900             syscon               	                 V   N      qos@ffae0000             syscon                                 V   Q      qos@ffaf0000             syscon                                 V   O      qos@ffaf0080             syscon                                V   P      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400                                         @                                 @             `                        	          V         pinctrl          rockchip,rk3288-pinctrl            5                                              ~   gpio0@ff750000           rockchip,gpio-bank               u                         Q           5     @                                                V   =      gpio1@ff780000           rockchip,gpio-bank               x                         R           5     A                                              gpio2@ff790000           rockchip,gpio-bank               y                         S           5     B                                              gpio3@ff7a0000           rockchip,gpio-bank               z                         T           5     C                                              gpio4@ff7b0000           rockchip,gpio-bank               {                         U           5     D                                                V   8      gpio5@ff7c0000           rockchip,gpio-bank               |                         V           5     E                                              gpio6@ff7d0000           rockchip,gpio-bank               }                         W           5     F                                              gpio7@ff7e0000           rockchip,gpio-bank               ~                         X           5     G                                              gpio8@ff7f0000           rockchip,gpio-bank                                        Y           5     H                                              hdmi       hdmi-cec-c0         	            q        V   l      hdmi-cec-c7         	            q      hdmi-ddc             	            q            q      hdmi-ddc-unwedge             	             r            q         pcfg-output-low                  V   r      pcfg-pull-up             "        V   s      pcfg-pull-down           /        V   t      pcfg-pull-none           >        V   q      pcfg-pull-none-12ma          >        K           V   w      suspend    global-pwroff           	              q        V   ?      ddrio-pwroff            	             q      ddr0-retention          	             s      ddr1-retention          	             s         edp    edp-hpd         	            t         i2c0       i2c0-xfer            	             q             q        V   <         i2c1       i2c1-xfer            	            q            q        V   $         i2c2       i2c2-xfer            	      	      q      
      q        V   A         i2c3       i2c3-xfer            	            q            q        V   %         i2c4       i2c4-xfer            	            q            q        V   &         i2c5       i2c5-xfer            	            q            q        V   '         i2s0       i2s0-bus          `  	             q            q            q            q            q            q        V   W         lcdc       lcdc-ctl          @  	            q            q            q            q        V   e         sdmmc      sdmmc-clk           	            u        V         sdmmc-cmd           	            v        V         sdmmc-cd            	            s        V         sdmmc-bus1          	            s      sdmmc-bus4        @  	            v            v            v            v        V            sdio0      sdio0-bus1          	            s      sdio0-bus4        @  	            s            s            s            s      sdio0-cmd           	            s      sdio0-clk           	            q      sdio0-cd            	            s      sdio0-wp            	            s      sdio0-pwr           	            s      sdio0-bkpwr         	            s      sdio0-int           	            s         sdio1      sdio1-bus1          	            s      sdio1-bus4        @  	            s            s            s            s      sdio1-cd            	            s      sdio1-wp            	            s      sdio1-bkpwr         	            s      sdio1-int           	            s      sdio1-cmd           	            s      sdio1-clk           	            q      sdio1-pwr           	      	      s         emmc       emmc-clk            	            q        V         emmc-cmd            	            s        V         emmc-pwr            	      	      s        V         emmc-bus1           	             s      emmc-bus4         @  	             s            s            s            s      emmc-bus8           	             s            s            s            s            s            s            s            s        V            spi0       spi0-clk            	            s        V         spi0-cs0            	            s        V         spi0-tx         	            s        V         spi0-rx         	            s        V         spi0-cs1            	            s         spi1       spi1-clk            	            s        V         spi1-cs0            	            s        V         spi1-rx         	            s        V         spi1-tx         	            s        V            spi2       spi2-cs1            	            s      spi2-clk            	            s        V          spi2-cs0            	            s        V   #      spi2-rx         	            s        V   "      spi2-tx         	      	      s        V   !         uart0      uart0-xfer           	            s            q        V   (      uart0-cts           	            s        V   )      uart0-rts           	            q         uart1      uart1-xfer           	            s      	      q        V   *      uart1-cts           	      
      s      uart1-rts           	            q         uart2      uart2-xfer           	            s            q        V   +         uart3      uart3-xfer           	            s            q        V   ,      uart3-cts           	      	      s      uart3-rts           	      
      q         uart4      uart4-xfer           	            s            q        V   -      uart4-cts           	            s      uart4-rts           	            q         tsadc      otp-pin         	       
       q        V   3      otp-out         	       
      q        V   4         pwm0       pwm0-pin            	             q        V   B         pwm1       pwm1-pin            	            q        V   C         pwm2       pwm2-pin            	            q        V   D         pwm3       pwm3-pin            	            q        V   E         gmac       rgmii-pins          	            q            q            q            q            w            w            w            w             q            q            q      	      w            w            q            q        V   7      rmii-pins           	            q            q            q            q             q            q            q            q            q            q         spdif      spdif-tx            	            q        V   V         pcfg-pull-none-drv-8ma          K           V   u      pcfg-pull-up-drv-8ma             "        K           V   v      pmic       pmic-int            	              s        V   >         vbus_host      usb1-en-oc          	              s        V   y         vbus_typec     usb0-en-oc          	              s        V   z            external-gmac-clock          fixed-clock         sY@        clkin_gmac                      V   6      vcc12v-dcin-regulator            regulator-fixed         vcc12v_dcin                                               V   x      vcc5v0-sys-regulator             regulator-fixed         vcc5v0_sys                             LK@         LK@        Z   x        V   @      vbus-host            regulator-fixed         default            y      
  vbus_host                    Z   @         e        g   =             vbus-typec           regulator-fixed         default            z        vbus_typec                   Z   @         e        g   =             vccio-flash-regulator            regulator-fixed         vccio_flash          w@         w@        Z           V            	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient phandle opp-shared opp-hz opp-microvolt ranges #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst clock-names status clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend ports max-frequency fifo-depth reset-names bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vqmmc-supply pinctrl-names pinctrl-0 non-removable vmmc-supply #io-channel-cells dmas dma-names reg-shift reg-io-width polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp interrupt-names assigned-clock-parents clock_in_out phy-mode snps,reset-active-low snps,reset-delays-us tx_delay rx_delay assigned-clocks phy-supply snps,reset-gpio phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vddio-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-off-in-suspend regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply flash0-supply gpio1830-supply gpio30-supply sdcard-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength vin-supply enable-active-high 