     8     (            
_                                                        K   google,veyron-brain-rev0 google,veyron-brain google,veyron rockchip,rk3288           &            7Google Brain       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V   	        b         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        b         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        b            cpu-opp-table            operating-points-v2          j        b      opp-126000000           u            |       opp-216000000           u             |       opp-408000000           u    Q         |       opp-600000000           u    #F         |       opp-696000000           u    )|         | ~      opp-816000000           u    0,         | B@      opp-1008000000          u    <         |       opp-1200000000          u    G         |       opp-1416000000          u    Tfr         | O      opp-1512000000          u    ZJ         |       opp-1608000000          u    _"         |        opp-1704000000          u    e         | p      opp-1800000000          u    kI         | \         bus          simple-bus                                       dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                                                   5            	  apb_pclk            b         dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                                                    5            	  apb_pclk          	  disabled          dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                                                    5            	  apb_pclk            b   Y         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      b   
      timer            arm,armv7-timer                0                                 
          n6          5      timer@ff810000           rockchip,rk3288-timer                                          H           5     a   
        pclk timer        display-subsystem            rockchip,display-subsystem          L            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Rр         5           D      r      v        biu ciu ciu-drive ciu-sample            `                                            @                        kreset         	  disabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         Rр         5           E      s      w        biu ciu ciu-drive ciu-sample            `                   !                        @                        kreset           okay            w                                                          default                                                                          '         mmc@ff0e0000             rockchip,rk3288-dw-mshc         Rр         5           F      t      x        biu ciu ciu-drive ciu-sample            `                   "                        @                        kreset         	  disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Rр         5           G      u      y        biu ciu ciu-drive ciu-sample            `                   #                        @                        kreset           okay            w            4        F            d         o                            default                        saradc@ff100000          rockchip,saradc                                       $           ~           5      I     [        saradc apb_pclk                W        ksaradc-apb        	  disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk                             tx rx                   ,           default                                                                           	  disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk                             tx rx                   -           default                                                                           	  disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk                             tx rx                   .           default                !   "   #                                                        okay                  flash@0          jedec,spi-nor                                 i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        default            $        okay                        2           d   tpm@20           infineon,slb9645tt                                 i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        default            %      	  disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        default            &        okay                        2          ,      i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        default            '      	  disabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                                 5      M     U        baudclk apb_pclk                                tx rx           default            (   )   *        okay       bluetooth           default            +   ,   -         brcm,bcm43540-bt            "   .               4   .               C   .               W -        a             serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                                 5      N     V        baudclk apb_pclk                                tx rx           default            /        okay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                                 5      O     W        baudclk apb_pclk            default            0        okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                                 5      P     X        baudclk apb_pclk                                tx rx           default            1      	  disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                                 5      Q     Y        baudclk apb_pclk                  	      
        tx rx           default            2      	  disabled          thermal-zones      reserve_thermal         x                       3          cpu_thermal         x   d                     3      trips      cpu_alert0           p                   passive         b   4      cpu_alert1           $                   passive         b   5      cpu_crit                             	   critical             cooling-maps       map0               4      0                                map1               5      0                          gpu_thermal         x   d                     3      trips      gpu_alert0           4                   passive         b   6      gpu_crit                             	   critical             cooling-maps       map0               6           7               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  ktsadc-apb           init default sleep             8           9           8                      :         H        okay            %           <           b   3      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              Wmacirq eth_wake_irq            :      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  kstmmaceth         	  disabled          usb@ff500000             generic-ehci                 P                                    5             g   ;        lusb         okay             v      usb@ff520000             generic-ohci                 R                         )           5             g   ;        lusb       	  disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         host            g   <      	  lusb2-phy                     okay                   usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         host                                             @   @            g   =      	  lusb2-phy            okay                  z           =               usb@ff5c0000             generic-ehci                 \                                    5           	  disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        default            >        okay                        2           d   pmic@1b          rockchip,rk808                      xin32k wifibt_32kin          &   ?                       default            @   A   B                  :                   H           T           `           l           x                                    C           D          D               b      regulators     DCDC_REG1           vdd_arm                            q                    q        b   	   regulator-state-mem          .         DCDC_REG2           vdd_gpu                            5                    q        b   u   regulator-state-mem          .         DCDC_REG3           vcc135_ddr                       regulator-state-mem          G         DCDC_REG4           vcc_18                             w@         w@        b      regulator-state-mem          G        _ w@         LDO_REG3            vdd_10                             B@         B@   regulator-state-mem          G        _ B@         LDO_REG7          
  vdd10_lcd                              B@         B@         {   regulator-state-mem          .         SWITCH_REG1       
  vcc33_lcd                             b   X   regulator-state-mem          .         SWITCH_REG2                           vcc18_hdmi           {               i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        default            E        okay                        2                 pwm@ff680000             rockchip,rk3288-pwm              h                            default            F        5     _        pwm       	  disabled          pwm@ff680010             rockchip,rk3288-pwm              h                           default            G        5     _        pwm         okay            b         pwm@ff680020             rockchip,rk3288-pwm              h                            default            H        5     _        pwm       	  disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0                          default            I        5     _        pwm       	  disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 b      power-controller          !   rockchip,rk3288-power-controller                                                       h           
        b   \   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     J   K   L   M   N   O   P   Q   R      power-domain@11                     5            o      p           S   T      power-domain@12                     5                      U      power-domain@13                     5                 V   W         reboot-mode          syscon-reboot-mode                     RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                    :                            H                                    j                k      $  
#gׄ e  рxh рxh        b         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 b   :   edp-phy          rockchip,rk3288-dp-phy          5      h        24m                   	  disabled            b   l      io-domains        "   rockchip,rk3288-io-voltage-domain           okay            *   C        4           ?           M   C        ]   C        k   X        w         usbphy           rockchip,rk3288-usb-phy                                   okay       usb-phy@320                                 5      ]        phyclk                                   
  kphy-reset           b   =      usb-phy@334                        4        5      ^        phyclk                                   
  kphy-reset           b   ;      usb-phy@348                        H        5      _        phyclk                                   
  kphy-reset           b   <            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O           okay          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                           5      T           
  mclk hclk              Y           tx                  6           default            Z           :      	  disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                   5           5      R             i2s_clk i2s_hclk               Y       Y           tx rx           default            [                            	  disabled          crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        kcrypto-rst          okay          iommu@ff900800           rockchip,iommu                       @                           Wiep_mmu         5                   aclk iface                    	  disabled          iommu@ff914000           rockchip,iommu                @            P                                   Wisp_mmu         5                   aclk iface                             	  disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk             \   	               i      l      m        kcore axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             \   	               d      e      f        kaxi ahb dclk               ]        okay       port                                      b      endpoint@0                       	   ^        b   q      endpoint@1                      	   _        b   m      endpoint@2                      	   `        b   g      endpoint@3                      	   a        b   j            iommu@ff930300           rockchip,iommu                                                	  Wvopb_mmu            5                   aclk iface             \   	                    okay            b   ]      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             \   	                                   kaxi ahb dclk               b      	  disabled       port                                      b      endpoint@0                       	   c        b   r      endpoint@1                      	   d        b   n      endpoint@2                      	   e        b   h      endpoint@3                      	   f        b   k            iommu@ff940300           rockchip,iommu                                                	  Wvopl_mmu            5                   aclk iface             \   	                  	  disabled            b   b      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk               \   	           :      	  disabled       ports      port                                 endpoint@0                       	   g        b   `      endpoint@1                      	   h        b   e               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           lcdc               i           \   	           :      	  disabled       ports                                port@0                                            endpoint@0                       	   j        b   a      endpoint@1                      	   k        b   f               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk         g   l        ldp                 o        kdp             :      	  disabled       ports                                port@0                                            endpoint@0                       	   m        b   _      endpoint@1                      	   n        b   d               hdmi@ff980000            rockchip,rk3288-dw-hdmi                                                         :                g           5     h      m      n        iahb isfr cec              \   	        okay            default unwedge            o           p   ports      port                                 endpoint@0                       	   q        b   ^      endpoint@1                      	   r        b   c               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  Wvepu vdpu           5                 
  aclk hclk              s           \         iommu@ff9a0800           rockchip,iommu                                                  Wvpu_mmu         5                   aclk iface                         \           b   s      iommu@ff9c0440           rockchip,iommu                @       @           @                o         	  Whevc_mmu            5                   aclk iface                    	  disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         Wjob mmu gpu         5                 t                      \           okay            	   u        b   7      gpu-opp-table            operating-points-v2         b   t   opp-100000000           u             | ~      opp-200000000           u             | ~      opp-300000000           u             | B@      opp-400000000           u    ׄ         |       opp-600000000           u    #F         |          qos@ffaa0000             syscon                                 b   V      qos@ffaa0080             syscon                                b   W      qos@ffad0000             syscon                                 b   K      qos@ffad0100             syscon                                b   L      qos@ffad0180             syscon                               b   M      qos@ffad0400             syscon                                b   N      qos@ffad0480             syscon                               b   O      qos@ffad0500             syscon                                b   J      qos@ffad0800             syscon                                b   P      qos@ffad0880             syscon                               b   Q      qos@ffad0900             syscon               	                 b   R      qos@ffae0000             syscon                                 b   U      qos@ffaf0000             syscon                                 b   S      qos@ffaf0080             syscon                                b   T      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          	"        	7                       @                                 @             `                        	          b         pinctrl          rockchip,rk3288-pinctrl            :                                                      default            v   w   x   gpio0@ff750000           rockchip,gpio-bank               u                         Q           5     @         	H        	X            	"        	7           b   ?      gpio1@ff780000           rockchip,gpio-bank               x                         R           5     A         	H        	X            	"        	7         gpio2@ff790000           rockchip,gpio-bank               y                         S           5     B         	H        	X            	"        	7           b         gpio3@ff7a0000           rockchip,gpio-bank               z                         T           5     C         	H        	X            	"        	7         gpio4@ff7b0000           rockchip,gpio-bank               {                         U           5     D         	H        	X            	"        	7           b   .      gpio5@ff7c0000           rockchip,gpio-bank               |                         V           5     E         	H        	X            	"        	7         gpio6@ff7d0000           rockchip,gpio-bank               }                         W           5     F         	H        	X            	"        	7         gpio7@ff7e0000           rockchip,gpio-bank               ~                         X           5     G         	H        	X            	"        	7           b   D      gpio8@ff7f0000           rockchip,gpio-bank                                        Y           5     H         	H        	X            	"        	7         hdmi       hdmi-cec-c0         	d            y      hdmi-cec-c7         	d            y      hdmi-ddc             	d            y            y        b   o      hdmi-ddc-unwedge             	d             z            y        b   p      vcc50-hdmi-en           	d             y        b            pcfg-output-low          	r        b   z      pcfg-pull-up             	}        b   {      pcfg-pull-down           	        b   |      pcfg-pull-none           	        b   y      pcfg-pull-none-12ma          	        	           b         suspend    global-pwroff           	d              y        b   x      ddrio-pwroff            	d             y        b   w      ddr0-retention          	d             {        b   v      ddr1-retention          	d             {         edp    edp-hpd         	d            |         i2c0       i2c0-xfer            	d             y             y        b   >         i2c1       i2c1-xfer            	d            y            y        b   $         i2c2       i2c2-xfer            	d      	      y      
      y        b   E         i2c3       i2c3-xfer            	d            y            y        b   %         i2c4       i2c4-xfer            	d            y            y        b   &         i2c5       i2c5-xfer            	d            y            y        b   '         i2s0       i2s0-bus          `  	d             y            y            y            y            y            y        b   [         lcdc       lcdc-ctl          @  	d            y            y            y            y        b   i         sdmmc      sdmmc-clk           	d            y      sdmmc-cmd           	d            {      sdmmc-cd            	d            {      sdmmc-bus1          	d            {      sdmmc-bus4        @  	d            {            {            {            {         sdio0      sdio0-bus1          	d            {      sdio0-bus4        @  	d            }            }            }            }        b         sdio0-cmd           	d            }        b         sdio0-clk           	d            }        b         sdio0-cd            	d            {      sdio0-wp            	d            {      sdio0-pwr           	d            {      sdio0-bkpwr         	d            {      sdio0-int           	d            {      wifienable-h            	d             y        b         bt-enable-l         	d             y        b   ,      bt-host-wake            	d             |      bt-host-wake-l          	d             y        b   +      bt-dev-wake-sleep           	d             z      bt-dev-wake-awake           	d             ~      bt-dev-wake         	d             y        b   -         sdio1      sdio1-bus1          	d            {      sdio1-bus4        @  	d            {            {            {            {      sdio1-cd            	d            {      sdio1-wp            	d            {      sdio1-bkpwr         	d            {      sdio1-int           	d            {      sdio1-cmd           	d            {      sdio1-clk           	d            y      sdio1-pwr           	d      	      {         emmc       emmc-clk            	d            }        b         emmc-cmd            	d            }        b         emmc-pwr            	d      	      {      emmc-bus1           	d             {      emmc-bus4         @  	d             {            {            {            {      emmc-bus8           	d             }            }            }            }            }            }            }            }        b         emmc-reset          	d      	       y        b            spi0       spi0-clk            	d            {        b         spi0-cs0            	d            {        b         spi0-tx         	d            {        b         spi0-rx         	d            {        b         spi0-cs1            	d            {         spi1       spi1-clk            	d            {        b         spi1-cs0            	d            {        b         spi1-rx         	d            {        b         spi1-tx         	d            {        b            spi2       spi2-cs1            	d            {      spi2-clk            	d            {        b          spi2-cs0            	d            {        b   #      spi2-rx         	d            {        b   "      spi2-tx         	d      	      {        b   !         uart0      uart0-xfer           	d            {            y        b   (      uart0-cts           	d            {        b   )      uart0-rts           	d            y        b   *         uart1      uart1-xfer           	d            {      	      y        b   /      uart1-cts           	d      
      {      uart1-rts           	d            y         uart2      uart2-xfer           	d            {            y        b   0         uart3      uart3-xfer           	d            {            y        b   1      uart3-cts           	d      	      {      uart3-rts           	d      
      y         uart4      uart4-xfer           	d            {            y        b   2      uart4-cts           	d            {      uart4-rts           	d            y         tsadc      otp-pin         	d       
       y        b   8      otp-out         	d       
      y        b   9         pwm0       pwm0-pin            	d             y        b   F         pwm1       pwm1-pin            	d            y        b   G         pwm2       pwm2-pin            	d            y        b   H         pwm3       pwm3-pin            	d            y        b   I         gmac       rgmii-pins          	d            y            y            y            y                                                             y            y            y      	                              y            y      rmii-pins           	d            y            y            y            y             y            y            y            y            y            y         spdif      spdif-tx            	d            y        b   Z         pcfg-pull-none-drv-8ma           	        	           b   }      pcfg-pull-up-drv-8ma             	}        	         pcfg-output-high             	        b   ~      buttons    pwr-key-l           	d              {        b            pmic       pmic-int-l          	d              {        b   @      dvs-1           	d             |        b   A      dvs-2           	d             |        b   B         reboot     ap-warm-reset-h         	d              y        b            recovery-switch    rec-mode-l          	d       	       {         tpm    tpm-int-h           	d             y         write-protect      fw-wp-ap            	d             y         usb-host       usb2-pwr-en         	d              y        b               chosen          	serial2:115200n8          memory           memory                                power-button          
   gpio-keys           default               power           	Power           .   ?              	   t        	   d         :         gpio-restart             gpio-restart            .   ?               default                    	         emmc-pwrseq          mmc-pwrseq-emmc                    default         	      	            b         sdio-pwrseq          mmc-pwrseq-simple           5            
  ext_clock           default                    	   .              b         vcc-5v           regulator-fixed         vcc_5v                             LK@         LK@        b         vcc33-sys            regulator-fixed       
  vcc33_sys                              2Z         2Z        
           b         vcc50-hdmi           regulator-fixed         vcc50_hdmi                            
            
        
#   D               default                  vdd-logic            pwm-regulator         
  vdd_logic           
(                     
-           
8   {            
L                              ~         p                vcc33_io             regulator-fixed       	  vcc33_io                              
           b   C      vcc5-host2-regulator             regulator-fixed          
        
#   ?               default                    vcc5_host2                             	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst clock-names status clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend ports max-frequency fifo-depth reset-names bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended reg-shift reg-io-width host-wakeup-gpios shutdown-gpios device-wakeup-gpios max-speed brcm,bt-pcm-int-params polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size assigned-clocks assigned-clock-parents rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply dvs-gpios regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt regulator-suspend-mem-disabled #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios vin-supply enable-active-high gpio pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit 