     8     (                                                                       google,veyron-jaq-rev5 google,veyron-jaq-rev4 google,veyron-jaq-rev3 google,veyron-jaq-rev2 google,veyron-jaq-rev1 google,veyron-jaq google,veyron rockchip,rk3288           &            7Google Jaq     aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /spi@ff110000/ec@0/i2c-tunnel         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                     
                      -  @        ;              B  r        \   	        h         cpu@501          cpu          arm,cortex-a12                                   
                      -  @        ;              B  r        h         cpu@502          cpu          arm,cortex-a12                                   
                      -  @        ;              B  r        h         cpu@503          cpu          arm,cortex-a12                                   
                      -  @        ;              B  r        h            cpu-opp-table            operating-points-v2          p        h      opp-126000000           {                   opp-216000000           {                    opp-408000000           {    Q                opp-600000000           {    #F                opp-696000000           {    )|          ~      opp-816000000           {    0,          B@      opp-1008000000          {    <                opp-1200000000          {    G                opp-1416000000          {    Tfr          O      opp-1512000000          {    ZJ                opp-1608000000          {    _"                 opp-1704000000          {    e          p      opp-1800000000          {    kI          \         bus          simple-bus                                       dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                                                   ;            	  apb_pclk            h   !      dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                                                    ;            	  apb_pclk          	  disabled          dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                                                    ;            	  apb_pclk            h   e         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m          
            h   
      timer            arm,armv7-timer                0                                 
          n6          ;      timer@ff810000           rockchip,rk3288-timer                                          H           ;     a   
        pclk timer        display-subsystem            rockchip,display-subsystem          R            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Xр         ;           D      r      v        biu ciu ciu-drive ciu-sample            f                                            @                       qreset           okay            }                                                            Z                                    
                   $            1        <default         J                     mmc@ff0d0000             rockchip,rk3288-dw-mshc         Xр         ;           E      s      w        biu ciu ciu-drive ciu-sample            f                   !                        @                       qreset           okay            }                     T         a        w                    <default         J                                             
                   $                                btmrvl@2             marvell,sd8897-bt                        &                                     <default         J            mmc@ff0e0000             rockchip,rk3288-dw-mshc         Xр         ;           F      t      x        biu ciu ciu-drive ciu-sample            f                   "                        @                       qreset         	  disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Xр         ;           G      u      y        biu ciu ciu-drive ciu-sample            f                   #                        @                       qreset           okay            }                                1                 w                    <default         J                saradc@ff100000          rockchip,saradc                                       $                      ;      I     [        saradc apb_pclk               W        qsaradc-apb        	  disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         ;      A     R        spiclk apb_pclk            !      !           tx rx                   ,           <default         J   "   #   $   %                                                        okay       ec@0             google,cros-ec-spi                                   &                          <default         J   &         -   i2c-tunnel           google,cros-ec-i2c-tunnel                                            sbs-battery@b            sbs,sbs-battery                                (            keyboard-controller          google,cros-ec-keyb         =           M            `     D  z  }  ;  0  D  Y  1   
 d  > " A # (	 C  \    =  @   V 	 B
 |  } ) <  ?  	  + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         ;      B     S        spiclk apb_pclk            !      !           tx rx                   -           <default         J   '   (   )   *                                                      	  disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         ;      C     T        spiclk apb_pclk            !      !           tx rx                   .           <default         J   +   ,   -   .                                                        okay                  flash@0          jedec,spi-nor                                 i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         ;     M        <default         J   /        okay                        2           d   tpm@20           infineon,slb9645tt                                 i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         ;     O        <default         J   0      	  disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         ;     P        <default         J   1        okay                        2          ,   ts3a227e@3b          ti,ts3a227e             ;         &   2                       <default         J   3                   h         trackpad@15          elan,ekth3000                        &                          <default         J   4           5                  i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         ;     Q        <default         J   6      	  disabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                                 ;      M     U        baudclk apb_pclk               !      !           tx rx           <default         J   7   8   9        okay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                                 ;      N     V        baudclk apb_pclk               !      !           tx rx           <default         J   :        okay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                                 ;      O     W        baudclk apb_pclk            <default         J   ;        okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                                 ;      P     X        baudclk apb_pclk               !      !           tx rx           <default         J   <      	  disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                                 ;      Q     Y        baudclk apb_pclk               !   	   !   
        tx rx           <default         J   =      	  disabled          thermal-zones      reserve_thermal                   2          @   >          cpu_thermal            d        2          @   >      trips      cpu_alert0          P p        \           passive         h   ?      cpu_alert1          P $        \           passive         h   @      cpu_crit            P         \        	   critical             cooling-maps       map0            g   ?      0  l                              map1            g   @      0  l                        gpu_thermal            d        2          @   >      trips      gpu_alert0          P 4        \           passive         h   A      gpu_crit            P         \        	   critical             cooling-maps       map0            g   A        l   B               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           ;      H     Z        tsadc apb_pclk                      
  qtsadc-apb           <init default sleep          J   C        {   D           C                      E         H        okay                                  h   >      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              macirq eth_wake_irq            E      8  ;            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  B      
  qstmmaceth         	  disabled          usb@ff500000             generic-ehci                 P                                    ;                F        usb         okay                   usb@ff520000             generic-ohci                 R                         )           ;                F        usb       	  disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    ;             otg         0host               G      	  usb2-phy             8        okay             O      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    ;             otg         0host            f           x                      @   @               H      	  usb2-phy            okay                  z           H         O      usb@ff5c0000             generic-ehci                 \                                    ;           	  disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         ;     L        <default         J   I        okay                        2           d   pmic@1b          rockchip,rk808                      xin32k wifibt_32kin          &   2                       <default         J   J   K   L                          
                                                          M                   &           2           ?   5        L           Y   M        e   M        r                            h      regulators     DCDC_REG1           |vdd_arm                            q                    q        h   	   regulator-state-mem                   DCDC_REG2           |vdd_gpu                            5                    q        h      regulator-state-mem                   DCDC_REG3           |vcc135_ddr                       regulator-state-mem                   DCDC_REG4           |vcc_18                             w@         w@        h      regulator-state-mem                  ' w@         LDO_REG1          	  |vcc33_io                               2Z         2Z        h   5   regulator-state-mem                  ' 2Z         LDO_REG3            |vdd_10                             B@         B@   regulator-state-mem                  ' B@         LDO_REG7            |vdd10_lcd_pwren_h                              &%         &%   regulator-state-mem                   SWITCH_REG1       
  |vcc33_lcd                             h   c   regulator-state-mem                   LDO_REG6            |vcc18_codec                            w@         w@        h   d   regulator-state-mem                   LDO_REG4          	  |vccio_sd             w@         2Z        h      regulator-state-mem                   LDO_REG5          	  |vcc33_sd             2Z         2Z        h      regulator-state-mem                   LDO_REG8          
  |vcc33_ccd                              2Z         2Z   regulator-state-mem                   LDO_REG2            |mic_vcc                            w@         w@   regulator-state-mem                            i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         ;     N        <default         J   N        okay                        2              max98090@10          maxim,max98090                       &   O                       mclk            ;      q        <default         J   P        h            pwm@ff680000             rockchip,rk3288-pwm              h                 C           <default         J   Q        ;     _        pwm         okay            h         pwm@ff680010             rockchip,rk3288-pwm              h                C           <default         J   R        ;     _        pwm         okay            h         pwm@ff680020             rockchip,rk3288-pwm              h                 C           <default         J   S        ;     _        pwm       	  disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0               C           <default         J   T        ;     _        pwm       	  disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 h      power-controller          !   rockchip,rk3288-power-controller            N                                           h           
        h   h   power-domain@9              	        ;                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  b   U   V   W   X   Y   Z   [   \   ]      power-domain@11                     ;            o      p        b   ^   _      power-domain@12                     ;                   b   `      power-domain@13                     ;              b   a   b         reboot-mode          syscon-reboot-mode          i           pRB         |RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                    E        
                    H                                    j                k      $  #gׄ e  рxh рxh        h         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 h   E   edp-phy          rockchip,rk3288-dp-phy          ;      h        24m                     okay            h   x      io-domains        "   rockchip,rk3288-io-voltage-domain           okay               5                                 5        	   5        	   c        	            	,   d        	9         usbphy           rockchip,rk3288-usb-phy                                   okay       usb-phy@320                                 ;      ]        phyclk          
                        
  qphy-reset           h   H      usb-phy@334                        4        ;      ^        phyclk          
                        
  qphy-reset           h   F      usb-phy@348                        H        ;      _        phyclk          
                        
  qphy-reset           h   G            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               ;     p                O           okay          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                               	G            ;      T           
  mclk hclk              e           tx                  6           <default         J   f           E      	  disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                               	G                    5           ;      R             i2s_clk i2s_hclk               e       e           tx rx           <default         J   g        	X           	s           okay            h         crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            ;                 }              aclk hclk sclk apb_pclk                       qcrypto-rst          okay          iommu@ff900800           rockchip,iommu                       @                           iep_mmu         ;                   aclk iface          	          	  disabled          iommu@ff914000           rockchip,iommu                @            P                                   isp_mmu         ;                   aclk iface          	             	      	  disabled          rga@ff920000             rockchip,rk3288-rga                                                 ;                 j        aclk hclk sclk          	   h   	              i      l      m        qcore axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              ;                         aclk_vop dclk_vop hclk_vop          	   h   	              d      e      f        qaxi ahb dclk            	   i        okay       port                                      h      endpoint@0                       	   j        h         endpoint@1                      	   k        h   z      endpoint@2                      	   l        h   s      endpoint@3                      	   m        h   v            iommu@ff930300           rockchip,iommu                                                	  vopb_mmu            ;                   aclk iface          	   h   	        	            okay            h   i      vop@ff940000             rockchip,rk3288-vop                                                              ;                         aclk_vop dclk_vop hclk_vop          	   h   	                                  qaxi ahb dclk            	   n        okay       port                                      h      endpoint@0                       	   o        h         endpoint@1                      	   p        h   {      endpoint@2                      	   q        h   t      endpoint@3                      	   r        h   w            iommu@ff940300           rockchip,iommu                                                	  vopl_mmu            ;                   aclk iface          	   h   	        	            okay            h   n      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            ;      ~     d      	  ref pclk            	   h   	           E      	  disabled       ports      port                                 endpoint@0                       	   s        h   l      endpoint@1                      	   t        h   q               lvds@ff96c000            rockchip,rk3288-lvds                        @         ;     g      
  pclk_lvds           <lcdc            J   u        	   h   	           E      	  disabled       ports                                port@0                                            endpoint@0                       	   v        h   m      endpoint@1                      	   w        h   r               dp@ff970000          rockchip,rk3288-dp                       @                 b           ;      i     c        dp pclk            x        dp                o        qdp             E        okay            <default         J   y   ports                                port@0                                            endpoint@0                       	   z        h   k      endpoint@1                      	   {        h   p         port@1                                           endpoint@0                       	   |        h                  hdmi@ff980000            rockchip,rk3288-dw-hdmi                                          	G               E                g           ;     h      m      n        iahb isfr cec           	   h   	        okay            <default unwedge         J   }        {   ~        h      ports      port                                 endpoint@0                       	           h   j      endpoint@1                      	           h   o               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  vepu vdpu           ;                 
  aclk hclk           	           	   h         iommu@ff9a0800           rockchip,iommu                                                  vpu_mmu         ;                   aclk iface          	            	   h           h         iommu@ff9c0440           rockchip,iommu                @       @           @                o         	  hevc_mmu            ;                   aclk iface          	          	  disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         job mmu gpu         ;              
                      	   h           okay            	           h   B      gpu-opp-table            operating-points-v2         h      opp-100000000           {              ~      opp-200000000           {              ~      opp-300000000           {              B@      opp-400000000           {    ׄ                opp-600000000           {    #F                   qos@ffaa0000             syscon                                 h   a      qos@ffaa0080             syscon                                h   b      qos@ffad0000             syscon                                 h   V      qos@ffad0100             syscon                                h   W      qos@ffad0180             syscon                               h   X      qos@ffad0400             syscon                                h   Y      qos@ffad0480             syscon                               h   Z      qos@ffad0500             syscon                                h   U      qos@ffad0800             syscon                                h   [      qos@ffad0880             syscon                               h   \      qos@ffad0900             syscon               	                 h   ]      qos@ffae0000             syscon                                 h   `      qos@ffaf0000             syscon                                 h   ^      qos@ffaf0080             syscon                                h   _      efuse@ffb40000           rockchip,rk3288-efuse                                                           ;     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          	        	                       @                                 @             `                        	          h         pinctrl          rockchip,rk3288-pinctrl            E                                                      <default sleep           J                       {                  gpio0@ff750000           rockchip,gpio-bank               u                         Q           ;     @         
        
            	        	           
(PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L AP_LID_INT_L EC_IN_RW AC_PRESENT_AP RECOVERY_SW_L OTP_OUT HOST1_PWR_EN USBOTG_PWREN_H AP_WARM_RESET_H nFALUT2 I2C0_SDA_PMIC I2C0_SCL_PMIC SUSPEND_L USB_INT          h   2      gpio1@ff780000           rockchip,gpio-bank               x                         R           ;     A         
        
            	        	         gpio2@ff790000           rockchip,gpio-bank               y                         S           ;     B         
        
            	        	         M  
(CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L   BL_PWR_EN AVDD_1V8_DISP_EN            h         gpio3@ff7a0000           rockchip,gpio-bank               z                         T           ;     C         
        
            	        	           
(FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7         FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO         gpio4@ff7b0000           rockchip,gpio-bank               {                         U           ;     D         
        
            	        	           
(                UART0_RXD UART0_TXD UART0_CTS UART0_RTS SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE          h         gpio5@ff7c0000           rockchip,gpio-bank               |                         V           ;     E         
        
            	        	         A  
(            SPI0_CLK SPI0_CS0 SPI0_TXD SPI0_RXD    VCC50_HDMI_EN            h         gpio6@ff7d0000           rockchip,gpio-bank               }                         W           ;     F         
        
            	        	           
(I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H ALS_INT INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     SDMMC_D0 SDMMC_D1 SDMMC_D2 SDMMC_D3 SDMMC_CLK SDMMC_CMD         h   O      gpio7@ff7e0000           rockchip,gpio-bank               ~                         X           ;     G         
        
            	        	           
(LCDC_BL PWM_LOG BL_EN TRACKPAD_INT TPM_INT_H SDMMC_DET_L AP_FLASH_WP_L EC_INT CPU_NMI DVSOK SDMMC_WP EDP_HPD DVS1 nFALUT1 LCD_EN DVS2 VCC5V_GOOD_H I2C4_SDA_TP I2C4_SCL_TP I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD           h         gpio8@ff7f0000           rockchip,gpio-bank                                        Y           ;     H         
        
            	        	         ^  
(RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         
8                  hdmi-cec-c7         
8                  hdmi-ddc             
8                                h   }      hdmi-ddc-unwedge             
8                                 h   ~      vcc50-hdmi-en           
8                     h            pcfg-output-low          
F        h         pcfg-pull-up             
Q        h         pcfg-pull-down           
^        h         pcfg-pull-none           
m        h         pcfg-pull-none-12ma          
m        
z           h         suspend    global-pwroff           
8                      h         ddrio-pwroff            
8                     h         ddr0-retention          
8                     h         ddr1-retention          
8                   suspend-l-wake          
8                      h         suspend-l-sleep         
8                      h            edp    edp-hpd         
8                    h   y         i2c0       i2c0-xfer            
8                                  h   I         i2c1       i2c1-xfer            
8                                h   /         i2c2       i2c2-xfer            
8      	            
              h   N         i2c3       i2c3-xfer            
8                                h   0         i2c4       i2c4-xfer            
8                                h   1         i2c5       i2c5-xfer            
8                                h   6         i2s0       i2s0-bus          `  
8                                                                                 h   g         lcdc       lcdc-ctl          @  
8                                                        h   u         sdmmc      sdmmc-clk           
8                    h         sdmmc-cmd           
8                    h         sdmmc-cd            
8                  sdmmc-bus1          
8                  sdmmc-bus4        @  
8                                                        h         sdmmc-cd-disabled           
8                     h         sdmmc-cd-pin            
8                     h            sdio0      sdio0-bus1          
8                  sdio0-bus4        @  
8                                                        h         sdio0-cmd           
8                    h         sdio0-clk           
8                    h         sdio0-cd            
8                  sdio0-wp            
8                  sdio0-pwr           
8                  sdio0-bkpwr         
8                  sdio0-int           
8                  wifienable-h            
8                     h         bt-enable-l         
8                   bt-host-wake            
8                   bt-host-wake-l          
8                     h         bt-dev-wake-sleep           
8                     h         bt-dev-wake-awake           
8                     h         bt-dev-wake         
8                      sdio1      sdio1-bus1          
8                  sdio1-bus4        @  
8                                                      sdio1-cd            
8                  sdio1-wp            
8                  sdio1-bkpwr         
8                  sdio1-int           
8                  sdio1-cmd           
8                  sdio1-clk           
8                  sdio1-pwr           
8      	               emmc       emmc-clk            
8                    h         emmc-cmd            
8                    h         emmc-pwr            
8      	            emmc-bus1           
8                   emmc-bus4         @  
8                                                       emmc-bus8           
8                                                                                                         h          emmc-reset          
8      	               h            spi0       spi0-clk            
8                    h   "      spi0-cs0            
8                    h   %      spi0-tx         
8                    h   #      spi0-rx         
8                    h   $      spi0-cs1            
8                     spi1       spi1-clk            
8                    h   '      spi1-cs0            
8                    h   *      spi1-rx         
8                    h   )      spi1-tx         
8                    h   (         spi2       spi2-cs1            
8                  spi2-clk            
8                    h   +      spi2-cs0            
8                    h   .      spi2-rx         
8                    h   -      spi2-tx         
8      	              h   ,         uart0      uart0-xfer           
8                                h   7      uart0-cts           
8                    h   8      uart0-rts           
8                    h   9         uart1      uart1-xfer           
8                  	              h   :      uart1-cts           
8      
            uart1-rts           
8                     uart2      uart2-xfer           
8                                h   ;         uart3      uart3-xfer           
8                                h   <      uart3-cts           
8      	            uart3-rts           
8      
               uart4      uart4-xfer           
8                                h   =      uart4-cts           
8                  uart4-rts           
8                     tsadc      otp-pin         
8       
               h   C      otp-out         
8       
              h   D         pwm0       pwm0-pin            
8                     h   Q         pwm1       pwm1-pin            
8                    h   R         pwm2       pwm2-pin            
8                    h   S         pwm3       pwm3-pin            
8                    h   T         gmac       rgmii-pins          
8                                                                                                                                           	                                                rmii-pins           
8                                                                                                                                  spdif      spdif-tx            
8                    h   f         pcfg-pull-none-drv-8ma           
m        
z           h         pcfg-pull-up-drv-8ma             
Q        
z         pcfg-output-high             
        h         buttons    pwr-key-l           
8                      h         ap-lid-int-l            
8                      h            pmic       pmic-int-l          
8                      h   J      dvs-1           
8                     h   K      dvs-2           
8                     h   L         reboot     ap-warm-reset-h         
8                      h            recovery-switch    rec-mode-l          
8       	                tpm    tpm-int-h           
8                      write-protect      fw-wp-ap            
8                      codec      hp-det          
8                     h         int-codec           
8                     h   P      mic-det         
8                     h            headset    ts3a227e-int-l          
8                      h   3         backlight      bl_pwr_en           
8                     h         bl-en           
8                     h            lcd    lcd-en          
8                     h         avdd-1v8-disp-en            
8                     h            charger    ac-present-ap           
8                      h            cros-ec    ec-int          
8                     h   &         trackpad       trackpad-int            
8                     h   4         usb-host       host1-pwr-en            
8                      h         usbotg-pwren-h          
8                      h            buck-5v    drv-5v          
8                     h               chosen          
serial2:115200n8          memory           memory                                power-button          
   gpio-keys           <default         J      power           
Power              2              
   t        
   d                  gpio-restart             gpio-restart               2               <default         J           
         emmc-pwrseq          mmc-pwrseq-emmc         J           <default         
      	            h         sdio-pwrseq          mmc-pwrseq-simple           ;            
  ext_clock           <default         J           
                 h         vcc-5v           regulator-fixed         |vcc_5v                             LK@         LK@        
            
        
                  <default         J           h   M      vcc33-sys            regulator-fixed       
  |vcc33_sys                              2Z         2Z        
           h         vcc50-hdmi           regulator-fixed         |vcc50_hdmi                            
   M         
        
                  <default         J         vdd-logic            pwm-regulator         
  |vdd_logic           
                                   {                                           ~         p                sound         !   rockchip,rockchip-audio-max98090            <default         J              3VEYRON-I2S          B           Z           o   O                  O                                  backlight-regulator          regulator-fixed          
        
                  <default         J           |backlight_regulator         
             :        h         panel-regulator          regulator-fixed          
        
                  <default         J           |panel_regulator         
           h         vcc18-lcd            regulator-fixed          
        
                  <default         J         
  |vcc18_lcd                             
         backlight            pwm-backlight                                                                     <default         J           
        B@            '   
        <   
        M           h         panel            innolux,n116bge         okay            M           Z      panel-timing            l        d  V        l           y   <                                                                                     ports      port       endpoint            	           h   |               gpio-charger             gpio-charger            mains              2               <default         J         lid-switch        
   gpio-keys           <default         J      lid         
Lid            2                       
                       
            vccsys           regulator-fixed         |vccsys                            h         vcc5-host1-regulator             regulator-fixed          
        
   2               <default         J           |vcc5_host1                          vcc5v-otg-regulator          regulator-fixed          
        
   2               <default         J           |vcc5_host2                             	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 i2c20 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt ranges #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst clock-names status clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend ports max-frequency fifo-depth reset-names bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay cd-gpios rockchip,default-sample-phase sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply disable-wp pinctrl-names pinctrl-0 cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable marvell,wakeup-pin mmc-hs200-1_8v #io-channel-cells dmas dma-names google,cros-ec-spi-pre-delay spi-max-frequency google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap rx-sample-delay-ns i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended ti,micbias vcc-supply wakeup-source reg-shift reg-io-width polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size assigned-clocks assigned-clock-parents rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply vcc9-supply vcc11-supply dvs-gpios regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply sdcard-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios vin-supply enable-active-high gpio pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec startup-delay-us brightness-levels num-interpolated-steps default-brightness-level enable-gpios post-pwm-on-delay-ms pwm-off-delay-ms power-supply backlight hactive hfront-porch hback-porch hsync-len hsync-active vactive vfront-porch vback-porch vsync-len vsync-active charger-type linux,input-type 