     8  l   (            	  4                                                      %   amarula,vyasa-rk3288 rockchip,rk3288             &            7Amarula Vyasa-RK3288       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff140000            Q/i2c@ff660000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/mmc@ff0f0000            k/mmc@ff0c0000            q/mmc@ff0d0000            w/mmc@ff0e0000            }/serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp                cpu@500          cpu          arm,cortex-a12                                                            '  @        5              <  r        V   	        a         cpu@501          cpu          arm,cortex-a12                                                          '  @        5              <  r        V   	        a         cpu@502          cpu          arm,cortex-a12                                                          '  @        5              <  r        V   	        a         cpu@503          cpu          arm,cortex-a12                                                          '  @        5              <  r        V   	        a            cpu-opp-table            operating-points-v2          i        a      opp-126000000           t            {       opp-216000000           t             {       opp-312000000           t             {       opp-408000000           t    Q         {       opp-600000000           t    #F         {       opp-696000000           t    )|         { ~      opp-816000000           t    0,         { B@      opp-1008000000          t    <         {       opp-1200000000          t    G         {       opp-1416000000          t    Tfr         { O      opp-1512000000          t    ZJ         {        opp-1608000000          t    _"         { p         bus          simple-bus                                       dma-controller@ff250000          arm,pl330 arm,primecell              %        @                                                                   5            	  apb_pclk            a         dma-controller@ff600000          arm,pl330 arm,primecell              `        @                                                                    5            	  apb_pclk          	  disabled          dma-controller@ffb20000          arm,pl330 arm,primecell                      @                                                                    5            	  apb_pclk            a   [         reserved-memory                                      dma-unusable@fe000000                                   oscillator           fixed-clock         n6         xin24m                      a   
      timer            arm,armv7-timer                0                                 
          n6          4      timer@ff810000           rockchip,rk3288-timer                                          H           5     a   
        pclk timer        display-subsystem            rockchip,display-subsystem          K            mmc@ff0c0000             rockchip,rk3288-dw-mshc         Qр         5           D      r      v        biu ciu ciu-drive ciu-sample            _                                            @                        jreset           okay            v                                                 default                                                 mmc@ff0d0000             rockchip,rk3288-dw-mshc         Qр         5           E      s      w        biu ciu ciu-drive ciu-sample            _                   !                        @                        jreset         	  disabled          mmc@ff0e0000             rockchip,rk3288-dw-mshc         Qр         5           F      t      x        biu ciu ciu-drive ciu-sample            _                   "                        @                        jreset         	  disabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         Qр         5           G      u      y        biu ciu ciu-drive ciu-sample            _                   #                        @                        jreset           okay            v                             default                                      saradc@ff100000          rockchip,saradc                                       $                      5      I     [        saradc apb_pclk                W        jsaradc-apb        	  disabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      A     R        spiclk apb_pclk                             tx rx                   ,           default                                                                           	  disabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      B     S        spiclk apb_pclk                             tx rx                   -           default                                                                            	  disabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         5      C     T        spiclk apb_pclk                             tx rx                   .           default            !   "   #   $                                                      	  disabled          i2c@ff140000             rockchip,rk3288-i2c                                       >                                     i2c         5     M        default            %      	  disabled          i2c@ff150000             rockchip,rk3288-i2c                                       ?                                     i2c         5     O        default            &      	  disabled          i2c@ff160000             rockchip,rk3288-i2c                                       @                                     i2c         5     P        default            '      	  disabled          i2c@ff170000             rockchip,rk3288-i2c                                       A                                     i2c         5     Q        default            (        okay            a   q      serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         7                       *           5      M     U        baudclk apb_pclk                                tx rx           default            )      	  disabled          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         8                       *           5      N     V        baudclk apb_pclk                                tx rx           default            *      	  disabled          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart                i                         9                       *           5      O     W        baudclk apb_pclk            default            +        okay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         :                       *           5      P     X        baudclk apb_pclk                                tx rx           default            ,      	  disabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                         ;                       *           5      Q     Y        baudclk apb_pclk                  	      
        tx rx           default            -      	  disabled          thermal-zones      reserve_thermal         7          M          [   .          cpu_thermal         7   d        M          [   .      trips      cpu_alert0          k p        w           passive         a   /      cpu_alert1          k $        w           passive         a   0      cpu_crit            k _        w        	   critical             cooling-maps       map0               /      0                                map1               0      0                          gpu_thermal         7   d        M          [   .      trips      gpu_alert0          k p        w           passive         a   1      gpu_crit            k _        w        	   critical             cooling-maps       map0               1           2               tsadc@ff280000           rockchip,rk3288-tsadc                (                         %           5      H     Z        tsadc apb_pclk                       
  jtsadc-apb           init default sleep             3           4           3                      5         s        okay                                  a   .      ethernet@ff290000            rockchip,rk3288-gmac                 )                                              macirq eth_wake_irq            5      8  5            f      g      c                 ]      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  jstmmaceth           okay            &              6   6        Minput           default            7   8   9   :        Z   ;        ergmii            n              ' B@           <                 0                 usb@ff500000             generic-ehci                 P                                    5                =        usb         okay          usb@ff520000             generic-ohci                 R                         )           5                =        usb       	  disabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                T                                    5             otg         host               >      	  usb2-phy                     okay            default            ?      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2                X                                    5             otg         otg                              
            @   @               @      	  usb2-phy            okay               A      usb@ff5c0000             generic-ehci                 \                                    5           	  disabled          i2c@ff650000             rockchip,rk3288-i2c              e                         <                                     i2c         5     L        default            B        okay                pmic@1b          rockchip,rk808                       &   C                                  xin32k rk808-clkout2            default            D   E         %         F        T   F        `   F        l   F        x   F           F           F                      F           F           F              regulators     DCDC_REG1           vdd_arm          q         p                  .        a   	   regulator-state-mem          @         DCDC_REG2           vdd_gpu          P                           .        a   v   regulator-state-mem          Y        q B@         DCDC_REG3           vcc_ddr                   .   regulator-state-mem          Y         DCDC_REG4           vcc_io           2Z         2Z                  .        a      regulator-state-mem          Y        q 2Z         LDO_REG1            vcc_tp           2Z         2Z                  .   regulator-state-mem          Y        q 2Z         LDO_REG2          
  vcc_codec            2Z         2Z                  .   regulator-state-mem          @         LDO_REG3            vdd_10           B@         B@                  .   regulator-state-mem          Y        q B@         LDO_REG4            vcc_gps          w@         w@                  .   regulator-state-mem          Y        q w@         LDO_REG5          	  vccio_sd             w@         2Z                  .        a      regulator-state-mem          Y        q 2Z         LDO_REG6          
  vdd10_lcd            B@         B@                  .   regulator-state-mem          Y        q B@         LDO_REG7            vcc_18           w@         w@                  .        a   Z   regulator-state-mem          Y        q w@         LDO_REG8          
  vcc18_lcd            w@         w@                  .   regulator-state-mem          Y        q w@         SWITCH_REG1         vcc_sd           2Z         2Z                  .        a      regulator-state-mem          Y         SWITCH_REG2         vcc_lan          2Z         2Z                  .        a   ;   regulator-state-mem          Y                  i2c@ff660000             rockchip,rk3288-i2c              f                         =                                     i2c         5     N        default            G      	  disabled          pwm@ff680000             rockchip,rk3288-pwm              h                            default            H        5     _        pwm       	  disabled          pwm@ff680010             rockchip,rk3288-pwm              h                           default            I        5     _        pwm       	  disabled          pwm@ff680020             rockchip,rk3288-pwm              h                            default            J        5     _        pwm       	  disabled          pwm@ff680030             rockchip,rk3288-pwm              h 0                          default            K        5     _        pwm       	  disabled          sram@ff700000         
   mmio-sram                p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                             sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram               r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd                s                 a      power-controller          !   rockchip,rk3288-power-controller                                                 &      h        6   
        a   ^   power-domain@9              	        5                                                                                   c     h     g     f     d     e      h      i      l      k      j      $     L   M   N   O   P   Q   R   S   T      power-domain@11                     5            o      p           U   V      power-domain@12                     5                      W      power-domain@13                     5                 X   Y         reboot-mode          syscon-reboot-mode                     RB         RB        RB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon              t               clock-controller@ff760000            rockchip,rk3288-cru              v                    5                            H  &                                  j                k      $  #gׄ e  рxh рxh        a         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd                w                 a   5   edp-phy          rockchip,rk3288-dp-phy          5      h        24m                   	  disabled            a   n      io-domains        "   rockchip,rk3288-io-voltage-domain           okay               Z        *           4           ?   Z        M   ;        [           i           y                         Z      usbphy           rockchip,rk3288-usb-phy                                   okay       usb-phy@320                                 5      ]        phyclk                                   
  jphy-reset           a   @      usb-phy@334                        4        5      ^        phyclk                                   
  jphy-reset           a   =      usb-phy@348                        H        5      _        phyclk                                   
  jphy-reset           a   >            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                               5     p                O           okay          sound@ff88b0000       ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                           5      T           
  mclk hclk              [           tx                  6           default            \           5      	  disabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                   5           5      R             i2s_clk i2s_hclk               [       [           tx rx           default            ]                            	  disabled          crypto@ff8a0000          rockchip,rk3288-crypto                       @                 0            5                 }              aclk hclk sclk apb_pclk                        jcrypto-rst          okay          iommu@ff900800           rockchip,iommu                       @                           iep_mmu         5                   aclk iface                    	  disabled          iommu@ff914000           rockchip,iommu                @            P                                   isp_mmu         5                   aclk iface                             	  disabled          rga@ff920000             rockchip,rk3288-rga                                                 5                 j        aclk hclk sclk             ^   	               i      l      m        jcore axi ahb          vop@ff930000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             ^   	               d      e      f        jaxi ahb dclk               _        okay       port                                      a      endpoint@0                       "   `        a   r      endpoint@1                      "   a        a   o      endpoint@2                      "   b        a   i      endpoint@3                      "   c        a   l            iommu@ff930300           rockchip,iommu                                                	  vopb_mmu            5                   aclk iface             ^   	                    okay            a   _      vop@ff940000             rockchip,rk3288-vop                                                              5                         aclk_vop dclk_vop hclk_vop             ^   	                                   jaxi ahb dclk               d        okay       port                                      a      endpoint@0                       "   e        a   s      endpoint@1                      "   f        a   p      endpoint@2                      "   g        a   j      endpoint@3                      "   h        a   m            iommu@ff940300           rockchip,iommu                                                	  vopl_mmu            5                   aclk iface             ^   	                    okay            a   d      mipi@ff960000         *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                        @                            5      ~     d      	  ref pclk               ^   	           5      	  disabled       ports      port                                 endpoint@0                       "   i        a   b      endpoint@1                      "   j        a   g               lvds@ff96c000            rockchip,rk3288-lvds                        @         5     g      
  pclk_lvds           lcdc               k           ^   	           5      	  disabled       ports                                port@0                                            endpoint@0                       "   l        a   c      endpoint@1                      "   m        a   h               dp@ff970000          rockchip,rk3288-dp                       @                 b           5      i     c        dp pclk            n        dp                 o        jdp             5      	  disabled       ports                                port@0                                            endpoint@0                       "   o        a   a      endpoint@1                      "   p        a   f               hdmi@ff980000            rockchip,rk3288-dw-hdmi                               *                          5                g           5     h      m      n        iahb isfr cec              ^   	        okay            2   q   ports      port                                 endpoint@0                       "   r        a   `      endpoint@1                      "   s        a   e               video-codec@ff9a0000             rockchip,rk3288-vpu                                       	          
         
  vepu vdpu           5                 
  aclk hclk              t           ^         iommu@ff9a0800           rockchip,iommu                                                  vpu_mmu         5                   aclk iface                         ^           a   t      iommu@ff9c0440           rockchip,iommu                @       @           @                o         	  hevc_mmu            5                   aclk iface                    	  disabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                              $                                         job mmu gpu         5                 u                      ^           okay            >   v        a   2      gpu-opp-table            operating-points-v2         a   u   opp-100000000           t             { ~      opp-200000000           t             { ~      opp-300000000           t             { B@      opp-400000000           t    ׄ         {       opp-600000000           t    #F         {          qos@ffaa0000             syscon                                 a   X      qos@ffaa0080             syscon                                a   Y      qos@ffad0000             syscon                                 a   M      qos@ffad0100             syscon                                a   N      qos@ffad0180             syscon                               a   O      qos@ffad0400             syscon                                a   P      qos@ffad0480             syscon                               a   Q      qos@ffad0500             syscon                                a   L      qos@ffad0800             syscon                                a   R      qos@ffad0880             syscon                               a   S      qos@ffad0900             syscon               	                 a   T      qos@ffae0000             syscon                                 a   W      qos@ffaf0000             syscon                                 a   U      qos@ffaf0080             syscon                                a   V      efuse@ffb40000           rockchip,rk3288-efuse                                                           5     q        pclk_efuse     cpu-id@7                         cpu_leakage@17                          interrupt-controller@ffc01000            arm,gic-400          J        _                       @                                 @             `                        	          a         pinctrl          rockchip,rk3288-pinctrl            5                                                 gpio0@ff750000           rockchip,gpio-bank               u                         Q           5     @         p                    J        _           a   C      gpio1@ff780000           rockchip,gpio-bank               x                         R           5     A         p                    J        _         gpio2@ff790000           rockchip,gpio-bank               y                         S           5     B         p                    J        _         gpio3@ff7a0000           rockchip,gpio-bank               z                         T           5     C         p                    J        _         gpio4@ff7b0000           rockchip,gpio-bank               {                         U           5     D         p                    J        _           a   <      gpio5@ff7c0000           rockchip,gpio-bank               |                         V           5     E         p                    J        _         gpio6@ff7d0000           rockchip,gpio-bank               }                         W           5     F         p                    J        _         gpio7@ff7e0000           rockchip,gpio-bank               ~                         X           5     G         p                    J        _           a   ~      gpio8@ff7f0000           rockchip,gpio-bank                                        Y           5     H         p                    J        _           a         hdmi       hdmi-cec-c0                     w      hdmi-cec-c7                     w      hdmi-ddc                         w            w      hdmi-ddc-unwedge                          x            w      vcc50-hdmi-en                        w        a            pcfg-output-low                  a   x      pcfg-pull-up                     a   y      pcfg-pull-down                   a   z      pcfg-pull-none                   a   w      pcfg-pull-none-12ma                             a   {      suspend    global-pwroff                         w        a   E      ddrio-pwroff                         w      ddr0-retention                       y      ddr1-retention                       y         edp    edp-hpd                     z         i2c0       i2c0-xfer                         w             w        a   B         i2c1       i2c1-xfer                        w            w        a   %         i2c2       i2c2-xfer                  	      w      
      w        a   G         i2c3       i2c3-xfer                        w            w        a   &         i2c4       i2c4-xfer                        w            w        a   '         i2c5       i2c5-xfer                        w            w        a   (         i2s0       i2s0-bus          `               w            w            w            w            w            w        a   ]         lcdc       lcdc-ctl          @              w            w            w            w        a   k         sdmmc      sdmmc-clk                       w        a         sdmmc-cmd                       y        a         sdmmc-cd                        y        a         sdmmc-bus1                      y      sdmmc-bus4        @              y            y            y            y        a            sdio0      sdio0-bus1                      y      sdio0-bus4        @              y            y            y            y      sdio0-cmd                       y      sdio0-clk                       w      sdio0-cd                        y      sdio0-wp                        y      sdio0-pwr                       y      sdio0-bkpwr                     y      sdio0-int                       y         sdio1      sdio1-bus1                      y      sdio1-bus4        @              y            y            y            y      sdio1-cd                        y      sdio1-wp                        y      sdio1-bkpwr                     y      sdio1-int                       y      sdio1-cmd                       y      sdio1-clk                       w      sdio1-pwr                 	      y         emmc       emmc-clk                        w        a         emmc-cmd                        y        a         emmc-pwr                  	      y        a         emmc-bus1                        y      emmc-bus4         @               y            y            y            y      emmc-bus8                        y            y            y            y            y            y            y            y        a            spi0       spi0-clk                        y        a         spi0-cs0                        y        a         spi0-tx                     y        a         spi0-rx                     y        a         spi0-cs1                        y         spi1       spi1-clk                        y        a         spi1-cs0                        y        a          spi1-rx                     y        a         spi1-tx                     y        a            spi2       spi2-cs1                        y      spi2-clk                        y        a   !      spi2-cs0                        y        a   $      spi2-rx                     y        a   #      spi2-tx               	      y        a   "         uart0      uart0-xfer                       y            w        a   )      uart0-cts                       y      uart0-rts                       w         uart1      uart1-xfer                       y      	      w        a   *      uart1-cts                 
      y      uart1-rts                       w         uart2      uart2-xfer                       y            w        a   +         uart3      uart3-xfer                       y            w        a   ,      uart3-cts                 	      y      uart3-rts                 
      w         uart4      uart4-xfer                       y            w        a   -      uart4-cts                       y      uart4-rts                       w         tsadc      otp-pin                
       w        a   3      otp-out                
      w        a   4         pwm0       pwm0-pin                         w        a   H         pwm1       pwm1-pin                        w        a   I         pwm2       pwm2-pin                        w        a   J         pwm3       pwm3-pin                        w        a   K         gmac       rgmii-pins                      w            w            w            w            {            {            {            {             w            w            w      	      {            {            w            w        a   7      rmii-pins                       w            w            w            w             w            w            w            w            w            w      phy-int                	       y        a   :      phy-pmeb                          y        a   9      phy-rst                      |        a   8         spdif      spdif-tx                        w        a   \         pcfg-output-high                     a   |      pmic       pmic-int                          y        a   D         usb_host       phy-pwr-en                	       |        a   ?      usb2-pwr-en               	       w        a            usb_otg    otg-vbus-drv                          w        a               chosen          /serial@ff690000          memory                                   memory        dc12-vbat            regulator-fixed       
  dc12_vbat                                         .        a   }      vboot-3v3            regulator-fixed       
  vboot_3v3            2Z         2Z                  .           }      vsys-regulator           regulator-fixed         vcc_sys          8u          8u                   .           }        a   F      vboot-5v             regulator-fixed       	  vboot_sv             LK@         LK@                  .           }      v3g-3v3          regulator-fixed         v3g_3v3          2Z         2Z                  .           }      vsus-5v          regulator-fixed         vsus_5v          LK@         LK@                  .                   a         vcc50-hdmi           regulator-fixed         vcc50_hdmi           	            ~               default                              .                 vusb1-5v             regulator-fixed       	  vusb1_5v             	            C               default                     LK@         LK@                   a   A      vusb2-5v             regulator-fixed       	  vusb2_5v             	               	            default                     LK@         LK@                  .                 external-gmac-clock          fixed-clock                     sY@      	  ext_gmac            a   6         	#address-cells #size-cells compatible interrupt-parent model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mshc0 mshc1 mshc2 mshc3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks dynamic-power-coefficient cpu-supply phandle opp-shared opp-hz opp-microvolt ranges #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst clock-names status clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend ports max-frequency fifo-depth reset-names bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay disable-wp pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply non-removable #io-channel-cells dmas dma-names reg-shift reg-io-width polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-supply phy-mode snps,reset-active-low snps,reset-delays-us snps,reset-gpio tx_delay rx_delay phys phy-names dr_mode snps,reset-phy-on-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size vbus-supply rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells audio-supply bb-supply dvp-supply flash0-supply flash1-supply gpio30-supply gpio1830-supply lcdc-supply sdcard-supply wifi-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint ddc-i2c-bus mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path vin-supply enable-active-high 