  J   8  EH   (            n  E                                                         Altera SOCFPGA Arria 10       "   !altr,socfpga-arria10 altr,socfpga      cpus                                       ,altr,socfpga-a10-smp       cpu@0            !arm,cortex-a9            :cpu          F             J         cpu@1            !arm,cortex-a9            :cpu          F            J            intc@ffffd000            !arm,cortex-a9-gic            [             l         F                          soc                                   !simple-bus           :soc                          amba             !simple-bus                                        pdma@ffda1000            !arm,pl330 arm,primecell          F          l          S          T          U          V          W          X          Y          Z          [                                                          	   apb_pclk                   0      5         dma dma-ocp                       base_fpga_region                                      !fpga-region                   clkmgr@ffd04000          !altr,clk-mgr             F@       clocks                               cb_intosc_hs_div2_clk                        !fixed-clock                   cb_intosc_ls_clk                         !fixed-clock                   f2s_free_clk                         !fixed-clock                   osc1                         !fixed-clock         }x@                  main_pll@40                                                !altr,socfpga-a10-pll-clock                             F   @            	   main_mpu_base_clk                        !altr,socfpga-a10-perip-clk              	          @                         main_noc_base_clk                        !altr,socfpga-a10-perip-clk              	          D                         main_emaca_clk@68                        !altr,socfpga-a10-perip-clk              	         F   h      main_emacb_clk@6c                        !altr,socfpga-a10-perip-clk              	         F   l      main_emac_ptp_clk@70                         !altr,socfpga-a10-perip-clk              	         F   p      main_gpio_db_clk@74                      !altr,socfpga-a10-perip-clk              	         F   t      main_sdmmc_clk@78                        !altr,socfpga-a10-perip-clk              	         F   x                  main_s2f_usr0_clk@7c                         !altr,socfpga-a10-perip-clk              	         F   |      main_s2f_usr1_clk@80                         !altr,socfpga-a10-perip-clk              	         F                     main_hmc_pll_ref_clk@84                      !altr,socfpga-a10-perip-clk              	         F         main_periph_ref_clk@9c                       !altr,socfpga-a10-perip-clk              	         F               
         periph_pll@c0                                                  !altr,socfpga-a10-pll-clock                       
         F                  peri_mpu_base_clk                        !altr,socfpga-a10-perip-clk                        @                        peri_noc_base_clk                        !altr,socfpga-a10-perip-clk                        D                        peri_emaca_clk@e8                        !altr,socfpga-a10-perip-clk                       F         peri_emacb_clk@ec                        !altr,socfpga-a10-perip-clk                       F         peri_emac_ptp_clk@f0                         !altr,socfpga-a10-perip-clk                       F                     peri_gpio_db_clk@f4                      !altr,socfpga-a10-perip-clk                       F         peri_sdmmc_clk@f8                        !altr,socfpga-a10-perip-clk                       F                     peri_s2f_usr0_clk@fc                         !altr,socfpga-a10-perip-clk                       F         peri_s2f_usr1_clk@100                        !altr,socfpga-a10-perip-clk                       F                     peri_hmc_pll_ref_clk@104                         !altr,socfpga-a10-perip-clk                       F           mpu_free_clk@60                      !altr,socfpga-a10-perip-clk                                   F   `                  noc_free_clk@64                      !altr,socfpga-a10-perip-clk                                   F   d                  s2f_user1_free_clk@104                       !altr,socfpga-a10-perip-clk                                   F        sdmmc_free_clk@f8                        !altr,socfpga-a10-perip-clk                                  '            F                     l4_sys_free_clk                      !altr,socfpga-a10-perip-clk                      '               *      l4_main_clk                      !altr,socfpga-a10-gate-clk                                         5   H                     l4_mp_clk                        !altr,socfpga-a10-gate-clk                                        5   H                     l4_sp_clk                        !altr,socfpga-a10-gate-clk                                        5   H                     mpu_periph_clk                       !altr,socfpga-a10-gate-clk                       '           5   H                )      sdmmc_clk                        !altr,socfpga-a10-gate-clk                       5              >                   "      qspi_clk                         !altr,socfpga-a10-gate-clk                       5                  (      nand_x_clk                       !altr,socfpga-a10-gate-clk                       5      
                  nand_ecc_clk                         !altr,socfpga-a10-gate-clk                       5      
            $      nand_clk                         !altr,socfpga-a10-gate-clk                       '           5      
            #      spi_m_clk                        !altr,socfpga-a10-gate-clk                       5      	                  usb_clk                      !altr,socfpga-a10-gate-clk                       5                  +      s2f_usr1_clk                         !altr,socfpga-a10-gate-clk                       5                  stmmac-axi-config           H           X           h                                             ethernet@ff800000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         r      D             F                      \           macirq                                                             @                         stmmaceth ptp_ref                         (         stmmaceth stmmaceth-ocp                    okay            rgmii                               *            7            D            Q          ^          k          x                        D                                          &      ethernet@ff802000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         r      H            F                      ]           macirq                                                             @                         stmmaceth ptp_ref                  !      )         stmmaceth stmmaceth-ocp                  	  disabled          ethernet@ff804000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         r      L            F@                     ^           macirq                                                             @                         stmmaceth ptp_ref                  "      *         stmmaceth stmmaceth-ocp                  	  disabled          gpio@ffc02900                                      !snps,dw-apb-gpio             F)                   X      	  disabled       gpio-controller@0            !snps,dw-apb-gpio-port                                           F              l         [                   p            gpio@ffc02a00                                      !snps,dw-apb-gpio             F*                   Y        okay       gpio-controller@0            !snps,dw-apb-gpio-port                                           F              l         [                   q               !         gpio@ffc02b00                                      !snps,dw-apb-gpio             F+                   Z      	  disabled       gpio-controller@0            !snps,dw-apb-gpio-port                                           F              l         [                   r            fpga-mgr@ffd03000            !altr,socfpga-a10-fpga-mgr            F0                                             fpgamgr                   i2c@ffc02200                                       !snps,designware-i2c          F"                    i                              H      	  disabled          i2c@ffc02300                                       !snps,designware-i2c          F#                    j                              I        okay                       p          p   adc@14           !lltc,ltc2497             F                     adc@16           !lltc,ltc2497             F                     eeprom@51            !atmel,24c32          F   Q        ,          rtc@68           !dallas,ds1339            F   h      ltc@5c           !ltc2977          F   \      temp@4c          !maxim,max1619            F   L         i2c@ffc02400                                       !snps,designware-i2c          F$                    k                              J      	  disabled          i2c@ffc02500                                       !snps,designware-i2c          F%                    l                              K      	  disabled          i2c@ffc02600                                       !snps,designware-i2c          F&                    m                              L      	  disabled          spi@ffda4000             !snps,dw-apb-ssi                                    F@                    e           5                              1         spi       	  disabled          spi@ffda5000             !snps,dw-apb-ssi                                    FP                    f           5           <               K                                  2         spi         okay       resource-manager@0           !altr,a10sr           F            Z             !                         l         [      gpio-controller          !altr,a10sr-gpio                                 -      reset-controller             !altr,a10sr-reset            l               sdr@ffcfb100             !altr,sdr-ctl syscon          Fϱ                %      cache-controller@fffff000            !arm,pl310-cache          F                                y                                                            dwmmc0@ff808000                                    !altr,socfpga-dw-mshc             F                    b                             "         biu ciu                '      	  disabled          nand@ffb90000                                      !altr,socfpga-denali-nand             F                  nand_data denali_reg                    c               #      $         nand nand_x ecc                %      	  disabled          sram@ffe00000         
   !mmio-sram            F           eccmgr           !altr,socfpga-a10-ecc-manager            r                                                                    l         [                sdramedac            !altr,sdram-edac-a10            %                  1         l2-ecc@ffd06010          !altr,socfpga-a10-l2-ecc          F`                                ocram-ecc@ff8c3000           !altr,socfpga-a10-ocram-ecc           F0                      !         emac0-rx-ecc@ff8c0800            !altr,socfpga-eth-mac-ecc             F               &                  $         emac0-tx-ecc@ff8c0c00            !altr,socfpga-eth-mac-ecc             F               &                  %         dma-ecc@ff8c8000             !altr,socfpga-dma-ecc             F                            
      *         usb0-ecc@ff8c8800            !altr,socfpga-usb-ecc             F               '                  "            spi@ff809000             !cdns,qspi-nor                                      F                         d                                                 (               &      .         qspi qspi-ocp           okay       n25q00@0                                      !micron,mt25qu02g jedec,spi-nor           F            Z          #        2           A           Q           a   2        o   2        }                 partition@qspi-boot         Boot and fpga data           F    r        partition@qspi-rootfs           Root Filesystem - JFFS2          Fr                rstmgr@ffd05000         l            !altr,rst-mgr             FP                                  snoop-control-unit@ffffc000          !arm,cortex-a9-scu            F          sysmgr@ffd06000          !altr,sys-mgr syscon          F`            b0                  timer@ffffc600           !arm,cortex-a9-twd-timer          F                                 )      timer0@ffc02700          !snps,dw-apb-timer                   s            F'                         timer                  D         timer         timer1@ffc02800          !snps,dw-apb-timer                   t            F(                         timer                  E         timer         timer2@ffd00000          !snps,dw-apb-timer                   u            F                 *         timer                  B         timer         timer3@ffd00100          !snps,dw-apb-timer                   v            F                *         timer                  C         timer         serial0@ffc02000             !snps,dw-apb-uart             F                     n                                                    P      	  disabled          serial1@ffc02100             !snps,dw-apb-uart             F!                    o                                                    Q        okay          usbphy                       !usb-nop-xceiv           okay                ,      usb@ffb00000          
   !snps,dwc2            F                    _               +         otg                #         dwc2               ,      	  usb2-phy            okay                         '      usb@ffb40000          
   !snps,dwc2            F                    `               +         otg                $         dwc2               ,      	  usb2-phy          	  disabled          watchdog@ffd00200            !snps,dw-wdt          F                    w               *               @      	  disabled          watchdog@ffd00300            !snps,dw-wdt          F                    x               *               A        okay             aliases         /soc/ethernet@ff800000          /soc/serial1@ffc02100         chosen          earlyprintk         #serial0:115200n8          memory@0             :memory           F    @         a10leds       
   !gpio-leds      a10sr_led0          a10sr-led0             -             a10sr_led1          a10sr-led1             -            a10sr_led2          a10sr-led2             -            a10sr_led3          a10sr-led3             -               033-v-ref            !regulator-fixed         /0.33V           > 	        V 	                     	#address-cells #size-cells model compatible enable-method device_type reg next-level-cache #interrupt-cells interrupt-controller phandle interrupt-parent ranges interrupts #dma-cells #dma-channels #dma-requests clocks clock-names resets reset-names fpga-mgr #clock-cells clock-frequency div-reg fixed-divider clk-gate clk-phase snps,wr_osr_lmt snps,rd_osr_lmt snps,blen altr,sysmgr-syscon interrupt-names mac-address snps,multicast-filter-bins snps,perfect-filter-entries tx-fifo-depth rx-fifo-depth snps,axi-config status phy-mode phy-addr txd0-skew-ps txd1-skew-ps txd2-skew-ps txd3-skew-ps rxd0-skew-ps rxd1-skew-ps rxd2-skew-ps rxd3-skew-ps txen-skew-ps txc-skew-ps rxdv-skew-ps rxc-skew-ps max-frame-size gpio-controller #gpio-cells snps,nr-gpios i2c-sda-falling-time-ns i2c-scl-falling-time-ns vref-supply pagesize num-cs tx-dma-channel rx-dma-channel spi-max-frequency #reset-cells cache-unified cache-level prefetch-data prefetch-instr arm,shared-override reg-names altr,sdr-syscon altr,ecc-parent cdns,fifo-depth cdns,fifo-width cdns,trigger-address m25p,fast-read cdns,page-size cdns,block-size cdns,read-delay cdns,tshsl-ns cdns,tsd2d-ns cdns,tchsh-ns cdns,tslch-ns label altr,modrst-offset cpu1-start-addr reg-shift reg-io-width #phy-cells phys phy-names disable-over-current ethernet0 serial0 bootargs stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt 