Ðþí  K‰   H  F0   (            Y  Eè                                                                        Terasic DE-0(Atlas)       5   !terasic,de0-atlas altr,socfpga-cyclone5 altr,socfpga       aliases          ,/soc/serial0@ffc02000            4/soc/serial1@ffc03000            </soc/timer0@ffc08000             C/soc/timer1@ffc09000             J/soc/timer2@ffd00000             Q/soc/timer3@ffd01000             X/soc/ethernet@ff702000        cpus                                       baltr,socfpga-smp       cpu@0            !arm,cortex-a9            pcpu          |             €            ‘         cpu@1            !arm,cortex-a9            pcpu          |            €            ‘            pmu@ff111000             !arm,cortex-a9-pmu            ™            ª       °          ±            µ               |ÿ    ÿ0          intc@fffed000            !arm,cortex-a9-gic            È             Ù         |ÿþÐ    ÿþÁ             ‘         soc                                   !simple-bus           psoc          ™             î   amba             !simple-bus                                     î   pdma@ffe01000            !arm,pl330 arm,primecell          |ÿà          `   ª       h          i          j          k          l          m          n          o            õ                                            	  #apb_pclk            /      <        6dma          ‘   4         base_fpga_region             !fpga-region         B                                  can@ffc00000             !bosch,d_can          |ÿÀ           0   ª       ƒ          „          …          †                      /      7      	  Kdisabled          can@ffc01000             !bosch,d_can          |ÿÀ          0   ª       ‡          ˆ          ‰          Š              	        /      8      	  Kdisabled          clkmgr@ffd04000          !altr,clk-mgr             |ÿÐ@       clocks                               osc1            R             !fixed-clock         _}x@         ‘   
      osc2            R             !fixed-clock          ‘         f2s_periph_ref_clk          R             !fixed-clock          ‘         f2s_sdram_ref_clk           R             !fixed-clock          ‘         main_pll@40                                   R             !altr,socfpga-pll-clock             
         |   @         ‘      mpuclk@48           R             !altr,socfpga-perip-clk                     o   à       	         |   H         ‘         mainclk@4c          R             !altr,socfpga-perip-clk                     o   ä       	         |   L         ‘         dbg_base_clk@50         R             !altr,socfpga-perip-clk                
        o   è       	         |   P         ‘         main_qspi_clk@54            R             !altr,socfpga-perip-clk                      |   T         ‘         main_nand_sdmmc_clk@58          R             !altr,socfpga-perip-clk                      |   X         ‘         cfg_h2f_usr0_clk@5c         R             !altr,socfpga-perip-clk                      |   \         ‘            periph_pll@80                                     R             !altr,socfpga-pll-clock             
               |   €         ‘      emac0_clk@88            R             !altr,socfpga-perip-clk                      |   ˆ         ‘         emac1_clk@8c            R             !altr,socfpga-perip-clk                      |   Œ         ‘         per_qsi_clk@90          R             !altr,socfpga-perip-clk                      |            ‘          per_nand_mmc_clk@94         R             !altr,socfpga-perip-clk                      |   ”         ‘         per_base_clk@98         R             !altr,socfpga-perip-clk                      |   ˜         ‘         h2f_usr1_clk@9c         R             !altr,socfpga-perip-clk                      |   œ         ‘            sdram_pll@c0                                      R             !altr,socfpga-pll-clock             
               |   À         ‘      ddr_dqs_clk@c8          R             !altr,socfpga-perip-clk                      |   È         ‘   !      ddr_2x_dqs_clk@cc           R             !altr,socfpga-perip-clk                      |   Ì         ‘   "      ddr_dq_clk@d0           R             !altr,socfpga-perip-clk                      |   Ð         ‘   #      h2f_usr2_clk@d4         R             !altr,socfpga-perip-clk                      |   Ô         ‘   $         mpu_periph_clk          R             !altr,socfpga-perip-clk                     w            ‘   3      mpu_l2_ram_clk          R             !altr,socfpga-perip-clk                     w         l4_main_clk         R             !altr,socfpga-gate-clk                      …   `             ‘         l3_main_clk         R             !altr,socfpga-perip-clk                     w         l3_mp_clk           R             !altr,socfpga-gate-clk                      o   d               …   `            ‘         l3_sp_clk           R             !altr,socfpga-gate-clk                      o   d            l4_mp_clk           R             !altr,socfpga-gate-clk                         o   d              …   `            ‘   (      l4_sp_clk           R             !altr,socfpga-gate-clk                         o   d              …   `            ‘   )      dbg_at_clk          R             !altr,socfpga-gate-clk                      o   h               …   `            ‘         dbg_clk         R             !altr,socfpga-gate-clk                      o   h              …   `         dbg_trace_clk           R             !altr,socfpga-gate-clk                      o   l               …   `         dbg_timer_clk           R             !altr,socfpga-gate-clk                      …   `         cfg_clk         R             !altr,socfpga-gate-clk                      …   `         h2f_user0_clk           R             !altr,socfpga-gate-clk                      …   `   	      emac_0_clk          R             !altr,socfpga-gate-clk                      …                 ‘   &      emac_1_clk          R             !altr,socfpga-gate-clk                      …                ‘   '      usb_mp_clk          R             !altr,socfpga-gate-clk                      …               o   ¤                ‘   5      spi_m_clk           R             !altr,socfpga-gate-clk                      …               o   ¤               ‘   2      can0_clk            R             !altr,socfpga-gate-clk                      …               o   ¤               ‘         can1_clk            R             !altr,socfpga-gate-clk                      …               o   ¤   	            ‘   	      gpio_db_clk         R             !altr,socfpga-gate-clk                      …               o   ¨             h2f_user1_clk           R             !altr,socfpga-gate-clk                      …             sdmmc_clk           R             !altr,socfpga-gate-clk                            …               Ž       ‡         ‘         sdmmc_clk_divided           R             !altr,socfpga-gate-clk                      …               w            ‘   ,      nand_x_clk          R             !altr,socfpga-gate-clk                            …       	         ‘         nand_ecc_clk            R             !altr,socfpga-gate-clk                      …       	         ‘   /      nand_clk            R             !altr,socfpga-gate-clk                      …       
        w            ‘   .      qspi_clk            R             !altr,socfpga-gate-clk                             …                ‘   0      ddr_dqs_clk_gate            R             !altr,socfpga-gate-clk              !        …   Ø          ddr_2x_dqs_clk_gate         R             !altr,socfpga-gate-clk              "        …   Ø         ddr_dq_clk_gate         R             !altr,socfpga-gate-clk              #        …   Ø         h2f_user2_clk           R             !altr,socfpga-gate-clk              $        …   Ø               fpga_bridge@ff400000             !altr,socfpga-lwhps2fpga-bridge           |ÿ@             /      a                 	  Kdisabled          fpga_bridge@ff500000             !altr,socfpga-hps2fpga-bridge             |ÿP             /      `                 	  Kdisabled          fpga-bridge@ff600000             !altr,socfpga-fpga2hps-bridge             |ÿ`             /      b                 	  Kdisabled          fpga-bridge@ffc25080             !altr,socfpga-fpga2sdram-bridge           |ÿÂP€         	  Kdisabled          fpgamgr@ff706000             !altr,socfpga-fpga-mgr            |ÿp`    ÿ¹              ª       ¯            ‘         ethernet@ff700000         0   !altr,socfpga-stmmac snps,dwmac-3.70a snps,dwmac         ˜   %   `             |ÿp               ª       s           «macirq          »                   &      
  #stmmaceth           /             
  6stmmaceth           Ç           â   €        þ                    	  Kdisabled          ethernet@ff702000         0   !altr,socfpga-stmmac snps,dwmac-3.70a snps,dwmac         ˜   %   `            |ÿp               ª       x           «macirq          »                   '      
  #stmmaceth           /      !      
  6stmmaceth           Ç           â   €        þ                      Kokay            rgmii           #            0            =            J            W  ¤        d  ¤        q  ¤        ~  ¤        ‹            ˜  D        ¤  ¤        ±          ½  Ø      gpio@ff708000                                      !snps,dw-apb-gpio             |ÿp€               (        /      9        Kokay       gpio-controller@0            !snps,dw-apb-gpio-port            Ì        Ü           è            |              Ù         È            ª       ¤            gpio@ff709000                                      !snps,dw-apb-gpio             |ÿp               (        /      :        Kokay       gpio-controller@0            !snps,dw-apb-gpio-port            Ì        Ü           è            |              Ù         È            ª       ¥            ‘   7         gpio@ff70a000                                      !snps,dw-apb-gpio             |ÿp                (        /      ;        Kokay       gpio-controller@0            !snps,dw-apb-gpio-port            Ì        Ü           è            |              Ù         È            ª       ¦            ‘   *         i2c@ffc04000                                       !snps,designware-i2c          |ÿÀ@            /      ,           )         ª       ž           Kokay            _ †    adxl345@53           !adi,adxl345          |   S         ™   *         ª               i2c@ffc05000                                       !snps,designware-i2c          |ÿÀP            /      -           )         ª       Ÿ         	  Kdisabled          i2c@ffc06000                                       !snps,designware-i2c          |ÿÀ`            /      .           )         ª                 	  Kdisabled          i2c@ffc07000                                       !snps,designware-i2c          |ÿÀp            /      /           )         ª       ¡         	  Kdisabled          eccmgr           !altr,socfpga-ecc-manager                                       î   l2-ecc@ffd08140          !altr,socfpga-l2-ecc          |ÿÐ@            ª       $          %         ocram-ecc@ffd08144           !altr,socfpga-ocram-ecc           |ÿÐD           ö   +         ª       ²          ³            cache-controller@fffef000            !arm,pl310-cache          |ÿþð             ª       &            û        	                            %                 6           D            S        g           {            ”           ­            ¿            ‘         l3regs@0xff800000            !altr,l3regs syscon           |ÿ€           dwmmc0@ff704000          !altr,socfpga-dw-mshc             |ÿp@             ª       ‹                                                   (   ,        #biu ciu         /      6        Kokay             Ó        Ý            ç         ù        
   -           -      nand@ff900000                                      !altr,socfpga-denali-nand             |ÿ     ÿ¸             #nand_data denali_reg             ª                     .      /        #nand nand_x ecc         /      $      	  Kdisabled          sram@ffff0000         
   !mmio-sram            |ÿÿ              ‘   +      spi@ff705000             !cdns,qspi-nor                                      |ÿpP    ÿ               ª       —           -   €        =           M               0        /      %      	  Kdisabled          rstmgr@ffd05000         b            !altr,rst-mgr             |ÿÐP            o            ‘         snoop-control-unit@fffec000          !arm,cortex-a9-scu            |ÿþÀ          sdr@ffc25000             !altr,sdr-ctl syscon          |ÿÂP            /      =         ‘   1      sdramedac            !altr,sdram-edac         ‚   1         ª       '         spi@fff00000             !snps,dw-apb-ssi                                    |ÿð              ª       š           ’              2        /      2        6spi       	  Kdisabled          spi@fff01000             !snps,dw-apb-ssi                                    |ÿð             ª       ›           ’              2        /      3        6spi       	  Kdisabled          sysmgr@ffd08000          !altr,sys-mgr syscon          |ÿÐ€   @         ™ÿÐ€Ä         ‘   %      timer@fffec600           !arm,cortex-a9-twd-timer          |ÿþÆ             ª                   3      timer0@ffc08000          !snps,dw-apb-timer            ª       §            |ÿÀ€               )        #timer           /      *        6timer         timer1@ffc09000          !snps,dw-apb-timer            ª       ¨            |ÿÀ               )        #timer           /      +        6timer         timer2@ffd00000          !snps,dw-apb-timer            ª       ©            |ÿÐ                
        #timer           /      (        6timer         timer3@ffd01000          !snps,dw-apb-timer            ª       ª            |ÿÐ               
        #timer           /      )        6timer         serial0@ffc02000             !snps,dw-apb-uart             |ÿÀ              ª       ¢           ©           ³              )        À   4      4           Åtx rx           /      0        Kokay          serial1@ffc03000             !snps,dw-apb-uart             |ÿÀ0             ª       £           ©           ³              )        À   4      4           Åtx rx           /      1      usbphy          Ï             !usb-nop-xceiv           Kokay             ‘   6      usb@ffb00000          
   !snps,dwc2            |ÿ°    ÿÿ         ª       }              5        #otg         /      "        6dwc2            Ú   6      	  ßusb2-phy          	  Kdisabled          usb@ffb40000          
   !snps,dwc2            |ÿ´    ÿÿ         ª       €              5        #otg         /      #        6dwc2            Ú   6      	  ßusb2-phy            Kokay          watchdog@ffd02000            !snps,dw-wdt          |ÿÐ              ª       «              
        /      &        Kokay          watchdog@ffd03000            !snps,dw-wdt          |ÿÐ0             ª       ¬              
        /      '      	  Kdisabled             chosen          éearlyprintk         òserial0:115200n8          memory@0             pmemory           |    @         3-3-v-regulator          !regulator-fixed         þ3.3V             2Z         % 2Z          ‘   -      leds          
   !gpio-leds      hps0          	  =hps_led0            ð   7             
  Cheartbeat               	#address-cells #size-cells model compatible serial0 serial1 timer0 timer1 timer2 timer3 ethernet0 enable-method device_type reg next-level-cache phandle interrupt-parent interrupts interrupt-affinity #interrupt-cells interrupt-controller ranges #dma-cells #dma-channels #dma-requests clocks clock-names resets reset-names fpga-mgr status #clock-cells clock-frequency div-reg fixed-divider clk-gate clk-phase altr,sysmgr-syscon interrupt-names mac-address snps,multicast-filter-bins snps,perfect-filter-entries tx-fifo-depth rx-fifo-depth phy-mode txd0-skew-ps txd1-skew-ps txd2-skew-ps txd3-skew-ps rxd0-skew-ps rxd1-skew-ps rxd2-skew-ps rxd3-skew-ps txen-skew-ps txc-skew-ps rxdv-skew-ps rxc-skew-ps max-frame-size gpio-controller #gpio-cells snps,nr-gpios iram cache-unified cache-level arm,tag-latency arm,data-latency prefetch-data prefetch-instr arm,shared-override arm,double-linefill arm,double-linefill-incr arm,double-linefill-wrap arm,prefetch-drop arm,prefetch-offset broken-cd bus-width cap-mmc-highspeed cap-sd-highspeed vmmc-supply vqmmc-supply reg-names cdns,fifo-depth cdns,fifo-width cdns,trigger-address #reset-cells altr,modrst-offset altr,sdr-syscon num-cs cpu1-start-addr reg-shift reg-io-width dmas dma-names #phy-cells phys phy-names bootargs stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt label linux,default-trigger 