  e   8  a    (              `                                                                      ,Sinovoip BPI-M2       %   2sinovoip,bpi-m2 allwinner,sun6i-a31s       aliases          =/soc/ethernet@1c30000            G/soc/serial@1c28000       chosen                                     O         Vserial0:115200n8       framebuffer-lcd0-hdmi         0   2allwinner,simple-framebuffer simple-framebuffer          bde_be0-lcd0-hdmi          @   u      3      /      2      w            z                  	   |disabled          framebuffer-lcd0          0   2allwinner,simple-framebuffer simple-framebuffer          bde_be0-lcd0       0   u      3      /      w            z            	   |disabled             timer            2arm,armv7-timer       0                                 
           n6                 cpus             allwinner,sun6i-a31                              cpu@0            2arm,cortex-a7            cpu                       u                           a O /  O 
  S  B@                                        cpu@1            2arm,cortex-a7            cpu                      u                           a O /  O 
  S  B@                             cpu@2            2arm,cortex-a7            cpu                      u                           a O /  O 
  S  B@                             cpu@3            2arm,cortex-a7            cpu                      u                           a O /  O 
  S  B@                       	         thermal-zones      cpu_thermal         !           7          E      cooling-maps       map0            U         0  Z            	         trips      cpu_alert0          i p        u           passive                  cpu_crit            i         u        	   critical                   pmu          2arm,cortex-a7-pmu         0          x          y          z          {         clocks                                     O   clk-24M                      2fixed-clock          n6           P        osc24M                    clk-32k                      2fixed-clock                       P        ext_osc32k             :      clk-mii-phy-tx                       2fixed-clock          }x@        mii_phy_tx             
      clk-gmac-int-tx                      2fixed-clock          sY@        gmac_int_tx                  clk@1c200d0                      2allwinner,sun7i-a20-gmac-clk                          u   
           gmac_tx            &         display-engine        $   2allwinner,sun6i-a31s-display-engine                     	   |disabled          soc          2simple-bus                                     O   dma-controller@1c02000           2allwinner,sun6i-a31-dma                               2            u                                                lcd-controller@1c0c000           2allwinner,sun6i-a31s-tcon                                V                                     )      	  lcd lvds              u      /                          ahb tcon-ch0 tcon-ch1 lvds-alt          tcon0-pixel-clock                  ports                                port@0                                            endpoint@0                                     8      endpoint@1                                    2         port@1                                           endpoint@1                                                              lcd-controller@1c0d000           2allwinner,sun6i-a31-tcon                                 W                                     )      	  lcd lvds              u      0                          ahb tcon-ch0 tcon-ch1 lvds-alt          tcon1-pixel-clock                  ports                                port@0                                            endpoint@0                                     9      endpoint@1                                    3         port@1                                           endpoint@1                                                              mmc@1c0f000          2allwinner,sun7i-a20-mmc                        u            O      Q      P        ahb mmc output sample                         ahb                 <           default         '            |okay                                      1           =           G                   mmc@1c10000          2allwinner,sun7i-a20-mmc                         u            R      T      S        ahb mmc output sample                         ahb                 =           default         '         	   |disabled                                    mmc@1c11000          2allwinner,sun7i-a20-mmc                        u            U      W      V        ahb mmc output sample                         ahb                 >            |okay                                      default         '           1           P           =            [   wifi@1                       2brcm,bcm4329-fmac                                         
  ihost-wake            mmc@1c12000          2allwinner,sun7i-a20-mmc                         u            X      Z      Y        ahb mmc output sample                 	        ahb                 ?         	   |disabled                                    hdmi@1c16000             2allwinner,sun6i-a31-hdmi             `                    X         (   u      2                                ahb mod ddc pll-0 pll-1                       yddc-tx ddc-rx audio-tx                                  	   |disabled       ports                                port@0                                            endpoint@0                                           endpoint@1                                             port@1                          usb@1c19000          2allwinner,sun6i-a31-musb                          u      (                              G           imc                         usb                        otg       	   |disabled          phy@1c19400          2allwinner,sun6i-a31-usb-phy                              phy_ctrl pmu1 pmu2           u      d      e      f        usb0_phy usb1_phy usb2_phy                                   !  usb0_reset usb1_reset usb2_reset             |okay                                usb@1c1a000       &   2allwinner,sun6i-a31-ehci generic-ehci                                H            u      )                                    usb          |okay          usb@1c1a400       &   2allwinner,sun6i-a31-ohci generic-ohci                                I            u      +      g                                    usb          |okay          usb@1c1b000       &   2allwinner,sun6i-a31-ehci generic-ehci                                J            u      *                                    usb       	   |disabled          usb@1c1b400       &   2allwinner,sun6i-a31-ohci generic-ohci                                K            u      ,      h                                    usb       	   |disabled          usb@1c1c400       &   2allwinner,sun6i-a31-ohci generic-ohci                                M            u      -      i                    	   |disabled          clock@1c20000            2allwinner,sun6i-a31-ccu                        u       !          
  hosc losc                                          pinctrl@1c20800          2allwinner,sun6i-a31s-pinctrl                       0                                                    u      @       !            apb hosc losc                                                         gmac-gmii-pins          PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27           
gmac                     gmac-mii-pins         T  PA0 PA1 PA2 PA3 PA8 PA9 PA11 PA12 PA13 PA14 PA19 PA20 PA21 PA22 PA23 PA24 PA26 PA27         
gmac          gmac-rgmii-pins       F  PA0 PA1 PA2 PA3 PA9 PA10 PA11 PA12 PA13 PA14 PA19 PA20 PA25 PA26 PA27           
gmac               (           '      i2c0-pins         
  PH14 PH15           
i2c0               #      i2c1-pins         
  PH16 PH17           
i2c1               $      i2c2-pins         
  PH18 PH19           
i2c2               %      lcd0-rgb888-pins            PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27           
lcd0          mmc0-pins           PF0 PF1 PF2 PF3 PF4 PF5         
mmc0                        "                 mmc1-pins           PG0 PG1 PG2 PG3 PG4 PG5         
mmc1                        "                 mmc2-4bit-pins          PC6 PC7 PC8 PC9 PC10 PC11           
mmc2                        "                 mmc2-8bit-emmc-pins       3  PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC24          
mmc2                        "      mmc3-8bit-emmc-pins       3  PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC24          
mmc3               (         "      spdif-tx-pin            PH28            
spdif         uart0-ph-pins         
  PH20 PH21           
uart0              "         timer@1c20c00            2allwinner,sun4i-a10-timer                      H                                                                        u          watchdog@1c20ca0             2allwinner,sun6i-a31-wdt                                          u          spdif@1c21000           /             2allwinner,sun6i-a31-spdif                                            u      >      c              +      
  apb spdif                               yrx tx         	   |disabled          i2s@1c22000         /             2allwinner,sun6i-a31-i2s                                           u      A      a              -        apb mod                             yrx tx         	   |disabled          i2s@1c22400         /             2allwinner,sun6i-a31-i2s          $                                u      B      b              .        apb mod                             yrx tx         	   |disabled          lradc@1c22800            2allwinner,sun4i-a10-lradc-keys           (                             	   |disabled          rtp@1c25000          2allwinner,sun6i-a31-ts           P                               @                     serial@1c28000           2snps,dw-apb-uart                                             V           `            u      G              3                            yrx tx            |okay            default         '   "      serial@1c28400           2snps,dw-apb-uart                                            V           `            u      H              4                            yrx tx         	   |disabled          serial@1c28800           2snps,dw-apb-uart                                            V           `            u      I              5                            yrx tx         	   |disabled          serial@1c28c00           2snps,dw-apb-uart                                            V           `            u      J              6              	      	        yrx tx         	   |disabled          serial@1c29000           2snps,dw-apb-uart                                            V           `            u      K              7              
      
        yrx tx         	   |disabled          serial@1c29400           2snps,dw-apb-uart                                            V           `            u      L              8                            yrx tx         	   |disabled          i2c@1c2ac00          2allwinner,sun6i-a31-i2c          ¬                                u      C              /        default         '   #      	   |disabled                                    i2c@1c2b000          2allwinner,sun6i-a31-i2c          °                                u      D              0        default         '   $      	   |disabled                                    i2c@1c2b400          2allwinner,sun6i-a31-i2c          ´                                u      E              1        default         '   %      	   |disabled                                    i2c@1c2b800          2allwinner,sun6i-a31-i2c          ¸                    	            u      F              2      	   |disabled                                    ethernet@1c30000             2allwinner,sun7i-a20-gmac                 T                R           imacirq           u      !   &        stmmaceth allwinner_gmac_tx                     
  stmmaceth           m            v                  |okay            default         '   '           (        rgmii              )   mdio             2snps,dwmac-mdio                              ethernet-phy@1                                             '          u0           (            crypto-engine@1c15000         6   2allwinner,sun6i-a31-crypto allwinner,sun4i-a10-crypto            P                    P            u            \        ahb mod                       ahb       codec@1c22c00           /             2allwinner,sun6i-a31-codec            ,                                u      =            
  apb codec                 *                            yrx tx         	   |disabled          timer@1c60000         8   2allwinner,sun6i-a31-hstimer allwinner,sun7i-a20-hstimer                     0          3          4          5          6            u      #                    spi@1c68000          2allwinner,sun6i-a31-spi          ƀ                    A            u      $      ]        ahb mod                             yrx tx                       	   |disabled                                    spi@1c69000          2allwinner,sun6i-a31-spi          Ɛ                    B            u      %      ^        ahb mod                             yrx tx                       	   |disabled                                    spi@1c6a000          2allwinner,sun6i-a31-spi          Ơ                    C            u      &      _        ahb mod                             yrx tx                       	   |disabled                                    spi@1c6b000          2allwinner,sun6i-a31-spi          ư                    D            u      '      `        ahb mod                             yrx tx                       	   |disabled                                    interrupt-controller@1c81000             2arm,gic-400                     @     `                                        	                   display-frontend@1e00000          %   2allwinner,sun6i-a31-display-frontend                                  ]            u      5      |      u        ahb mod ram               !              ports                                port@1                                           endpoint@0                          *           4      endpoint@1                         +           .               display-frontend@1e20000          %   2allwinner,sun6i-a31-display-frontend                                  ^            u      6      }      v        ahb mod ram               "              ports                                port@1                                           endpoint@0                          ,           5      endpoint@1                         -           /               display-backend@1e40000       $   2allwinner,sun6i-a31-display-backend                               `            u      4      {      x        ahb mod ram                   ports                                port@0                                            endpoint@0                          .           +      endpoint@1                         /           -         port@1                                           endpoint@1                         0           1               drc@1e50000          2allwinner,sun6i-a31-drc                               [            u      <            r        ahb mod ram               (   ports                                port@0                                            endpoint@1                         1           0         port@1                                           endpoint@0                          2                 endpoint@1                         3                          display-backend@1e60000       $   2allwinner,sun6i-a31-display-backend                               _            u      3      z      w        ahb mod ram                  ports                                port@0                                            endpoint@0                          4           *      endpoint@1                         5           ,         port@1                 endpoint               6           7               drc@1e70000          2allwinner,sun6i-a31-drc                               [            u      ;            q        ahb mod ram               '   ports                                port@0                  endpoint               7           6         port@1                                           endpoint@0                          8                 endpoint@1                         9                          rtc@1f00000                     2allwinner,sun6i-a31-rtc               T                (          )            u   :        osc32k             !      interrupt-controller@1f00c00             2allwinner,sun6i-a31-r-intc                                                                  C      prcm@1f01400             2allwinner,sun6i-a31-prcm                    ar100_clk            2allwinner,sun6i-a31-ar100-clk                        u   !              
      
        ar100              ;      ahb0_clk             2fixed-factor-clock                                             u   ;        ahb0               <      apb0_clk             2allwinner,sun6i-a31-apb0-clk                         u   <        apb0               =      apb0_gates_clk        #   2allwinner,sun6i-a31-apb0-gates-clk                      u   =      D  apb0_pio apb0_ir apb0_timer apb0_p2wi apb0_uart apb0_1wire apb0_i2c            >      ir_clk                       2allwinner,sun4i-a10-mod0-clk             u   !                ir             ?      apb0_rst              2allwinner,sun6i-a31-clock-reset                       @         cpucfg@1f01c00           2allwinner,sun6i-a31-cpuconfig                      ir@1f02000           2allwinner,sun6i-a31-ir           u   >      ?        apb ir             @                   %                 @         |okay            default         '   A      pinctrl@1f02c00          2allwinner,sun6i-a31-r-pinctrl            ,                    -          .            u   >           !            apb hosc losc              @                                                          s-ir-rx-pin         PL4         
s_ir               A      s-p2wi-pins         PL0 PL1         
s_p2wi             B         i2c@1f03400          2allwinner,sun6i-a31-p2wi             4                    '            u   >                        @           default         '   B         |okay                                 pmic@68          2x-powers,axp221             h             C                                                            ac-power-supply           2x-powers,axp221-ac-power-supply       	   |disabled          adc          2x-powers,axp221-adc         %         battery-power-supply          %   2x-powers,axp221-battery-power-supply          	   |disabled          regulators          7     dcdc1           Jvdd-3v0          Y        m -         -                 dcdc2           Jvdd-gpu         m 
`         $@      dcdc3           Jvdd-cpu          Y        m 
`         $@                 dcdc4           Jvdd-sys-dll          Y        m 
`         $@      dcdc5         	  Jvcc-dram             Y        m `         `      dc1sw           Jdc1sw         dc5ldo        	  Jvdd-cpus             Y        m 
`         $@      aldo1         	  Jvcc-wifi            m 2Z         2Z                 aldo2         	  Jvcc-gmac             Y        m &%         &%      aldo3           Javcc             Y        m -         -      dldo1           Jvcc-mac         m -         -           )      dldo2         	  Javdd-csi            m *         *      dldo3           Jvcc-pb           Y        m 2Z         2Z      dldo4           Jdldo4         eldo1           Jvdd-csi         m w@         w@         |okay          eldo2           Jeldo2         eldo3           Jeldo3         ldo_io0         Jldo_io0       	   |disabled          ldo_io1         Jvcc-pm-cpus          |okay             Y        m w@         w@      rtc_ldo          Y        m -         -        Jrtc_ldo       drivevbus         
  Jdrivevbus         	   |disabled             usb_power_supply          !   2x-powers,axp221-usb-power-supply          	   |disabled                   leds          
   2gpio-leds      blue            bpi-m2:blue:usr         J                   green           bpi-m2:green:usr            J         
          red         bpi-m2:red:usr          J                      mmc2_pwrseq          2mmc-pwrseq-simple                                            	interrupt-parent #address-cells #size-cells model compatible ethernet0 serial0 ranges stdout-path allwinner,pipeline clocks status interrupts clock-frequency arm,cpu-registers-not-fw-configured enable-method device_type reg clock-latency operating-points #cooling-cells cpu-supply phandle polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis #clock-cells clock-accuracy clock-output-names allwinner,pipelines resets #dma-cells dmas reset-names clock-names remote-endpoint allwinner,tcon-channel pinctrl-names pinctrl-0 vmmc-supply bus-width cd-gpios mmc-pwrseq non-removable interrupt-names dma-names phys phy-names extcon dr_mode reg-names #phy-cells #reset-cells gpio-controller interrupt-controller #interrupt-cells #gpio-cells pins function drive-strength bias-pull-up #sound-dai-cells #thermal-sensor-cells reg-shift reg-io-width snps,pbl snps,fixed-burst snps,force_sf_dma_mode phy-handle phy-mode phy-supply reset-gpios reset-assert-us reset-deassert-us clock-div clock-mult eldoin-supply x-powers,drive-vbus-en #io-channel-cells x-powers,dcdc-freq regulator-name regulator-always-on regulator-min-microvolt regulator-max-microvolt label 