Ðþí  IT   8  EL   (              E                                 V2P-CA15_CA7               I                  &    arm,vexpress,v2p-ca15_a7 arm,vexpress            +            <            K      fixed-regulator-0             regulator-fixed          W3V3          f 2Z          ~ 2Z           –         ª         clk24mhz              fixed-clock          ²             ¿n6          Ïv2m:clk24mhz             ª   	      refclk1mhz            fixed-clock          ²             ¿ B@         Ïv2m:refclk1mhz           ª         refclk32khz           fixed-clock          ²             ¿  €          Ïv2m:refclk32khz          ª         leds          
    gpio-leds      led-1            âv2m:green:user1          è                 
   îheartbeat         led-2            âv2m:green:user2          è                   îdisk-activity         led-3            âv2m:green:user3          è                   îcpu0          led-4            âv2m:green:user4          è                   îcpu1          led-5            âv2m:green:user5          è                   îcpu2          led-6            âv2m:green:user6          è                   îcpu3          led-7            âv2m:green:user7          è                   îcpu4          led-8            âv2m:green:user8          è                   îcpu5             bus@8000000           simple-bus           <            K         x                                                                                                                                       ?     ´  /                                                                                                                                                                                                                                     	          	              
          
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                !          !              "          "              #          #              $          $              %          %              &          &              '          '              (          (              )          )              *          *      motherboard-bus           V2M-P1                                  =rs1           arm,vexpress,v2m-p1 simple-bus           <            K                          flash@0           arm,vexpress-flash cfi-flash            P                             T         	  _disabled       partitions            arm,arm-firmware-suite           psram@100000000           arm,vexpress-psram mtd-ram          P                  T         ethernet@202000000            smsc,lan9118 smsc,lan9115           P                 f           qmii         z            ‡         œ        ¯           ½         usb@203000000             nxp,usb-isp1761         P                 f            Í      iofpga-bus@300000000              simple-bus           <            K                             sysreg@10000              arm,vexpress-sysreg         P               <            K                              ª      gpio@8            arm,vexpress-sysreg,sys_led         P               ×        ç            ª         gpio@48           arm,vexpress-sysreg,sys_mci         P   H            ×        ç            ª         gpio@4c           arm,vexpress-sysreg,sys_flash           P   L            ×        ç            sysctl@20000              arm,sp810 arm,primecell         P              ó                 úrefclk timclk apb_pclk           ²         0   Ïtimerclken0 timerclken1 timerclken2 timerclken3                                                                ª         i2c@30000             arm,versatile-i2c           P               <            K       pcie-switch@60            idt,89hpes32h8          P   `         aaci@40000            arm,pl041 arm,primecell         P              f           ó         	  úapb_pclk          mmci@50000            arm,pl180 arm,primecell         P              f   	   
        -                   6                  ? ·         M           ó   	           úmclk apb_pclk         kmi@60000             arm,pl050 arm,primecell         P              f           ó   	           úKMIREFCLK apb_pclk        kmi@70000             arm,pl050 arm,primecell         P              f           ó   	           úKMIREFCLK apb_pclk        serial@90000              arm,pl011 arm,primecell         P 	             f           ó   
           úuartclk apb_pclk          serial@a0000              arm,pl011 arm,primecell         P 
             f           ó   
           úuartclk apb_pclk          serial@b0000              arm,pl011 arm,primecell         P              f           ó   
           úuartclk apb_pclk          serial@c0000              arm,pl011 arm,primecell         P              f           ó   
           úuartclk apb_pclk          wdt@f0000             arm,sp805 arm,primecell         P              f            ó              úwdog_clk apb_pclk         timer@110000              arm,sp804 arm,primecell         P              f           ó                        útimclken1 timclken2 apb_pclk          timer@120000              arm,sp804 arm,primecell         P              f           ó                       útimclken1 timclken2 apb_pclk          i2c@160000            arm,versatile-i2c           P               <            K       dvi-transmitter@39            sil,sii9022-tpi sil,sii9022         P   9   ports            <            K       port@0          P       endpoint            Y            ª                  dvi-transmitter@60            sil,sii9022-cpi sil,sii9022         P   `         rtc@170000            arm,pl031 arm,primecell         P              f           ó         	  úapb_pclk          compact-flash@1a0000              arm,vexpress-cf ata-generic         P                   i         clcd@1f0000           arm,pl111 arm,primecell         P            	  scombined            f           ó              úclcdclk apb_pclk            ƒ7ù€        ˜      port       endpoint            Y           ¦                   ª               mcc           arm,vexpress,config-bus         À      oscclk0           arm,vexpress-osc            Û               ô}x@“‡          ²             Ïv2m:oscclk0       oscclk1           arm,vexpress-osc            Û              ôjepßÒ@         ²             Ïv2m:oscclk1          ª         oscclk2           arm,vexpress-osc            Û              ôn6 n6          ²             Ïv2m:oscclk2          ª   
      volt-vio              arm,vexpress-volt           Û                WVIO           –         âVIO       temp-mcc              arm,vexpress-temp           Û                âMCC       reset             arm,vexpress-reset          Û             muxfpga           arm,vexpress-muxfpga            Û             shutdown              arm,vexpress-shutdown           Û             reboot            arm,vexpress-reboot         Û   	          dvimode           arm,vexpress-dvimode            Û                         chosen        aliases       ?  ÿ/bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@90000        ?  /bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@a0000        ?  /bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@b0000        ?  /bus@8000000/motherboard-bus/iofpga-bus@300000000/serial@c0000        =  /bus@8000000/motherboard-bus/iofpga-bus@300000000/i2c@160000          <  $/bus@8000000/motherboard-bus/iofpga-bus@300000000/i2c@30000       cpus             <            K       cpu@0           )cpu           arm,cortex-a15          P            5           F           V           i  Þ         ª         cpu@1           )cpu           arm,cortex-a15          P           5           F           V           i  Þ         ª         cpu@2           )cpu           arm,cortex-a7           P           5           F           V          i   …         ª         cpu@3           )cpu           arm,cortex-a7           P          5           F           V          i   …         ª         cpu@4           )cpu           arm,cortex-a7           P          5           F           V          i   …         ª         idle-states    cluster-sleep-big             arm,idle-state           ƒ        ”  è        ¥  ¼        µ  Ð         ª         cluster-sleep-little              arm,idle-state           ƒ        ”  è        ¥  ô        µ  	Ä         ª               memory@80000000         )memory          P    €       @         reserved-memory          <            K               vram@18000000             shared-dma-pool         P            €           Æ         ª            wdt@2a490000              arm,sp805 arm,primecell         P    *I                 f       b           ó              úwdog_clk apb_pclk         hdlcd@2b000000        
    arm,hdlcd           P    +                  f       U           ó           úpxlclk        memory-controller@2b0a0000            arm,pl341 arm,primecell         P    +
                 ó         	  úapb_pclk          interrupt-controller@2c001000         %    arm,cortex-a15-gic arm,cortex-a9-gic                        <             Í      @  P    ,             ,               , @             , `                 f      	           ª         cci@2c090000              arm,cci-400          <            K           P    ,	                         ,	        slave-if@4000             arm,cci-400-ctrl-if         âace         P  @             ª         slave-if@5000             arm,cci-400-ctrl-if         âace         P  P             ª         pmu@9000              arm,cci-400-pmu,r0          P     P       <  f       i          e          f          g          h            memory-controller@7ffd0000            arm,pl354 arm,primecell         P    ý                 f       V          W           ó         	  úapb_pclk          dma@7ff00000              arm,pl330 arm,primecell         P    ð               <  f       \          X          Y          Z          [           ó         	  úapb_pclk          scc@7fff0000          .    arm,vexpress-scc,v2p-ca15_a7 arm,vexpress-scc           P    ÿ                 f       _         timer             arm,armv7-timer       0  f                              
        pmu-a15           arm,cortex-a15-pmu          f       D          E           ñ            pmu-a7            arm,cortex-a7-pmu         $  f       €                    ‚           ñ               oscclk6a              fixed-clock          ²             ¿n6       	   Ïoscclk6a             ª         dcc           arm,vexpress,config-bus         À      oscclk0           arm,vexpress-osc            Û               ôf@úð€         ²             Ïoscclk0       oscclk1           arm,vexpress-osc            Û              ôf@úð€         ²             Ïoscclk1       oscclk2           arm,vexpress-osc            Û              ôf@úð€         ²             Ïoscclk2       oscclk3           arm,vexpress-osc            Û              ôf@úð€         ²             Ïoscclk3       oscclk4           arm,vexpress-osc            Û              ô1- bZ          ²             Ïoscclk4       oscclk5           arm,vexpress-osc            Û              ôjep	Õ³@         ²             Ïoscclk5          ª         oscclk6           arm,vexpress-osc            Û              ô1- bZ          ²             Ïoscclk6          ª         oscclk7           arm,vexpress-osc            Û              ôf@úð€         ²             Ïoscclk7       oscclk8           arm,vexpress-osc            Û              ô1- úð€         ²             Ïoscclk8       volt-a15              arm,vexpress-volt           Û             
   WA15 Vcore            f 5          ~           –      
   âA15 Vcore         volt-a7           arm,vexpress-volt           Û            	   WA7 Vcore             f 5          ~           –      	   âA7 Vcore          amp-a15           arm,vexpress-amp            Û             
   âA15 Icore         amp-a7            arm,vexpress-amp            Û            	   âA7 Icore          temp-dcc              arm,vexpress-temp           Û                âDCC       power-a15             arm,vexpress-power          Û             
   âA15 Pcore         power-a7              arm,vexpress-power          Û            	   âA7 Pcore          energy-a15            arm,vexpress-energy         Û                   
   âA15 Jcore         energy-a7             arm,vexpress-energy         Û                  	   âA7 Jcore             etb@20010000          "    arm,coresight-etb10 arm,primecell           P                      ó         	  úapb_pclk       in-ports       port       endpoint            Y            ª                  tpiu@20030000         !    arm,coresight-tpiu arm,primecell            P                      ó         	  úapb_pclk       in-ports       port       endpoint            Y            ª                  replicator             arm,coresight-static-replicator    out-ports            <            K       port@0          P       endpoint            Y            ª            port@1          P      endpoint            Y            ª               in-ports       port       endpoint            Y            ª                   funnel@20040000       +    arm,coresight-dynamic-funnel arm,primecell          P                      ó         	  úapb_pclk       out-ports      port       endpoint            Y             ª               in-ports             <            K       port@0          P       endpoint            Y   !         ª   &         port@1          P      endpoint            Y   "         ª   '         port@2          P      endpoint            Y   #         ª   (         port@4          P      endpoint            Y   $         ª   )         port@5          P      endpoint            Y   %         ª   *               ptm@2201c000          "    arm,coresight-etm3x arm,primecell           P    "À                           ó         	  úapb_pclk       out-ports      port       endpoint            Y   &         ª   !               ptm@2201d000          "    arm,coresight-etm3x arm,primecell           P    "Ð                           ó         	  úapb_pclk       out-ports      port       endpoint            Y   '         ª   "               etm@2203c000          "    arm,coresight-etm3x arm,primecell           P    "À                           ó         	  úapb_pclk       out-ports      port       endpoint            Y   (         ª   #               etm@2203d000          "    arm,coresight-etm3x arm,primecell           P    "Ð                           ó         	  úapb_pclk       out-ports      port       endpoint            Y   )         ª   $               etm@2203e000          "    arm,coresight-etm3x arm,primecell           P    "à                           ó         	  úapb_pclk       out-ports      port       endpoint            Y   *         ª   %               hsb@40000000              simple-bus           <            K                   @   ?ï                                  `  /                  $                    %                    &                    '            	model arm,hbi arm,vexpress,site compatible interrupt-parent #address-cells #size-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on phandle #clock-cells clock-frequency clock-output-names label gpios linux,default-trigger ranges #interrupt-cells interrupt-map-mask interrupt-map arm,v2m-memory-map reg bank-width status interrupts phy-mode reg-io-width smsc,irq-active-high smsc,irq-push-pull vdd33a-supply vddvario-supply port1-otg gpio-controller #gpio-cells clocks clock-names assigned-clocks assigned-clock-parents cd-gpios wp-gpios max-frequency vmmc-supply remote-endpoint reg-shift interrupt-names max-memory-bandwidth memory-region arm,pl11x,tft-r0g0b0-pads arm,vexpress,config-bridge arm,vexpress-sysreg,func freq-range serial0 serial1 serial2 serial3 i2c0 i2c1 device_type cci-control-port cpu-idle-states capacity-dmips-mhz dynamic-power-coefficient local-timer-stop entry-latency-us exit-latency-us min-residency-us no-map interrupt-controller interface-type interrupt-affinity cpu 