Ðþí  7[   8  3Ä   (            —  3Œ                                 V2P-CA9            ‘                  "    arm,vexpress,v2p-ca9 arm,vexpress            +            <            K      bus@40000000              simple-bus           <            K         P   W        @             D             H             L                            ^            o           ?     ´   ‚                                                                                                                                                                                                                                     	          	              
          
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                !          !              "          "              #          #              $          $              %          %              &          &              '          '              (          (              )          )              *          *      motherboard           V2M-P1                                    arm,vexpress,v2m-p1 simple-bus           <            K            ^             W   flash@0,00000000              arm,vexpress-flash cfi-flash                                           ”      partitions            arm,arm-firmware-suite           psram@2,00000000              arm,vexpress-psram mtd-ram                              ”         ethernet@3,02000000           smsc,lan9118 smsc,lan9115                              Ÿ            ªmii          ³             À          Õ         è            ö         usb@3,03000000            nxp,usb-isp1761                            Ÿ                  iofpga@7,00000000             simple-bus           <            K            W                 sysreg@0              arm,vexpress-sysreg                          <            K            W                         gpio@8            arm,vexpress-sysreg,sys_led                                 (                    gpio@48           arm,vexpress-sysreg,sys_mci             H                    (                    gpio@4c           arm,vexpress-sysreg,sys_flash               L                    (            sysctl@1000           arm,sp810 arm,primecell                        4                 ;refclk timclk apb_pclk          G         0  Ttimerclken0 timerclken1 timerclken2 timerclken3          g                                 w                             i2c@2000              arm,versatile-i2c                            <            K       pcie-switch@60            idt,89hpes32h8              `         aaci@4000             arm,pl041 arm,primecell            @             Ÿ           4         	  ;apb_pclk          mmci@5000             arm,pl180 arm,primecell            P             Ÿ   	   
        Ž                   —                    ·         ®           4              ;mclk apb_pclk         kmi@6000              arm,pl050 arm,primecell            `             Ÿ           4              ;KMIREFCLK apb_pclk        kmi@7000              arm,pl050 arm,primecell            p             Ÿ           4              ;KMIREFCLK apb_pclk        uart@9000             arm,pl011 arm,primecell                         Ÿ           4   	           ;uartclk apb_pclk          uart@a000             arm,pl011 arm,primecell                          Ÿ           4   	           ;uartclk apb_pclk          uart@b000             arm,pl011 arm,primecell            °             Ÿ           4   	           ;uartclk apb_pclk          uart@c000             arm,pl011 arm,primecell            À             Ÿ           4   	           ;uartclk apb_pclk          wdt@f000              arm,sp805 arm,primecell            ð             Ÿ            4              ;wdog_clk apb_pclk         timer@11000           arm,sp804 arm,primecell                        Ÿ           4                        ;timclken1 timclken2 apb_pclk          timer@12000           arm,sp804 arm,primecell                         Ÿ           4                       ;timclken1 timclken2 apb_pclk          i2c@16000             arm,versatile-i2c             `             <            K       dvi-transmitter@39            sil,sii9022-tpi sil,sii9022             9   ports            <            K       port@0                  endpoint            º   
                    port@1                 endpoint            º                             dvi-transmitter@60            sil,sii9022-cpi sil,sii9022             `         rtc@17000             arm,pl031 arm,primecell           p             Ÿ           4         	  ;apb_pclk          compact-flash@1a000           arm,vexpress-cf ata-generic                 ¡            Ê         clcd@1f000            arm,pl111 arm,primecell           ð          	  Ôcombined             Ÿ           4              ;clcdclk apb_pclk            ä7ù€        ù      port       endpoint            º                                               fixed-regulator-0             regulator-fixed         !3V3         0 2Z         H 2Z          `                 clk24mhz              fixed-clock         G            tn6         Tv2m:clk24mhz                     refclk1mhz            fixed-clock         G            t B@        Tv2m:refclk1mhz                   refclk32khz           fixed-clock         G            t  €         Tv2m:refclk32khz                  leds          
    gpio-leds      user1           „v2m:green:user1         ‘                 
  Šheartbeat         user2           „v2m:green:user2         ‘                  Šmmc0          user3           „v2m:green:user3         ‘                  Šcpu0          user4           „v2m:green:user4         ‘                  Šcpu1          user5           „v2m:green:user5         ‘                  Šcpu2          user6           „v2m:green:user6         ‘                  Šcpu3          user7           „v2m:green:user7         ‘                  Šcpu4          user8           „v2m:green:user8         ‘                  Šcpu5             mcc           arm,vexpress,config-bus                oscclk0           arm,vexpress-osc            »               Ô}x@“‡         G            Tv2m:oscclk0       oscclk1           arm,vexpress-osc            »              ÔjepßÒ@        G            Tv2m:oscclk1                  oscclk2           arm,vexpress-osc            »              Ôn6 n6         G            Tv2m:oscclk2            	      volt-vio              arm,vexpress-volt           »               !VIO          `        „VIO       temp-mcc              arm,vexpress-temp           »               „MCC       reset             arm,vexpress-reset          »             muxfpga           arm,vexpress-muxfpga            »             shutdown              arm,vexpress-shutdown           »             reboot            arm,vexpress-reboot         »   	          dvimode           arm,vexpress-dvimode            »                      chosen        aliases       6  ß/bus@40000000/motherboard/iofpga@7,00000000/uart@9000         6  ç/bus@40000000/motherboard/iofpga@7,00000000/uart@a000         6  ï/bus@40000000/motherboard/iofpga@7,00000000/uart@b000         6  ÷/bus@40000000/motherboard/iofpga@7,00000000/uart@c000         6  ÿ/bus@40000000/motherboard/iofpga@7,00000000/i2c@16000         5  /bus@40000000/motherboard/iofpga@7,00000000/i2c@2000          cpus             <            K       cpu@0           	cpu           arm,cortex-a9                                            cpu@1           	cpu           arm,cortex-a9                                           cpu@2           	cpu           arm,cortex-a9                                           cpu@3           	cpu           arm,cortex-a9                                              memory@60000000         	memory           `   @         reserved-memory          <            K             W   vram@4c000000             shared-dma-pool          L    €           &                    clcd@10020000             arm,pl111 arm,primecell                     	  Ôcombined             Ÿ       ,           4              ;clcdclk apb_pclk            ä©•À   port       endpoint            º                                
            memory-controller@100e0000            arm,pl341 arm,primecell                       4         	  ;apb_pclk          memory-controller@100e1000            arm,pl354 arm,primecell                       Ÿ       -          .           4         	  ;apb_pclk          timer@100e4000            arm,sp804 arm,primecell          @             Ÿ       0          1           4                 ;timer0clk timer1clk apb_pclk          	  -disabled          watchdog@100e5000             arm,sp805 arm,primecell          P             Ÿ       3           4              ;wdog_clk apb_pclk         scu@1e000000              arm,cortex-a9-scu                  X      timer@1e000600            arm,cortex-a9-twd-timer                         Ÿ              watchdog@1e000620             arm,cortex-a9-twd-wdt                           Ÿ              interrupt-controller@1e001000             arm,cortex-a9-gic            ^            <             4                                    cache-controller@1e00a000             arm,pl310-cache                         Ÿ       +            I        W           c                 t                          pmu           arm,cortex-a9-pmu         0   Ÿ       <          =          >          ?           „                  dcc           arm,vexpress,config-bus                extsaxiclk            arm,vexpress-osc            »               ÔÉÃ€úð€        G            Textsaxiclk        clcdclk           arm,vexpress-osc            »              Ô ˜–€Ä´         G            Tclcdclk                  tcrefclk              arm,vexpress-osc            »              Ô÷Š@õá         G          	  Ttcrefclk                     volt-vd10             arm,vexpress-volt           »               !VD10             `        „VD10          volt-vd10-s2              arm,vexpress-volt           »              !VD10_S2          `        „VD10_S2       volt-vd10-s3              arm,vexpress-volt           »              !VD10_S3          `        „VD10_S3       volt-vcc1v8           arm,vexpress-volt           »              !VCC1V8           `        „VCC1V8        volt-ddr2vtt              arm,vexpress-volt           »              !DDR2VTT          `        „DDR2VTT       volt-vcc3v3         »                arm,vexpress-volt           !VCC3V3           `        „VCC3V3        amp-vd10-s2           arm,vexpress-amp            »               „VD10_S2       amp-vd10-s3           arm,vexpress-amp            »              „VD10_S3       power-vd10-s2             arm,vexpress-power          »             	  „PVD10_S2          power-vd10-s3             arm,vexpress-power          »            	  „PVD10_S3             hsb@e0000000              simple-bus           <            K            W    à                ^            o             `   ‚                  $                    %                    &                    '            	model arm,hbi arm,vexpress,site compatible interrupt-parent #address-cells #size-cells ranges #interrupt-cells interrupt-map-mask interrupt-map reg bank-width interrupts phy-mode reg-io-width smsc,irq-active-high smsc,irq-push-pull vdd33a-supply vddvario-supply port1-otg phandle gpio-controller #gpio-cells clocks clock-names #clock-cells clock-output-names assigned-clocks assigned-clock-parents cd-gpios wp-gpios max-frequency vmmc-supply remote-endpoint reg-shift interrupt-names max-memory-bandwidth memory-region arm,pl11x,tft-r0g0b0-pads regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on clock-frequency label linux,default-trigger arm,vexpress,config-bridge arm,vexpress-sysreg,func freq-range serial0 serial1 serial2 serial3 i2c0 i2c1 device_type next-level-cache no-map status interrupt-controller cache-unified cache-level arm,data-latency arm,tag-latency interrupt-affinity 