     8  4   (            O                               (    hisilicon,hi6220-hikey hisilicon,hi6220                                  +            7HiKey Development Board    psci              arm,psci-0.2             =smc       cpus                         +       cpu-map    cluster0       core0            D         core1            D         core2            D         core3            D            cluster1       core0            D         core1            D         core2            D         core3            D   	            idle-states          Hpsci       cpu-sleep             arm,idle-state            U         f            }                                           cluster-sleep             arm,idle-state            U         f           }                        
                                cpu@0             arm,cortex-a53           cpu                           psci                
                                                  #           2  7                  cpu@1             arm,cortex-a53           cpu                          psci                
                                                  #           2  7                  cpu@2             arm,cortex-a53           cpu                          psci                
                                                  #           2  7                  cpu@3             arm,cortex-a53           cpu                          psci                
                                                  #           2  7                  cpu@100           arm,cortex-a53           cpu                          psci                                                                  #           2  7                  cpu@101           arm,cortex-a53           cpu                         psci                                                                  #           2  7                  cpu@102           arm,cortex-a53           cpu                         psci                                                                  #           2  7                  cpu@103           arm,cortex-a53           cpu                         psci                                                                  #           2  7            	      l2-cache0             cache               
      l2-cache1             cache                        cpu_opp_table             operating-points-v2          L               opp00           W    e         ^ ހ        l        opp01           W             ^ ހ        l        opp02           W    +s@        ^         l        opp03           W    98p         ^ `        l        opp04           W    G         ^ KP        l           interrupt-controller@f6801000             arm,gic-400       @                                 @             `                              }                          	                    timer             arm,armv8-timer                   0                                
        soc           simple-bus                       +               sram@fff80000         !    hisilicon,hi6220-sramctrl syscon                                            ao_ctrl@f7800000              hisilicon,hi6220-aoctrl syscon                                                                 sys_ctrl@f7030000              hisilicon,hi6220-sysctrl syscon                                                                media_ctrl@f4410000       "    hisilicon,hi6220-mediactrl syscon                A                                           T      pm_ctrl@f7032000              hisilicon,hi6220-pmctrl syscon                                         acpu_sctrl@f6504000       #    hisilicon,hi6220-acpu-sctrl syscon               P@                               X      medianoc_ade@f4520000             syscon               R        @             S      stub_clock            hisilicon,hi6220-stub-clk                                 mbox-tx                                        serial@f8015000           arm,pl011 arm,primecell              P                       $                  $      $        uartclk apb_pclk          serial@f7111000           arm,pl011 arm,primecell                                     %                                uartclk apb_pclk            default                                      	        $rx tx           .okay            5      )        Eр   bluetooth             ti,wl1835-st            Z                            
  ext_clock            serial@f7112000           arm,pl011 arm,primecell                                      &                                uartclk apb_pclk            default                       .okay          	  gLS-UART0          serial@f7113000           arm,pl011 arm,primecell              0                       '                                uartclk apb_pclk            default                       .okay          	  gLS-UART1          serial@f7114000           arm,pl011 arm,primecell              @                       (                                uartclk apb_pclk            default                     	  .disabled          dma@f7370000              hisilicon,k3-dma-1.0                 7                 m           x                              T                                   hi6220_dma          .okay                      timer@f8008000            arm,sp804 arm,primecell                                                                                      timer1 timer2 apb_pclk        rtc@f8003000              arm,pl031 arm,primecell               0                                         %      	  apb_pclk          rtc@f8004000              arm,pl031 arm,primecell               @                                         &      	  apb_pclk          pinmux@f7010000           pinctrl-single                       |                     +                                                     p         P              X              `              h              p              x                                                                                             !             +             0             8             J             z             ~                                                                  default            !   "   #   $   %            ,   gpio-range                                boot_sel_pmx_func           =                    !      emmc_pmx_func         P  =                                                          $                ;      sd_pmx_func       0  =                                                       @      sd_pmx_idle       0  =                                                 C      sdio_pmx_func         0  =  (      ,      0      4      8      <                H      sdio_pmx_idle         0  =  (     ,     0     4     8     <               K      isp_pmx_func            =   $       (       ,       0      4      8      <       @       D       H       L      P      T       X       \       `          hkadc_ssi_pmx_func          =   h                "      codec_clk_pmx_func          =   l                #      codec_pmx_func           =   p      t       x       |          fm_pmx_func          =                              bt_pmx_func          =                                  pwm_in_pmx_func         =                  $      bl_pwm_pmx_func         =                  %      uart0_pmx_func          =                    uart1_pmx_func           =                                              uart2_pmx_func           =                                              uart3_pmx_func           =                                      uart4_pmx_func           =                                      uart5_pmx_func          =                i2c0_pmx_func           =                          0      i2c1_pmx_func           =                          2      i2c2_pmx_func           =                          4      spi0_pmx_func            =                                -         pinmux@f7010800           pinconf-single                                           +                                  default            &   '   (   )   *   boot_sel_cfg_func           =                Q                      n                            p            &      hkadc_ssi_cfg_func          =   l            Q                      n                             p            '      emmc_clk_cfg_func           =              Q                      n                             p            <      emmc_cfg_func         H  =                                             $      (            Q                      n                           p            =      emmc_rst_cfg_func           =  ,            Q                      n                            p            >      sd_clk_cfg_func         =               Q                      n                         0   p            A      sd_clk_cfg_idle         =               Q                     n                             p            D      sd_cfg_func       (  =                                            Q                      n                             p            B      sd_cfg_idle       (  =                                            Q                     n                             p            E      sdio_clk_cfg_func           =  4            Q                      n                             p            I      sdio_clk_cfg_idle           =  4            Q                     n                             p            L      sdio_cfg_func         (  =  8      <      @      D      H            Q                      n                           p            J      sdio_cfg_idle         (  =  8      <      @      D      H            Q                      n                            p            M      isp_cfg_func1         x  =   (       ,       0       4       8       <       @       D       H       L       P       X       \       `       d            Q                      n                             p      isp_cfg_idle1           =   4       8            Q                     n                             p      isp_cfg_func2           =   T            Q                     n                             p      codec_clk_cfg_func          =   p            Q                      n                            p            (      codec_clk_cfg_idle          =   p            Q                      n                             p      codec_cfg_func1         =   t            Q                     n                             p      codec_cfg_func2         =   x       |                   Q                      n                            p      codec_cfg_idle2         =   x       |                   Q                      n                             p      fm_cfg_func          =                                    Q                     n                             p      bt_cfg_func          =                                    Q                      n                             p      bt_cfg_idle          =                                    Q                     n                             p      pwm_in_cfg_func         =               Q                     n                             p            )      bl_pwm_cfg_func         =               Q                     n                             p            *      uart0_cfg_func1         =               Q                      n                            p      uart0_cfg_func2         =               Q                      n                            p      uart1_cfg_func1         =                      Q                      n                            p                  uart1_cfg_func2         =                      Q                      n                             p                  uart2_cfg_func           =                                    Q                      n                             p                  uart3_cfg_func           =                                Q                     n                             p                  uart4_cfg_func           =                                Q                     n                             p                  uart5_cfg_func          =                    Q                     n                             p      i2c0_cfg_func           =                      Q                      n                             p            1      i2c1_cfg_func           =                      Q                      n                             p            3      i2c2_cfg_func           =                      Q                      n                             p            5      spi0_cfg_func            =                                Q                      n                             p            .         pinmux@f8001800           pinconf-single                        x                     +                                  default            +   rstout_n_cfg_func           =                Q                      n                             p            +      pmu_peri_en_cfg_func            =               Q                      n                             p      sysclk0_en_cfg_func         =               Q                      n                             p      jtag_tdo_cfg_func           =               Q                      n                             p      rf_reset_cfg_func           =   p       t            Q                      n                             p         gpio@f8011000             arm,pl061 arm,primecell                                     4                                        }                        	  apb_pclk          O  PWR_HOLD DSI_SEL USB_HUB_RESET_N USB_SEL HDMI_PD WL_REG_ON PWRON_DET 5V_HUB_EN              6      gpio@f8012000             arm,pl061 arm,primecell                                      5                                        }                        	  apb_pclk          :  SD_DET HDMI_INT PMU_IRQ_N WL_HOST_WAKE NC NC NC BT_REG_ON                     gpio@f8013000             arm,pl061 arm,primecell              0                       6                                        }                        	  apb_pclk          B  GPIO-A GPIO-B GPIO-C GPIO-D GPIO-E USB_ID_DET USB_VBUS_DET GPIO-H         gpio@f8014000             arm,pl061 arm,primecell              @                       7                                  ,       P                    }                        	  apb_pclk          %  GPIO3_0 NC NC  NC  WLAN_ACTIVE NC NC                }      gpio@f7020000             arm,pl061 arm,primecell                                      8                                  ,       X                    }                        	  apb_pclk          ?  USER_LED1 USER_LED2 USER_LED3 USER_LED4 SD_SEL NC NC BT_ACTIVE              |      gpio@f7021000             arm,pl061 arm,primecell                                     9                                  ,       `                    }                        	  apb_pclk          ?  NC NC [UART1_RxD] [UART1_TxD] [AUX_SSI1] NC [PCM_CLK] [PCM_FS]        gpio@f7022000             arm,pl061 arm,primecell                                      :                                  ,       h                    }                        	  apb_pclk          =  [SPI0_DIN] [SPI0_DOUT] [SPI0_CS] [SPI0_SCLK] NC NC NC GPIO-G                /      gpio@f7023000             arm,pl061 arm,primecell              0                       ;                                  ,       p                    }                        	  apb_pclk          $  NC NC NC NC [PCM_DI] [PCM_DO] NC NC       gpio@f7024000             arm,pl061 arm,primecell              @                       <                                   ,       x      ,                          }                        	  apb_pclk            NC [CEC_CLK_19_2MHZ] NC               gpio@f7025000             arm,pl061 arm,primecell              P                       =                                  ,                           }                        	  apb_pclk          '   GPIO-J GPIO-L NC NC NC NC [ISP_CCLK0]        gpio@f7026000             arm,pl061 arm,primecell              `                       >                                   ,              ,                          }                        	  apb_pclk          ?  BOOT_SEL [ISP_CCLK1] GPIO-I GPIO-K NC NC [I2C2_SDA] [I2C2_SCL]        gpio@f7027000             arm,pl061 arm,primecell              p                       ?                                   ,             ,                          }                        	  apb_pclk          "  [I2C3_SDA] [I2C3_SCL]  NC NC NC           gpio@f7028000             arm,pl061 arm,primecell                                     @                                   ,       !      ,      +                    }                        	  apb_pclk          8  [BT_PCM_XFS] [BT_PCM_DI] [BT_PCM_DO] NC NC NC NC GPIO-F       gpio@f7029000             arm,pl061 arm,primecell                                     A                                  ,       0                    }                        	  apb_pclk          h  [UART0_RX] [UART0_TX] [BT_UART1_CTS] [BT_UART1_RTS] [BT_UART1_RX] [BT_UART1_TX] [UART0_CTS] [UART0_RTS]       gpio@f702a000             arm,pl061 arm,primecell                                     B                                  ,       8                    }                        	  apb_pclk          Z  [UART0_RxD] [UART0_TxD] [I2C0_SCL] [I2C0_SDA] [I2C1_SCL] [I2C1_SDA] [I2C2_SCL] [I2C2_SDA]         gpio@f702b000             arm,pl061 arm,primecell                                     C                             0     ,       J      ,      z      ,      ~                    }                        	  apb_pclk          
        NC          gpio@f702c000             arm,pl061 arm,primecell                                     D                                  ,                           }                        	  apb_pclk          gpio@f702d000             arm,pl061 arm,primecell                                     E                                  ,                           }                        	  apb_pclk          gpio@f702e000             arm,pl061 arm,primecell                                     F                                  ,                           }                        	  apb_pclk          gpio@f702f000             arm,pl061 arm,primecell                                     G                                  ,                           }                        	  apb_pclk          spi@f7106000              arm,pl022 arm,primecell              `                       2                                                	  apb_pclk            default            -   .                      /               .okay          i2c@f7100000              snps,designware-i2c                                      ,                            ,        default            0   1        .okay          i2c@f7101000              snps,designware-i2c                                                    -             ,        default            2   3        .okay          i2c@f7102000              snps,designware-i2c                                                     .             ,        default            4   5        .okay                         +       adv7533@39            adi,adv7533             9                                     6                          -       ports                        +       port@0     endpoint            >   7            W         port@2                 endpoint            >   8            P                  usbphy            hisilicon,hi6220-usb-phy            N            Y   9        d               :      usb@f72c0000              hisilicon,hi6220-usb                 ,                    :      	  usb2-phy                           otg         otg                             <                                                              M         mailbox@f7510000              hisilicon,hi6220-mbox                 Q                                    ^                                dwmmc0@f723d000           hisilicon,hi6220-dw-mshc                 #                       H                                ciu biu                        reset           default            ;   <   =   >                                        ?      dwmmc1@f723e000           hisilicon,hi6220-dw-mshc            d                #                       I                        +                                 ciu biu                       reset           default idle               @   A   B           C   D   E        &            8         I         V         c        p   F           G                    }                        dwmmc2@f723f000           hisilicon,hi6220-dw-mshc                 #                       J                                ciu biu                       reset           default idle               H   I   J           K   L   M                                        N           O                     +       wlcore@2          
    ti,wl1835                                                  watchdog@f8005000             arm,sp805-wdt arm,primecell               P                                                       wdog_clk apb_pclk         tsensor@0,f7030700            hisilicon,tsensor                                                                 thermal_clk                        Q      i2s@f7118000              hisilicon,hi6210-i2s                                        {                  
      8        dacodec i2s-base                                $rx tx                      -      ports      port@0              ~   endpoint            >   P        i2s             8               thermal-zones      cls0                         d                     Q      trips      trip-point@0            /          ;             passive       trip-point@1            / $        ;             passive             R         cooling-maps       map0            F   R      `  K                        	               ade@f4100000              hisilicon,hi6220-ade                         x       	  Zade_base            d   S           T                  s               T      T      T         (  clk_ade_core clk_codec_jpeg clk_ade_pix         5   T      T           Eu* *          y        .okay       port       endpoint            >   U            V            dsi@f4107800              hisilicon,hi6220-dsi                 x                    T           pclk            .okay       ports                        +       port@0                  endpoint            >   V            U         port@1                 endpoint@0          >   W            7               debug@f6590000        &    arm,coresight-cpu-debug arm,primecell                Y                        ;      	  apb_pclk             D         debug@f6592000        &    arm,coresight-cpu-debug arm,primecell                Y                        ;      	  apb_pclk             D         debug@f6594000        &    arm,coresight-cpu-debug arm,primecell                Y@                       ;      	  apb_pclk             D         debug@f6596000        &    arm,coresight-cpu-debug arm,primecell                Y`                       ;      	  apb_pclk             D         debug@f65d0000        &    arm,coresight-cpu-debug arm,primecell                ]                        ;      	  apb_pclk             D         debug@f65d2000        &    arm,coresight-cpu-debug arm,primecell                ]                        ;      	  apb_pclk             D         debug@f65d4000        &    arm,coresight-cpu-debug arm,primecell                ]@                       ;      	  apb_pclk             D         debug@f65d6000        &    arm,coresight-cpu-debug arm,primecell                ]`                       ;      	  apb_pclk             D   	      gpu@f4080000          #    hisilicon,hi6220-mali arm,mali-450                                                  ~         ~         ~         ~         ~         ~         ~         ~         ~         ~         ~         8  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1 pp2 ppmmu2 pp3 ppmmu3             T      T         	  core bus            5   T      T           Ee D         ao_g3d media_g3d                     T          funnel@f6401000       +    arm,coresight-dynamic-funnel arm,primecell               @                    X          	  apb_pclk       out-ports      port       endpoint            >   Y            [            in-ports       port       endpoint            >   Z            b               etf@f6402000               arm,coresight-tmc arm,primecell              @                     X          	  apb_pclk       in-ports       port       endpoint            >   [            Y            out-ports      port       endpoint            >   \            ]               replicator             arm,coresight-static-replicator             X          	  apb_pclk       in-ports       port       endpoint            >   ]            \            out-ports                        +       port@0                  endpoint            >   ^            `         port@1                 endpoint            >   _            a               etr@f6404000               arm,coresight-tmc arm,primecell              @@                    X          	  apb_pclk       in-ports       port       endpoint            >   `            ^               tpiu@f6405000         !    arm,coresight-tpiu arm,primecell                 @P                    X          	  apb_pclk       in-ports       port       endpoint            >   a            _               funnel@f6501000       +    arm,coresight-dynamic-funnel arm,primecell               P                    X          	  apb_pclk       out-ports      port       endpoint            >   b            Z            in-ports                         +       port@0                  endpoint            >   c            k         port@1                 endpoint            >   d            l         port@2                 endpoint            >   e            m         port@3                 endpoint            >   f            n         port@4                 endpoint            >   g            o         port@5                 endpoint            >   h            p         port@6                 endpoint            >   i            q         port@7                 endpoint            >   j            r               etm@f659c000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               s   out-ports      port       endpoint            >   k            c               etm@f659d000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               t   out-ports      port       endpoint            >   l            d               etm@f659e000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               u   out-ports      port       endpoint            >   m            e               etm@f659f000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               v   out-ports      port       endpoint            >   n            f               etm@f65dc000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D               w   out-ports      port       endpoint            >   o            g               etm@f65dd000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D               x   out-ports      port       endpoint            >   p            h               etm@f65de000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D               y   out-ports      port       endpoint            >   q            i               etm@f65df000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D   	            z   out-ports      port       endpoint            >   r            j               cti@f6403000               arm,coresight-cti arm,primecell              @0                    X          	  apb_pclk          cti@f6598000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              s      cti@f6599000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              t      cti@f659a000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              u      cti@f659b000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              v      cti@f65d8000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D              w      cti@f65d9000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D              x      cti@f65da000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D              y      cti@f65db000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D   	           z         aliases         /soc/serial@f8015000            /soc/serial@f7111000            /soc/serial@f7112000            /soc/serial@f7113000          chosen          serial3:115200n8          memory@0             memory        `                                                     `     A            "                reserved-memory                      +               ramoops@21f00000              ramoops              !                                                linux,cma             shared-dma-pool                                           reboot-mode-syscon@5f01000            syscon simple-mfd                           reboot-mode           syscon-reboot-mode                      wfU        &wfU         6wfU         regulator@0           regulator-fixed         DSYS_5V          S LK@        k LK@                              {      regulator@1           regulator-fixed         DVDD_3V3         S 2Z        k 2Z                             {            N      regulator@2           regulator-fixed         D5V_HUB          S LK@        k LK@                    6                           {            9      wl1835-pwrseq             mmc-pwrseq-simple              6                        
  ext_clock              
           
            O      leds          
    gpio-leds      user_led1           ggreen:user1         a   |              
  heartbeat         user_led2           ggreen:user2         a   |               mmc0          user_led3           ggreen:user3         a   |               mmc1          user_led4           ggreen:user4         a   |                        none          wlan_active_led         gyellow:wlan         a   }               phy0tx          off       bt_active_led           gblue:bt         a   |               hci0-power          off          pmic@f8000000             hisilicon,hi655x-pmic                                                       }           #                         regulators     LDO2          	  DLDO2_2V8            S &%        k 0         .   x      LDO7          
  DLDO7_SDIO           S w@        k 2Z        .   x            F      LDO10           DLDO10_2V85          S w@        k -        .  h            G      LDO13         
  DLDO13_1V8           S j         k 0        .   x      LDO14         
  DLDO14_2V8           S &%        k 0         .   x      LDO15         
  DLDO15_1V8           S j         k 0                          .   x      LDO17         
  DLDO17_2V5           S &%        k 0         .   x      LDO19         
  DLDO19_3V0           S w@        k -        .  h            ?      LDO21         
  DLDO21_1V8           S -P        k                  .   x      LDO22         
  DLDO22_1V2           S         k O                          .   x            firmware       optee             linaro,optee-tz          =smc          sound_card            audio-graph-card            J   ~         	compatible interrupt-parent #address-cells #size-cells model method cpu entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us phandle wakeup-latency-us device_type reg enable-method next-level-cache clocks operating-points-v2 cpu-idle-states #cooling-cells dynamic-power-coefficient opp-shared opp-hz opp-microvolt clock-latency-ns #interrupt-cells interrupt-controller interrupts ranges #clock-cells #reset-cells hisilicon,hi6220-clk-sram mbox-names mboxes clock-names pinctrl-names pinctrl-0 dmas dma-names status assigned-clocks assigned-clock-rates enable-gpios label #dma-cells dma-channels dma-requests dma-no-cci dma-type #pinctrl-cells #gpio-range-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range #pinctrl-single,gpio-range-cells pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,drive-strength gpio-controller #gpio-cells gpio-line-names gpio-ranges bus-id enable-dma num-cs cs-gpios i2c-sda-hold-time-ns pd-gpios adi,dsi-lanes #sound-dai-cells remote-endpoint #phy-cells phy-supply hisilicon,peripheral-syscon phys phy-names dr_mode g-rx-fifo-size g-np-tx-fifo-size g-tx-fifo-size #mbox-cells resets reset-names cap-mmc-highspeed non-removable bus-width vmmc-supply pinctrl-1 card-detect-delay cap-sd-highspeed sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 vqmmc-supply disable-wp cd-gpios cap-power-off-card mmc-pwrseq #thermal-sensor-cells hisilicon,sysctrl-syscon dai-format polling-delay polling-delay-passive sustainable-power thermal-sensors temperature hysteresis trip cooling-device reg-names hisilicon,noc-syscon dma-coherent interrupt-names arm,cs-dev-assoc serial0 serial1 serial2 serial3 stdout-path record-size console-size ftrace-size reusable linux,cma-default offset mode-normal mode-bootloader mode-recovery regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on vin-supply gpio reset-gpios post-power-on-delay-ms power-off-delay-us linux,default-trigger panic-indicator default-state pmic-gpios regulator-enable-ramp-delay dais 