  !   8     (            u  X                             *    archermind,mt6797-x20-dev mediatek,mt6797                                    +            7Mediatek X20 Development Board        	   =embedded       psci              arm,psci-0.2             Jsmc       cpus                         +       cpu@0            Qcpu           arm,cortex-a53           ]psci             k          cpu@1            Qcpu           arm,cortex-a53           ]psci             k         cpu@2            Qcpu           arm,cortex-a53           ]psci             k         cpu@3            Qcpu           arm,cortex-a53           ]psci             k         cpu@100          Qcpu           arm,cortex-a53           ]psci             k         cpu@101          Qcpu           arm,cortex-a53           ]psci             k        cpu@102          Qcpu           arm,cortex-a53           ]psci             k        cpu@103          Qcpu           arm,cortex-a53           ]psci             k        cpu@200          Qcpu           arm,cortex-a72           ]psci             k         cpu@201          Qcpu           arm,cortex-a72           ]psci             k           oscillator-26m            fixed-clock          o             |         clk26m        timer             arm,armv8-timer                   0                                    
         topckgen@10000000             mediatek,mt6797-topckgen             k                       o                     syscon@10001000            mediatek,mt6797-infracfg syscon          k                      o                     pinctrl@10005000              mediatek,mt6797-pinctrl       P   k     P                           $             (             ,              !   gpio iocfgl iocfgb iocfgr iocfgt                             uart0      pins0                         uart1                  pins1                         i2c0       pins0              %  &         i2c1                   pins1              7  8         i2c2                
   pins2              `  _         i2c3                   pins3              K  J         i2c4                	   pins4                         i2c5                   pins5                         i2c6                   pins6                         i2c7                   pins7                            power-controller@10006000             mediatek,mt6797-scpsys                       k     `                       
                     mfg mm vdec                  watchdog@10007000         (    mediatek,mt6797-wdt mediatek,mt6589-wdt          k     p              apmixed@1000c000              mediatek,mt6797-apmixedsys           k                      o         intpol-controller@10200620        .    mediatek,mt6797-sysirq mediatek,mt6577-sysirq                    $                         k    "             "                         serial@11002000       *    mediatek,mt6797-uart mediatek,mt6577-uart            k                              [                        .      	   baud bus          	  5disabled          serial@11003000       *    mediatek,mt6797-uart mediatek,mt6577-uart            k     0                        \                        .      	   baud bus            5okay            <default         J         serial@11004000       *    mediatek,mt6797-uart mediatek,mt6577-uart            k     @                        ]                        .      	   baud bus          	  5disabled          serial@11005000       *    mediatek,mt6797-uart mediatek,mt6577-uart            k     P                        ^                        .      	   baud bus          	  5disabled          i2c@11007000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T              k     p                                     T                        .      	   main dma            W   
                     +          	  5disabled          i2c@11008000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k                                         U                        .      	   main dma            W   
                     +            5okay            <default         J         i2c@11009000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k                                          V                        .      9         main dma arb            W   
                     +          	  5disabled          i2c@1100d000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T   	          k                                         W                        .      ;         main dma arb            W   
                     +          	  5disabled          i2c@1100e000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k                                          X                  6      .      	   main dma            W   
                     +            5okay            <default         J         i2c@11010000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k                                         Y                  7      .      	   main dma            W   
                     +            5okay            <default         J         i2c@11011000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k                                         Z                  5      .      	   main dma            W   
                     +            5okay            <default         J   	      i2c@11013000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k    0                                     _                  8      .      9         main dma arb            W   
                     +            5okay            <default         J   
      i2c@11014000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k    @                                    `                  :      .      ;         main dma arb            W   
                     +            5okay            <default         J         i2c@1101c000          (    mediatek,mt6797-i2c mediatek,mt6577-i2c         T             k                                        S                  <      .      	   main dma            W   
                     +            5okay            <default         J         syscon@14000000           mediatek,mt6797-mmsys syscon             k                       o         syscon@15000000           mediatek,mt6797-imgsys syscon            k                       o         syscon@16000000           mediatek,mt6797-vdecsys syscon           k                       o         syscon@17000000           mediatek,mt6797-vencsys syscon           k                       o         interrupt-controller@19000000             arm,gic-v3          $                              	                  0   k                                 $                            aliases         a/serial@11003000          memory@40000000          Qmemory           k    @                chosen          iserial0:115200n8             	compatible interrupt-parent #address-cells #size-cells model chassis-type method device_type enable-method reg #clock-cells clock-frequency clock-output-names interrupts phandle reg-names gpio-controller #gpio-cells pinmux #power-domain-cells clocks clock-names infracfg interrupt-controller #interrupt-cells status pinctrl-names pinctrl-0 id clock-div serial0 stdout-path 