  /b   8  ,`   (              ,(                             9    renesas,rzv2h-evk renesas,r9a09g057h44 renesas,r9a09g057                                  /   &Renesas RZ/V2H EVK Board based on r9a09g057h44     audio-clk             fixed-clock          ,             9X          I         cpus                                cpu@0             arm,cortex-a55           Q             Ucpu          a            rpsci          cpu@100           arm,cortex-a55           Q            Ucpu          a            rpsci          cpu@200           arm,cortex-a55           Q            Ucpu          a            rpsci          cpu@300           arm,cortex-a55           Q            Ucpu          a            rpsci          cache-controller-0            cache                                              I            psci              arm,psci-1.0 arm,psci-0.2            ysmc       qextal-clk            fixed-clock          ,             9n6          I         rtxin-clk             fixed-clock          ,             9            I         soc           simple-bus                                                   pinctrl@10410000              renesas,r9a09g057-pinctrl            Q    A                                                                         `                                                               I      i2c0            '             I   	      i2c1            '             I   
      i2c2            '             I         i2c3            '             I         i2c6            '  $  %         I         i2c7            '  &  '         I         i2c8            '             I         scif            .SCIF_TXD SCIF_RXD           3            I         sd1-pwr-en-hog           L        U   S             [        gsd1_pwr_en        sd1          I      sd1_dat_cmd       '  .SD1DAT0 SD1DAT1 SD1DAT2 SD1DAT3 SD1CMD           q        3           ~          sd1_clk         .SD1CLK          3           ~          sd1_cd          '  L            clock-controller@10420000             renesas,r9a09g057-cpg            Q    B                                   audio_extal rtxin qextal             ,                                   I         system-controller@10430000            renesas,r9a09g057-sys            Q    C                                            0      	  disabled          timer@11800000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                 C               m                   okay          timer@11801000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                D               n                   okay          timer@14000000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                  E               o                   okay          timer@14001000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                 F               p                   okay          timer@12c00000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                 G               q                   okay          timer@12c01000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                H               r                   okay          timer@12c02000        $    renesas,r9a09g057-ostm renesas,ostm          Q                                                 I               s                   okay          timer@12c03000        $    renesas,r9a09g057-ostm renesas,ostm          Q    0                                            J               t                   okay          watchdog@11c00400             renesas,r9a09g057-wdt            Q                              K         L        pclk oscclk                u                 	  disabled          watchdog@14400000             renesas,r9a09g057-wdt            Q    @                           M         N        pclk oscclk                v                   okay          watchdog@13000000             renesas,r9a09g057-wdt            Q                                O         P        pclk oscclk                w                 	  disabled          watchdog@13000400             renesas,r9a09g057-wdt            Q                               Q         R        pclk oscclk                x                 	  disabled          serial@11c01400           renesas,scif-r9a09g057           Q                  l                                                                                         2  eri rxi txi bri dri tei tei-dri rxi-edge txi-edge                             fck                                   okay                       default       i2c@14400400              renesas,riic-r9a09g057           Q    @              `                                                                                         tei ri ti spi sti naki ali tmoi                                                                              okay               	        default          9       i2c@14400800              renesas,riic-r9a09g057           Q    @              `                                                                                         tei ri ti spi sti naki ali tmoi                                                                              okay               
        default          9       i2c@14400c00              renesas,riic-r9a09g057           Q    @              `                                                                                         tei ri ti spi sti naki ali tmoi                                                                              okay                       default          9       i2c@14401000              renesas,riic-r9a09g057           Q    @              `                                                                                          tei ri ti spi sti naki ali tmoi                                                                              okay                       default          9       i2c@14401400              renesas,riic-r9a09g057           Q    @              `                                                                                         tei ri ti spi sti naki ali tmoi                                                                            	  disabled          i2c@14401800              renesas,riic-r9a09g057           Q    @              `                                                                                         tei ri ti spi sti naki ali tmoi                                                                            	  disabled          i2c@14401c00              renesas,riic-r9a09g057           Q    @              `                                                                                         tei ri ti spi sti naki ali tmoi                                                                              okay                       default          9       i2c@14402000              renesas,riic-r9a09g057           Q    @               `                  	                                                                       tei ri ti spi sti naki ali tmoi                                                                              okay                       default          9       i2c@11c01000              renesas,riic-r9a09g057           Q                  `                           
                                                              tei ri ti spi sti naki ali tmoi                                                                              okay                       default          9       interrupt-controller@14900000             arm,gic-v3            Q                                                                           	            I         mmc@15c00000              renesas,sdhi-r9a09g057           Q                                             0                                               core clkh cd aclk                                   	  disabled          mmc@15c10000              renesas,sdhi-r9a09g057           Q                                             0                                               core clkh cd aclk                                     okay                                  default state_uhs                                                      )      mmc@15c20000              renesas,sdhi-r9a09g057           Q                                             0                                               core clkh cd aclk                                   	  disabled             timer             arm,armv8-timer       P  7                                             
                     %  sec-phys phys virt hyp-phys hyp-virt          aliases         K/soc/i2c@14400400           P/soc/i2c@14400800           U/soc/i2c@14400c00           Z/soc/i2c@14401000           _/soc/i2c@14401c00           d/soc/i2c@14402000           i/soc/i2c@11c01000           n/soc/mmc@15c10000           s/soc/serial@11c01400          chosen          {ignore_loglevel         serial0:115200n8          memory@48000000          Umemory           Q    H               memory@240000000             Umemory           Q   @                regulator1            regulator-fixed         fixed-3.3V           2Z         2Z                           I         regulator-vccq-sdhi1              regulator-gpio          SDHI1 VccQ          U      R             w@         2Z                     2Z     w@            I            	compatible #address-cells #size-cells model #clock-cells clock-frequency phandle reg device_type next-level-cache enable-method cache-unified cache-size cache-level interrupt-parent ranges clocks gpio-controller #gpio-cells gpio-ranges #interrupt-cells interrupt-controller power-domains resets pinmux pins renesas,output-impedance gpio-hog gpios output-high line-name input-enable slew-rate clock-names #reset-cells #power-domain-cells status interrupts interrupt-names pinctrl-0 pinctrl-names pinctrl-1 vmmc-supply vqmmc-supply bus-width sd-uhs-sdr50 sd-uhs-sdr104 interrupts-extended i2c0 i2c1 i2c2 i2c3 i2c6 i2c7 i2c8 mmc1 serial0 bootargs stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on gpios-states 