  t   8  o`   (            X  o(                                 xlnx,zynqmp-zc1751 xlnx,zynqmp                                   &ZynqMP zc1751-xm019-dc5 RevA       options    u-boot            u-boot,config            ,                 cpus                                cpu@0             arm,cortex-a53           <cpu          Hpsci             V            j             n            ~                  
                  cpu@1             arm,cortex-a53           <cpu          Hpsci             j            V            n            ~                     cpu@2             arm,cortex-a53           <cpu          Hpsci             j            V            n            ~                     cpu@3             arm,cortex-a53           <cpu          Hpsci             j            V            n            ~               	      l2-cache              cache                                           idle-states          psci       cpu-sleep-0           arm,idle-state           @                        ,           X          '                        opp-table-cpu             operating-points-v2                         opp00           *    G        1 B@        ?        opp01           *    #E        1 B@        ?        opp02           *    ׃        1 B@        ?        opp03           *            1 B@        ?           reserved-memory                                  P   memory@3ed00000          W         j    >                           memory@3ef00000          W         j    >                              zynqmp-ipi           ^          xlnx,zynqmp-ipi-mailbox         i           z       #                                                P   mailbox@ff9905c0             ^          xlnx,zynqmp-ipi-dest-mailbox          @   j                                                      X  local_request_region local_response_region remote_request_region remote_response_region                                   
         dcc           arm,dcc       	  disabled             ^      pmu           arm,cortex-a53-pmu          i         0  z                                                            	      psci              arm,psci-0.2             Osmc       firmware       optee             linaro,optee-tz          Osmc       zynqmp-firmware           xlnx,zynqmp-firmware                        Osmc          ^               power-management             ^          xlnx,zynqmp-power           i           z       #              
       
           tx rx         soc-nvmem             xlnx,zynqmp-nvmem-fw       nvmem-layout              fixed-layout                               soc-revision@0           j             efuse-dna@c          j            efuse-usr0@20            j             efuse-usr1@24            j   $         efuse-usr2@28            j   (         efuse-usr3@2c            j   ,         efuse-usr4@30            j   0         efuse-usr5@34            j   4         efuse-usr6@38            j   8         efuse-usr7@3c            j   <         efuse-miscusr@40             j   @         efuse-chash@50           j   P         efuse-pufmisc@54             j   T         efuse-sec@58             j   X         efuse-spkid@5c           j   \         efuse-aeskey@60          j   `          efuse-ppk0hash@a0            j      0      efuse-ppk1hash@d0            j      0      efuse-pufuser@100            j                  pcap              xlnx,zynqmp-pcap-fpga                     zynqmp-aes            xlnx,zynqmp-aes       reset-controller              xlnx,zynqmp-reset                                pinctrl           xlnx,zynqmp-pinctrl         okay       i2c0-default                   mux         i2c0_18_grp         i2c0          conf            i2c0_18_grp                                         i2c0-gpio-grp                  mux         gpio0_74_grp gpio0_75_grp           gpio0         conf            gpio0_74_grp gpio0_75_grp                                  i2c1-default                   mux         i2c1_19_grp         i2c1          conf            i2c1_19_grp                                         i2c1-gpio-grp                  mux         gpio0_76_grp gpio0_77_grp           gpio0         conf            gpio0_76_grp gpio0_77_grp                                  uart0-default               #   mux         uart0_17_grp            uart0         conf            uart0_17_grp                                conf-rx         (MIO70            -      conf-tx         (MIO71            A         uart1-default               $   mux         uart1_18_grp            uart1         conf            uart1_18_grp                                conf-rx         (MIO73            -      conf-tx         (MIO72            A         gem1-default                   mux       
  ethernet1           ethernet1_0_grp       conf            ethernet1_0_grp                             conf-rx       $  (MIO44 MIO45 MIO46 MIO47 MIO48 MIO49          -         N      conf-tx       $  (MIO38 MIO39 MIO40 MIO41 MIO42 MIO43          A         `      mux-mdio            mdio1           mdio1_0_grp       conf-mdio           mdio1_0_grp                                A         sdhci0-default                 mux         sdio0_0_grp         sdio0         conf            sdio0_0_grp                                A      mux-cd          sdio0_cd_0_grp        	  sdio0_cd          conf-cd         sdio0_cd_0_grp           -                                     mux-wp          sdio0_wp_0_grp        	  sdio0_wp          conf-wp         sdio0_wp_0_grp           -                                        watchdog0-default               &   mux-clk         swdt0_clk_1_grp       
  swdt0_clk         conf-clk            swdt0_clk_1_grp                mux-rst         swdt0_rst_1_grp       
  swdt0_rst         conf-rst            swdt0_rst_1_grp          A                    ttc0-default                   mux-clk         ttc0_clk_0_grp        	  ttc0_clk          conf-clk            ttc0_clk_0_grp                 mux-wav         ttc0_wav_0_grp        	  ttc0_wav          conf-wav            ttc0_wav_0_grp           A                    ttc1-default                    mux-clk         ttc1_clk_0_grp        	  ttc1_clk          conf-clk            ttc1_clk_0_grp                 mux-wav         ttc1_wav_0_grp        	  ttc1_wav          conf-wav            ttc1_wav_0_grp           A                    ttc2-default                !   mux-clk         ttc2_clk_0_grp        	  ttc2_clk          conf-clk            ttc2_clk_0_grp                 mux-wav         ttc2_wav_0_grp        	  ttc2_wav          conf-wav            ttc2_wav_0_grp           A                    ttc3-default                "   mux-clk         ttc3_clk_0_grp        	  ttc3_clk          conf-clk            ttc3_clk_0_grp                 mux-wav         ttc3_wav_0_grp        	  ttc3_wav          conf-wav            ttc3_wav_0_grp           A                       gpio              xlnx,zynqmp-gpio-modepin             q                       %      clock-controller             ^                     xlnx,zynqmp-clk                               A  pss_ref_clk video_clk pss_alt_ref_clk aux_ref_clk gt_crx_ref_clk                            timer             arm,armv8-timer         i         0  z                              
        fpga-region           fpga-region                                             P      remoteproc@ffe00000           xlnx,zynqmp-r5fss                                                       `  P                                                                                    r5f@0             xlnx,zynqmp-r5f       @   j                                                                 atcm0 btcm0 atcm1 btcm1       (                                                 r5f@1             xlnx,zynqmp-r5f           j                                   atcm0 btcm0                                               remoteproc-split@ffe00000         	  disabled              xlnx,zynqmp-r5fss                                                         `  P                                                                                   r5f@0             xlnx,zynqmp-r5f           j                                     atcm0 btcm0                                            r5f@1             xlnx,zynqmp-r5f           j                                   atcm0 btcm0                                               axi           simple-bus           ^                                 P   can@ff060000              xlnx,zynq-can-1.0         	  disabled            can_clk pclk             j                     z                  i              @           @              (              /               ?            can@ff070000              xlnx,zynq-can-1.0         	  disabled            can_clk pclk             j                     z                  i              @           @              )              0               @            cci@fd6e0000              arm,cci-400       	  disabled             j    n                 P        n                                pmu@9000              arm,cci-400-pmu,r1           j     P         i         <  z       {          {          {          {          {            debug@fec10000        &    arm,coresight-cpu-debug arm,primecell            j                   	  apb_pclk                     	  disabled                         debug@fed10000        &    arm,coresight-cpu-debug arm,primecell            j                   	  apb_pclk                     	  disabled                         debug@fee10000        &    arm,coresight-cpu-debug arm,primecell            j                   	  apb_pclk                     	  disabled                         debug@fef10000        &    arm,coresight-cpu-debug arm,primecell            j                   	  apb_pclk               	      	  disabled                         dma-controller@fd500000         okay              xlnx,zynqmp-dma-1.0          j    P                 i           z       |           clk_main clk_apb                                        *                           dma-controller@fd510000         okay              xlnx,zynqmp-dma-1.0          j    Q                 i           z       }           clk_main clk_apb                                        *                           dma-controller@fd520000         okay              xlnx,zynqmp-dma-1.0          j    R                 i           z       ~           clk_main clk_apb                                        *                           dma-controller@fd530000         okay              xlnx,zynqmp-dma-1.0          j    S                 i           z                  clk_main clk_apb                                        *                           dma-controller@fd540000         okay              xlnx,zynqmp-dma-1.0          j    T                 i           z                  clk_main clk_apb                                        *                           dma-controller@fd550000         okay              xlnx,zynqmp-dma-1.0          j    U                 i           z                  clk_main clk_apb                                        *                           dma-controller@fd560000         okay              xlnx,zynqmp-dma-1.0          j    V                 i           z                  clk_main clk_apb                                        *                           dma-controller@fd570000         okay              xlnx,zynqmp-dma-1.0          j    W                 i           z                  clk_main clk_apb                                        *                           interrupt-controller@f9010000             arm,gic-400         ,         @   j                                                             =        i           z      	                    gpu@fd4b0000          	  disabled              xlnx,zynqmp-mali arm,mali-400            j    K                 i         H  z                                                                    Rgp gpmmu pp0 ppmmu0 pp1 ppmmu1        	  bus core                  :                           dma-controller@ffa80000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       M           clk_main clk_apb                          @              +               D            dma-controller@ffa90000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       N           clk_main clk_apb                          @              +               D            dma-controller@ffaa0000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       O           clk_main clk_apb                          @              +               D            dma-controller@ffab0000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       P           clk_main clk_apb                          @              +               D            dma-controller@ffac0000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       Q           clk_main clk_apb                          @              +               D            dma-controller@ffad0000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       R           clk_main clk_apb                          @              +               D            dma-controller@ffae0000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       S           clk_main clk_apb                          @              +               D            dma-controller@ffaf0000       	  disabled              xlnx,zynqmp-dma-1.0          j                     i           z       T           clk_main clk_apb                          @              +               D            memory-controller@fd070000            xlnx,zynqmp-ddrc-2.40a           j                     i           z       p         nand-controller@ff100000          -    xlnx,zynqmp-nand-controller arasan,nfc-v3p10          	  disabled             j                     controller bus          i           z                                                 ,               <            ethernet@ff0b0000             xlnx,zynqmp-gem cdns,gem          	  disabled            i           z       9          9            j                      pclk hclk tx_clk rx_clk tsu_clk                                   	  bgem0_rst          (               h      -      1      ,        n      ,      ethernet@ff0c0000             xlnx,zynqmp-gem cdns,gem            okay            i           z       ;          ;            j                      pclk hclk tx_clk rx_clk tsu_clk                                   	  bgem1_rst          (               i      .      2      ,        n      ,        ~         	  rgmii-id            default               mdio                                ethernet-phy@0           j                            ethernet@ff0d0000             xlnx,zynqmp-gem cdns,gem          	  disabled            i           z       =          =            j                      pclk hclk tx_clk rx_clk tsu_clk                                   	  bgem2_rst          (               j      /      3      ,        n      ,      ethernet@ff0e0000             xlnx,zynqmp-gem cdns,gem          	  disabled            i           z       ?          ?            j                      pclk hclk tx_clk rx_clk tsu_clk                                     	  bgem3_rst          (               k      0      4      ,        n      ,      gpio@ff0a0000             xlnx,zynqmp-gpio-1.0            okay                        q        i           z                   =        ,            j    
                       .                                 i2c@ff020000              cdns,i2c-r1p14          okay            i           z                            j                                                    %               =        default gpio                                        J                 K         i2c@ff030000              cdns,i2c-r1p14          okay            i           z                            j                                                    &               >        default gpio                                        L                 M         memory-controller@ff960000            xlnx,zynqmp-ocmc-1.0             j                     i           z       
         pcie@fd0e0000             xlnx,nwl-pcie-2.11        	  disabled                                    ,                     <pci         i         <  z       v          u          t          s          r           Rmisc dummy intx msi1 msi0                    0   j                 H                               breg pcireg cfg       8  P                        C                                                                    `                                                                                                    ;                              legacy-interrupt-controller          =                     ,                        spi@ff0f0000             ^          xlnx,zynqmp-qspi-1.0          	  disabled            ref_clk pclk            z                  i                        j                                                                  -               5            phy@fd400000              xlnx,zynqmp-psgtr-v1.1        	  disabled              j    @             =                 serdes siou         $         rtc@ffa60000              xlnx,zynqmp-rtc       	  disabled             j                     i           z                          
  Ralarm sec           /        ahci@fd0c0000             ceva,ahci-1v84        	  disabled             j                      i           z                                                           mmc@ff160000             ^      #    xlnx,zynqmp-8.9a arasan,sdhci-8.9a          okay            i           z       0            j                     clk_xin clk_ahb                    ;clk_out_sd0 clk_in_sd0                '              &               6              n      6        default                     N        W          mmc@ff170000             ^      #    xlnx,zynqmp-8.9a arasan,sdhci-8.9a        	  disabled            i           z       1            j                     clk_xin clk_ahb                    ;clk_out_sd1 clk_in_sd1                (              '               7              n      7      iommu@fd800000            arm,mmu-500          j                     e         	  disabled            r           i           z                                                                                                                                                                                spi@ff040000              cdns,spi-r1p6         	  disabled            i           z                   j                     ref_clk pclk                                           #               :            spi@ff050000              cdns,spi-r1p6         	  disabled            i           z                   j                     ref_clk pclk                                           $               ;            timer@ff110000        	    cdns,ttc            okay            i         $  z       $          %          &            j                                                              default                  timer@ff120000        	    cdns,ttc            okay            i         $  z       '          (          )            j                                                              default                   timer@ff130000        	    cdns,ttc            okay            i         $  z       *          +          ,            j                                                              default            !      timer@ff140000        	    cdns,ttc            okay            i         $  z       -          .          /            j                                                              default            "      serial@ff000000          ^      !    xlnx,zynqmp-uart cdns,uart-r1p12            okay            i           z                   j                      uart_clk pclk                 !              "               8              n      8        default            #      serial@ff010000          ^      !    xlnx,zynqmp-uart cdns,uart-r1p12            okay            i           z                   j                     uart_clk pclk                 "              #               9              n      9        default            $      usb@ff9d0000                                  	  disabled              xlnx,zynqmp-dwc3             j                     bus_clk ref_clk                             ;      =      ?        busb_crst usb_hibrst usb_apbrst             %               P                      "        n             "   usb@fe200000          
    snps,dwc3         	  disabled             j                      i           Rhost peripheral otg wakeup        0  z       A          A          E          K           ref                                     "         usb@ff9e0000                                  	  disabled              xlnx,zynqmp-dwc3             j                     bus_clk ref_clk                             <      >      @        busb_crst usb_hibrst usb_apbrst           P               !      "        n      !      "   usb@fe300000          
    snps,dwc3         	  disabled             j    0                 i           Rhost peripheral otg wakeup        0  z       F          F          J          L           ref                                     "         watchdog@fd4d0000             cdns,wdt-r1p2           okay            i           z       q            j    M                    <                        K        default            &      watchdog@ff150000             cdns,wdt-r1p2         	  disabled            i           z       4            j                        
               p      ams@ffa50000              xlnx,zynqmp-ams       	  disabled            i           z       8            j                                                        P                           F   ams-ps@0              xlnx,zynqmp-ams-ps        	  disabled             j             ams-pl@400            xlnx,zynqmp-ams-pl        	  disabled             j               dma-controller@fd4c0000           xlnx,zynqmp-dpdma         	  disabled             j    L                 z       z           i           axi_clk               )                                  n                  '      display@fd4a0000             ^          xlnx,zynqmp-dpsub-1.7         	  disabled          @   j    J             J            J            J                dp blend av_buf aud         z       w           i         *  dp_apb_clk dp_aud_clk dp_vtc_pixel_clk_in                 )                      vid0 vid1 vid2 gfx0             '       '      '      '                                      n                     ports                               port@0           j          port@1           j         port@2           j         port@3           j         port@4           j         port@5           j                  pss-ref-clk          ^          fixed-clock                     U        ;pss_ref_clk                   video-clk            ^          fixed-clock                           
  ;video_clk                     pss-alt-ref-clk          ^          fixed-clock                                 ;pss_alt_ref_clk                   gt-crx-ref-clk           ^          fixed-clock                     o         ;gt_crx_ref_clk                    aux-ref-clk          ^          fixed-clock                             ;aux_ref_clk                   aliases         /axi/ethernet@ff0c0000          $/axi/i2c@ff020000           )/axi/i2c@ff030000           ./axi/mmc@ff160000           3/axi/serial@ff000000            ;/axi/serial@ff010000          chosen        	  Cearlycon            Lserial0:115200n8          memory@0             <memory            j                                      	compatible #address-cells #size-cells model bootscr-address device_type enable-method operating-points-v2 reg cpu-idle-states next-level-cache clocks phandle cache-level cache-unified entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns ranges no-map bootph-all interrupt-parent interrupts xlnx,ipi-id reg-names #mbox-cells status interrupt-affinity #power-domain-cells mboxes mbox-names #reset-cells groups function bias-pull-up slew-rate power-source pins bias-high-impedance bias-disable low-power-disable low-power-enable gpio-controller #gpio-cells #clock-cells clock-names fpga-mgr xlnx,cluster-mode xlnx,tcm-mode power-domains memory-region tx-fifo-depth rx-fifo-depth resets cpu #dma-cells xlnx,bus-width #interrupt-cells interrupt-controller interrupt-names reset-names assigned-clocks phy-handle phy-mode pinctrl-names pinctrl-0 clock-frequency pinctrl-1 scl-gpios sda-gpios msi-controller msi-parent bus-range interrupt-map-mask interrupt-map num-cs #phy-cells calibration clock-output-names no-1-8-v xlnx,mio-bank #iommu-cells #global-interrupts timer-width reset-gpios snps,quirk-frame-length-adjustment snps,resume-hs-terminations timeout-sec reset-on-timeout #io-channel-cells dma-names dmas ethernet0 i2c0 i2c1 mmc0 serial0 serial1 bootargs stdout-path 