Ðþí  7ù   8  4X   (            ¡  4                                  V2P-CA9            ‘                  "    arm,vexpress,v2p-ca9 arm,vexpress            +            <            K      bus@40000000              simple-bus           <            K            W@   @                        ^            o       ?        ‚                                                                                                                                                                                             	          	          
          
                                                                                                                                                                                                                                                                                                                                                                                                                                                                    !          !          "          "          #          #          $          $          %          %          &          &          '          '          (          (          )          )          *          *      motherboard-bus@40000000                                      arm,vexpress,v2m-p1 simple-bus           <            K         P   W        @             D             H             L                      flash@0,00000000              arm,vexpress-flash cfi-flash                                           ”      partitions            arm,arm-firmware-suite           psram@2,00000000              arm,vexpress-psram mtd-ram                              ”         ethernet@3,02000000           smsc,lan9118 smsc,lan9115                              Ÿ            ªmii          ³             À          Õ         è            ö         usb@3,03000000            nxp,usb-isp1761                            Ÿ           peripheral        iofpga@7,00000000             simple-bus           <            K            W                 sysreg@0              arm,vexpress-sysreg                          <            K            W                         gpio@8            arm,vexpress-sysreg,sys_led                                 &                    gpio@48           arm,vexpress-sysreg,sys_mci             H                    &                    gpio@4c           arm,vexpress-sysreg,sys_flash               L                    &            sysctl@1000           arm,sp810 arm,primecell                        2                 9refclk timclk apb_pclk          E         0  Rtimerclken0 timerclken1 timerclken2 timerclken3          e                                 u                             i2c@2000              arm,versatile-i2c                            <            K       pcie-switch@60            idt,89hpes32h8              `         aaci@4000             arm,pl041 arm,primecell            @             Ÿ           2         	  9apb_pclk          mmci@5000             arm,pl180 arm,primecell            P             Ÿ   	   
        Œ                   •                  ž ·         ¬           2              9mclk apb_pclk         kmi@6000              arm,pl050 arm,primecell            `             Ÿ           2              9KMIREFCLK apb_pclk        kmi@7000              arm,pl050 arm,primecell            p             Ÿ           2              9KMIREFCLK apb_pclk        serial@9000           arm,pl011 arm,primecell                         Ÿ           2   	           9uartclk apb_pclk          serial@a000           arm,pl011 arm,primecell                          Ÿ           2   	           9uartclk apb_pclk          serial@b000           arm,pl011 arm,primecell            °             Ÿ           2   	           9uartclk apb_pclk          serial@c000           arm,pl011 arm,primecell            À             Ÿ           2   	           9uartclk apb_pclk          wdt@f000              arm,sp805 arm,primecell            ð             Ÿ            2              9wdog_clk apb_pclk         timer@11000           arm,sp804 arm,primecell                        Ÿ           2                        9timclken1 timclken2 apb_pclk          timer@12000           arm,sp804 arm,primecell                         Ÿ           2                       9timclken1 timclken2 apb_pclk          i2c@16000             arm,versatile-i2c             `             <            K       dvi-transmitter@39            sil,sii9022-tpi sil,sii9022             9   ports            <            K       port@0                  endpoint            ¸   
                    port@1                 endpoint            ¸                             dvi-transmitter@60            sil,sii9022-cpi sil,sii9022             `         rtc@17000             arm,pl031 arm,primecell           p             Ÿ           2         	  9apb_pclk          compact-flash@1a000           arm,vexpress-cf ata-generic                 ¡            È         clcd@1f000            arm,pl111 arm,primecell           ð          	  Òcombined             Ÿ           2              9clcdclk apb_pclk            â7ù€        ÷      port       endpoint            ¸                                               regulator-3v3             regulator-fixed         3V3         . 2Z         F 2Z          ^                 clock-24000000            fixed-clock         E            rn6         Rv2m:clk24mhz                     clock-1000000             fixed-clock         E            r B@        Rv2m:refclk1mhz                   clock-32768           fixed-clock         E            r  €         Rv2m:refclk32khz                  leds          
    gpio-leds      led-user1           ‚v2m:green:user1                          
  ˆheartbeat         led-user2           ‚v2m:green:user2                           ˆmmc0          led-user3           ‚v2m:green:user3                           ˆcpu0          led-user4           ‚v2m:green:user4                           ˆcpu1          led-user5           ‚v2m:green:user5                           ˆcpu2          led-user6           ‚v2m:green:user6                           ˆcpu3          led-user7           ‚v2m:green:user7                           ˆcpu4          led-user8           ‚v2m:green:user8                           ˆcpu5             mcc           arm,vexpress,config-bus         ž      clock-controller-0            arm,vexpress-osc            ¹               Ò}x@“‡         E            Rv2m:oscclk0       clock-controller-1            arm,vexpress-osc            ¹              ÒjepßÒ@        E            Rv2m:oscclk1                  clock-controller-2            arm,vexpress-osc            ¹              Òn6 n6         E            Rv2m:oscclk2            	      regulator-vio             arm,vexpress-volt           ¹               VIO          ^        ‚VIO       temp-mcc              arm,vexpress-temp           ¹               ‚MCC       reset             arm,vexpress-reset          ¹             muxfpga           arm,vexpress-muxfpga            ¹             shutdown              arm,vexpress-shutdown           ¹             reboot            arm,vexpress-reboot         ¹   	          dvimode           arm,vexpress-dvimode            ¹                      chosen        E  Ý/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@9000          aliases       E  é/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@9000          E  ñ/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@a000          E  ù/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@b000          E  /bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/serial@c000          C  	/bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/i2c@16000        B  /bus@40000000/motherboard-bus@40000000/iofpga@7,00000000/i2c@2000         cpus             <            K       cpu@0           cpu           arm,cortex-a9                                            cpu@1           cpu           arm,cortex-a9                                           cpu@2           cpu           arm,cortex-a9                                           cpu@3           cpu           arm,cortex-a9                                              memory@60000000         memory           `   @         reserved-memory          <            K             W   vram@4c000000             shared-dma-pool          L    €           0                    clcd@10020000             arm,pl111 arm,primecell                     	  Òcombined             Ÿ       ,           2              9clcdclk apb_pclk            â©•À   port       endpoint            ¸                                
            memory-controller@100e0000            arm,pl341 arm,primecell                       2         	  9apb_pclk          memory-controller@100e1000            arm,pl354 arm,primecell                       Ÿ       -          .           2         	  9apb_pclk          timer@100e4000            arm,sp804 arm,primecell          @             Ÿ       0          1           2                 9timer0clk timer1clk apb_pclk          	  7disabled          watchdog@100e5000             arm,sp805 arm,primecell          P             Ÿ       3           2              9wdog_clk apb_pclk         scu@1e000000              arm,cortex-a9-scu                  X      timer@1e000600            arm,cortex-a9-twd-timer                         Ÿ              watchdog@1e000620             arm,cortex-a9-twd-wdt                           Ÿ              interrupt-controller@1e001000             arm,cortex-a9-gic            ^            <             >                                    cache-controller@1e00a000             arm,pl310-cache                         Ÿ       +            S        a           m                 ~                          pmu           arm,cortex-a9-pmu         0   Ÿ       <          =          >          ?           Ž                  dcc           arm,vexpress,config-bus         ž      clock-controller-0            arm,vexpress-osc            ¹               ÒÉÃ€úð€        E            Rextsaxiclk        clock-controller-1            arm,vexpress-osc            ¹              Ò ˜–€Ä´         E            Rclcdclk                  clock-controller-2            arm,vexpress-osc            ¹              Ò÷Š@õá         E          	  Rtcrefclk                     regulator-vd10            arm,vexpress-volt           ¹               VD10             ^        ‚VD10          regulator-vd10-s2             arm,vexpress-volt           ¹              VD10_S2          ^        ‚VD10_S2       regulator-vd10-s3             arm,vexpress-volt           ¹              VD10_S3          ^        ‚VD10_S3       regulator-vcc1v8              arm,vexpress-volt           ¹              VCC1V8           ^        ‚VCC1V8        regulator-ddr2vtt             arm,vexpress-volt           ¹              DDR2VTT          ^        ‚DDR2VTT       regulator-vcc3v3            ¹                arm,vexpress-volt           VCC3V3           ^        ‚VCC3V3        amp-vd10-s2           arm,vexpress-amp            ¹               ‚VD10_S2       amp-vd10-s3           arm,vexpress-amp            ¹              ‚VD10_S3       power-vd10-s2             arm,vexpress-power          ¹             	  ‚PVD10_S2          power-vd10-s3             arm,vexpress-power          ¹            	  ‚PVD10_S3             hsb@e0000000              simple-bus           <            K            W    à                ^            o             `   ‚                  $                    %                    &                    '            	model arm,hbi arm,vexpress,site compatible interrupt-parent #address-cells #size-cells ranges #interrupt-cells interrupt-map-mask interrupt-map reg bank-width interrupts phy-mode reg-io-width smsc,irq-active-high smsc,irq-push-pull vdd33a-supply vddvario-supply dr_mode phandle gpio-controller #gpio-cells clocks clock-names #clock-cells clock-output-names assigned-clocks assigned-clock-parents cd-gpios wp-gpios max-frequency vmmc-supply remote-endpoint reg-shift interrupt-names max-memory-bandwidth memory-region arm,pl11x,tft-r0g0b0-pads regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on clock-frequency label linux,default-trigger arm,vexpress,config-bridge arm,vexpress-sysreg,func freq-range stdout-path serial0 serial1 serial2 serial3 i2c0 i2c1 device_type next-level-cache no-map status interrupt-controller cache-unified cache-level arm,data-latency arm,tag-latency interrupt-affinity 