Ðþí  û   8  €   (            {  H                                                         via,vt8500           &Benign BV07 Netbook    cpus                                  cpu          ,cpu          arm,arm926ej-s           memory           ,memory           8              aliases          </soc/serial@d8200000             D/soc/serial@d82b0000             L/soc/serial@d8210000             T/soc/serial@d82c0000          soc                                   simple-bus            \         c      interrupt-controller@d8140000            via,vt8500-intc           t         8Ø              ‰            š         pinctrl@d8110000             via,vt8500-pinctrl           8Ø               t         ‰             ¢         ²         pmc@d8130000             via,vt8500-pmc           8Ø        clocks                               ref24M           ¾             fixed-clock          Ën6          š         uart0            ¾             via,vt8500-device-clock          Û            â  P         í            š         uart1            ¾             via,vt8500-device-clock          Û            â  P         í            š         uart2            ¾             via,vt8500-device-clock          Û            â  P         í            š         uart3            ¾             via,vt8500-device-clock          Û            â  P         í            š               timer@d8130100           via,vt8500-timer             8Ø    (         ø   $      ehci@d8007900            via,vt8500-ehci          8Ø y             ø   +      usb@d8007b00             platform-uhci            8Ø {             ø   +      fb@d8050800          via,vt8500-fb            8Ø ä             ø                 display-timings               timing-800x480           Ë                       &  à        .   (        ;   X        G            Q            ]           j            š               ge_rops@d8050400             wm,prizm-ge-rops             8Ø          serial@d8200000          via,vt8500-uart          8Ø     @         ø             Û           tokay          serial@d82b0000          via,vt8500-uart          8Ø+    @         ø   !         Û         	  tdisabled          serial@d8210000          via,vt8500-uart          8Ø!    @         ø   /         Û         	  tdisabled          serial@d82c0000          via,vt8500-uart          8Ø,    @         ø   2         Û         	  tdisabled          rtc@d8100000             via,vt8500-rtc           8Ø              ø   0      ethernet@d8004000            via,vt8500-rhine             8Ø @             ø   
            	#address-cells #size-cells compatible model device_type reg serial0 serial1 serial2 serial3 ranges interrupt-parent interrupt-controller #interrupt-cells phandle gpio-controller #gpio-cells #clock-cells clock-frequency clocks enable-reg enable-bit interrupts bits-per-pixel native-mode hactive vactive hfront-porch hback-porch hsync-len vback-porch vfront-porch vsync-len status 