     8     (            
  X                             &    firefly,roc-rk3328-cc rockchip,rk3328                                    +            7Firefly roc-rk3328-cc      aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/ethernet@ff550000           }/mmc@ff500000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                    
              	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                    
              
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                    
                    cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                    
                    idle-states         psci       cpu-sleep             arm,idle-state           *        ;           R   x        c           s                      l2-cache0             cache                       opp-table-0           operating-points-v2                        opp-408000000               Q          ~          @               opp-600000000               #F          ~          @      opp-816000000               0,          B@          @      opp-1008000000              <                    @      opp-1200000000              G          (          @      opp-1296000000              M?d                     @         analog-sound              simple-audio-card           i2s                    Analog          okay       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g           '   	   
            display-subsystem             rockchip,display-subsystem          :         hdmi-sound            simple-audio-card           i2s                    HDMI            okay       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock         @            Mn6         ]xin24m             E      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        pi2s_clk i2s_hclk            |                    tx rx                       okay                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        pi2s_clk i2s_hclk            |                    tx rx                       okay                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        pi2s_clk i2s_hclk            |                     tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  pmclk hclk           |      
        tx          default                              	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        ppdm_clk pdm_hclk            |              rx          default sleep                                                       	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    :   io-domains        "    rockchip,rk3328-io-voltage-domain           okay                                                                                       gpio              rockchip,rk3328-grf-gpio                     /              e      power-controller          !    rockchip,rk3328-power-controller            ;                        +               <   power-domain@6                      ;          power-domain@5                                   B      A      B        ;          power-domain@8                                  F        ;             reboot-mode           syscon-reboot-mode          O          VRB         bRB        pRB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              pbaudclk apb_pclk            |                    tx rx           default                !   "                            	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              pbaudclk apb_pclk            |                    tx rx           default            #   $   %                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              pbaudclk apb_pclk            |                    tx rx           default            &                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  pi2c pclk            default            '      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  pi2c pclk            default            (        okay       pmic@18           rockchip,rk805                          )                      @           ]xin32k rk805-clkout2                     /           default            *                             +           +           +           +                                 h   regulators     DCDC_REG1         
  vdd_logic           ) 
4        A           Y         m   regulator-state-mem                   B@         DCDC_REG2           vdd_arm         ) 
4        A           Y         m              regulator-state-mem                   ~         DCDC_REG3           vcc_ddr          Y         m   regulator-state-mem                   DCDC_REG4           vcc_io          ) 2Z        A 2Z         Y         m              regulator-state-mem                   2Z         LDO_REG1            vcc_18          ) w@        A w@         Y         m              regulator-state-mem                   w@         LDO_REG2            vcc18_emmc          ) w@        A w@         Y         m              regulator-state-mem                   w@         LDO_REG3            vdd_10          ) B@        A B@         Y         m   regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  pi2c pclk            default            ,      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  pi2c pclk            default            -      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  pspiclk apb_pclk         |            	        tx rx           default            .   /   0   1      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  ppwm pclk            default            2                 	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  ppwm pclk            default            3                 	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  ppwm pclk            default            4                 	  disabled          pwm@ff1b0030              rockchip,rk3328-pwm               0                      2                  <            	  ppwm pclk            default            5                 	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                                            	  papb_pclk                                thermal-zones      soc-thermal                                           6       trips      trip-point0         & p        2           passive       trip-point1         & L        2           passive            7      soc-crit            & s        2        	   critical             cooling-maps       map0            =   7      0  B   	   
              Q                  tsadc@ff250000            rockchip,rk3328-tsadc                %                        :           ^      $        n  P               $              ptsadc apb_pclk          init default sleep             8           9           8              B      
  tsadc-apb              :                            okay               6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        ppclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                          F         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P                             %              psaradc apb_pclk               V        saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  pbus core                  f      iommu@ff330200            rockchip,iommu               3                       `                                paclk iface                    	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        paclk iface                    	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           vdpu                        F      
  paclk hclk           "   ;        )   <         iommu@ff350800            rockchip,iommu               5        @                                      F        paclk iface                      )   <              ;      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                                B      A      B        paxi ahb cabac core          ^            A      B        nׄ ׄ          "   =        )   <         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        paclk iface                      )   <              =      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        paclk_vop dclk_vop hclk_vop                                    axi ahb dclk            "   >        okay       port                         +                  endpoint@0                       7   ?           D            iommu@ff373f00            rockchip,iommu               7?                                               ;        paclk iface                      okay               >      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #          G                        F              piahb isfr cec           G   @        Lhdmi            default            A   B   C           :                    okay                  ports      port       endpoint            7   D           ?               codec@ff410000            rockchip,rk3328-codec                A                              *      
  ppclk mclk              :                    okay                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     E      y        psysclk refoclk refpclk        	  ]hdmi_phy            @            V   F        bcpu-version         s            okay               @      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    :        @           ~           ^      x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               E   E   E      |  n         n6 n6 n6          n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            E        pphyclk          ]usb480m_phy         @            ^      {           G        okay               G   otg-port            s          $         ;          <          =           otg-bvalid otg-id linestate         okay               V      host-port           s                   >         
  linestate           okay               W            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        pbiu ciu ciu-drive ciu-sample                       р        okay                                                  default            H   I   J   K                                             (   L        4         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        pbiu ciu ciu-drive ciu-sample                       р      	  disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        pbiu ciu ciu-drive ciu-sample                       р        okay                                 A         N         ]        default            M   N   O        (           4         ethernet@ff540000             rockchip,rk3328-gmac                 T                                   macirq        8         d      W      X      Z      Y                  M  pstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              :        k           okay            ^      d      f           P   P        vinput              Q        rgmii           default            R                    )                             '  P                      $                 ethernet@ff550000             rockchip,rk3328-gmac                 U                    :                          macirq        8         T      S      S      U                  V      I  pstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           rmii               S        k           voutput        	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default            T   U                    S            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        potg         host                       /          >            @               G   V      	  Lusb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   G        G   W        Lusb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   G        G   W        Lusb         okay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              pref_clk suspend_clk bus_clk         host          
  Mutmi_wide            V         w                                            okay          interrupt-controller@ff811000             arm,gic-400         	                         	      @                                 @             `                       	                   pinctrl           rockchip,rk3328-pinctrl            :                     +            	*   gpio@ff210000             rockchip,gpio-bank               !                        3                                   /            	        	              c      gpio@ff220000             rockchip,gpio-bank               "                        4                                   /            	        	              )      gpio@ff230000             rockchip,gpio-bank               #                        5                                   /            	        	         gpio@ff240000             rockchip,gpio-bank               $                        6                                   /            	        	         pcfg-pull-up             	1           Z      pcfg-pull-down           	>           b      pcfg-pull-none           	M           X      pcfg-pull-none-2ma           	M        	Z              a      pcfg-pull-up-2ma             	1        	Z         pcfg-pull-up-4ma             	1        	Z              [      pcfg-pull-none-4ma           	M        	Z              ^      pcfg-pull-down-4ma           	>        	Z         pcfg-pull-none-8ma           	M        	Z              \      pcfg-pull-up-8ma             	1        	Z              ]      pcfg-pull-none-12ma          	M        	Z              _      pcfg-pull-up-12ma            	1        	Z              `      pcfg-output-high             	i      pcfg-output-low          	u      pcfg-input-high          	1         	           Y      pcfg-input           	      i2c0       i2c0-xfer            	            X            X           '         i2c1       i2c1-xfer            	            X            X           (         i2c2       i2c2-xfer            	            X            X           ,         i2c3       i2c3-xfer            	             X             X           -      i2c3-pins            	              X              X         hdmi_i2c       hdmii2c-xfer             	             X             X           B         pdm-0      pdmm0-clk           	            X                 pdmm0-fsync         	            X      pdmm0-sdi0          	            X                 pdmm0-sdi1          	            X                 pdmm0-sdi2          	            X                 pdmm0-sdi3          	            X                 pdmm0-clk-sleep         	             Y                 pdmm0-sdi0-sleep            	             Y                 pdmm0-sdi1-sleep            	             Y                 pdmm0-sdi2-sleep            	             Y                 pdmm0-sdi3-sleep            	             Y                 pdmm0-fsync-sleep           	             Y         tsadc      otp-pin         	             X           8      otp-out         	            X           9         uart0      uart0-xfer           	      	      X            Z                  uart0-cts           	            X           !      uart0-rts           	      
      X           "      uart0-rts-pin           	      
       X         uart1      uart1-xfer           	            X            Z           #      uart1-cts           	            X           $      uart1-rts           	            X           %      uart1-rts-pin           	             X         uart2-0    uart2m0-xfer             	             X            Z         uart2-1    uart2m1-xfer             	             X            Z           &         spi0-0     spi0m0-clk          	            Z      spi0m0-cs0          	            Z      spi0m0-tx           	      	      Z      spi0m0-rx           	      
      Z      spi0m0-cs1          	            Z         spi0-1     spi0m1-clk          	            Z      spi0m1-cs0          	            Z      spi0m1-tx           	            Z      spi0m1-rx           	            Z      spi0m1-cs1          	            Z         spi0-2     spi0m2-clk          	             Z           .      spi0m2-cs0          	            Z           1      spi0m2-tx           	            Z           /      spi0m2-rx           	            Z           0         i2s1       i2s1-mclk           	            X      i2s1-sclk           	            X      i2s1-lrckrx         	            X      i2s1-lrcktx         	            X      i2s1-sdi            	            X      i2s1-sdo            	            X      i2s1-sdio1          	            X      i2s1-sdio2          	            X      i2s1-sdio3          	            X      i2s1-sleep          	             Y             Y             Y             Y             Y             Y             Y             Y             Y         i2s2-0     i2s2m0-mclk         	            X      i2s2m0-sclk         	            X      i2s2m0-lrckrx           	            X      i2s2m0-lrcktx           	            X      i2s2m0-sdi          	            X      i2s2m0-sdo          	            X      i2s2m0-sleep          `  	             Y             Y             Y             Y             Y             Y         i2s2-1     i2s2m1-mclk         	            X      i2s2m1-sclk         	             X      i2sm1-lrckrx            	            X      i2s2m1-lrcktx           	            X      i2s2m1-sdi          	            X      i2s2m1-sdo          	            X      i2s2m1-sleep          P  	             Y              Y             Y             Y             Y         spdif-0    spdifm0-tx          	             X         spdif-1    spdifm1-tx          	            X         spdif-2    spdifm2-tx          	             X                    sdmmc0-0       sdmmc0m0-pwren          	            [      sdmmc0m0-pin            	             [         sdmmc0-1       sdmmc0m1-pwren          	             [      sdmmc0m1-pin            	              [           d         sdmmc0     sdmmc0-clk          	            \           H      sdmmc0-cmd          	            ]           I      sdmmc0-dectn            	            [           J      sdmmc0-wrprt            	            [      sdmmc0-bus1         	             ]      sdmmc0-bus4       @  	             ]            ]            ]            ]           K      sdmmc0-pins         	             [             [             [             [             [             [             [              [         sdmmc0ext      sdmmc0ext-clk           	            ^      sdmmc0ext-cmd           	             [      sdmmc0ext-wrprt         	            [      sdmmc0ext-dectn         	            [      sdmmc0ext-bus1          	            [      sdmmc0ext-bus4        @  	            [            [            [            [      sdmmc0ext-pins          	              [             [             [             [             [             [             [             [         sdmmc1     sdmmc1-clk          	            \      sdmmc1-cmd          	            ]      sdmmc1-pwren            	            ]      sdmmc1-wrprt            	            ]      sdmmc1-dectn            	            ]      sdmmc1-bus1         	            ]      sdmmc1-bus4       @  	            ]            ]            ]            ]      sdmmc1-pins         	             [             [             [             [             [             [             [             [             [         emmc       emmc-clk            	            _           M      emmc-cmd            	            `           N      emmc-pwren          	            X      emmc-rstnout            	            X      emmc-bus1           	             `      emmc-bus4         @  	             `            `            `            `      emmc-bus8           	             `            `            `            `            `            `            `            `           O         pwm0       pwm0-pin            	            X           2         pwm1       pwm1-pin            	            X           3         pwm2       pwm2-pin            	            X           4         pwmir      pwmir-pin           	            X           5         gmac-1     rgmiim1-pins         `  	            \            ^            ^            \            ^            ^            ^      
      ^            ^            \      	      \            ^            ^            \            \             \             \             ^             \             \             \             \           R      rmiim1-pins         	            a            _            a            a            a            a      
      a            a            _      	      _             X             X             X             X             X             X         gmac2phy       fephyled-speed10            	             X      fephyled-duplex         	             X      fephyled-rxm1           	            X           T      fephyled-txm1           	            X      fephyled-linkm1         	            X           U         tsadc_pin      tsadc-int           	            X      tsadc-pin           	             X         hdmi_pin       hdmi-cec            	             X           A      hdmi-hpd            	             b           C         cif-0      dvp-d2d9-m0         	            X            X            X            X            X      	      X      
      X            X            X             X            X            X         cif-1      dvp-d2d9-m1         	            X            X            X            X            X            X            X            X            X             X            X            X         pmic       pmic-int-l          	             Z           *         usb2       usb20-host-drv          	             X           f            chosen          	serial2:1500000n8         external-gmac-clock           fixed-clock         MsY@        ]gmac_clkin          @               P      dc-12v            regulator-fixed         dc_12v           Y         m        )          A             g      sdmmc-regulator           regulator-fixed            c              default            d         m        vcc_sd          ) 2Z        A 2Z        	              L      sdmmcio-regulator             regulator-gpio          	   e                  w@    2Z          	  vcc_sdio            	voltage         ) w@        A 2Z         Y        	   +                 vcc-host1-5v-regulator            regulator-fixed          	           )               default            f        vcc_host1_5v             Y        	   +      vcc-sys           regulator-fixed         vcc_sys          Y         m        ) LK@        A LK@        	   g           +      vcc-phy-regulator             regulator-fixed         vcc_phy          Y         m           Q      leds          
    gpio-leds      led-0           	firefly:blue:power        
  	heartbeat           	   h              	on             #      led-1           	firefly:yellow:user         	mmc1            	   h               	off                        	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v non-removable snps,txpbl clock_in_out phy-supply phy-mode snps,aal snps,reset-gpio snps,reset-active-low snps,reset-delays-us snps,rxpbl tx_delay rx_delay phy-handle phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path vin-supply gpios regulator-type enable-active-high label linux,default-trigger default-state 