  mZ   8  f   (            v  f                             )    tronsmart,orion-r68-meta rockchip,rk3368                                     +            7Rockchip Orion R68     aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff660000            Q/i2c@ff140000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/serial@ff180000             m/serial@ff190000             u/serial@ff690000             }/serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0c0000            /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     arm-pmu           arm,armv8-pmuv3       `          p          q          r          s          t          u          v          w                         	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock          n6         xin24m                           F      mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         -         ;   
     
   D   
   r   
   v        Bbiu ciu ciu-drive ciu-sample            N                               Y   
           `reset           lokay            s                     }                   default                                                 mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         -р         ;   
     
   E   
   s   
   w        Bbiu ciu ciu-drive ciu-sample            N                   !           Y   
           `reset         	  ldisabled          mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         -р         ;   
     
   G   
   u   
   y        Bbiu ciu ciu-drive ciu-sample            N                   #           Y   
           `reset           lokay            s                                                          default                        saradc@ff100000           rockchip,saradc                                       $                      ;   
   I   
  [        Bsaradc apb_pclk         Y   
   W        `saradc-apb          lokay            ,         spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               ;   
   A   
  R        Bspiclk apb_pclk                 ,           default                                          +          	  ldisabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               ;   
   B   
  S        Bspiclk apb_pclk                 -           default                                          +          	  ldisabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               ;   
   C   
  T        Bspiclk apb_pclk                 )           default                      !                     +          	  ldisabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            Bi2c         ;   
  N        default            "      	  ldisabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            Bi2c         ;   
  O        default            #      	  ldisabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            Bi2c         ;   
  P        default            $      	  ldisabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            Bi2c         ;   
  Q        default            %      	  ldisabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   M   
  U        Bbaudclk apb_pclk                    7           8           B         	  ldisabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   N   
  V        Bbaudclk apb_pclk                    8           8           B         	  ldisabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   P   
  X        Bbaudclk apb_pclk                    :           8           B         	  ldisabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   Q   
  Y        Bbaudclk apb_pclk                    ;           8           B           lokay            default            &      dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                      O            Z         u        ;   
         	  Bapb_pclk          thermal-zones      cpu-thermal            d                     '       trips      cpu_alert0           $                   passive             (      cpu_alert1           8                   passive             )      cpu_crit             s                	   critical             cooling-maps       map0               (      0                    map1               )      0              	            gpu-thermal            d                     '      trips      gpu_alert0           8                   passive             *      gpu_crit             8                	   critical             cooling-maps       map0               *      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           ;   
   H   
  Z        Btsadc apb_pclk          Y   
         
  `tsadc-apb           init default sleep             +           ,           +                    s      	  ldisabled                '      ethernet@ff290000             rockchip,rk3368-gmac                 )                                    ,macirq          <   -      8  ;   
      
   f   
   g   
   c   
      
      
  ]      M  Bstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            lokay            I   
           Y   .        pinput           }   /        rgmii           default            0           1                              ' B@           0                 usb@ff500000              generic-ehci                 P                                    ;   
          lokay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    ;   
          Botg         otg                                          @   @            lokay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                       O            Z         u        ;   
         	  Bapb_pclk                G      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 ;   
  L        Bi2c                 <           default            2                     +            lokay       syr827@40             silergy,syr827              @                   3vdd_cpu         B  ,        ^ 
4        v `          @                             3      rtc@51            haoyu,hym8563               Q                     xin32k           i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            Bi2c         ;   
  M        default            4      	  ldisabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            default            5        ;   
  _      	  ldisabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           default            6        ;   
  _      	  ldisabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            ;   
  _      	  ldisabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          default            7        ;   
  _      	  ldisabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 ;   
   O   
  W        Bbaudclk apb_pclk                    9           default            8        8           B           lokay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   ;   
  E        Bpclk_mailbox                     	  ldisabled          power-management@ff730000         &    rockchip,rk3368-pmu syscon simple-mfd                s            power-controller          !    rockchip,rk3368-power-controller                                    +                J   power-domain@12                     ;   
      
      
      
      
      
      
      
     
     
     
     
     
     
  c   
  h   
  g   
  n   
  o   
  r   
  s   
  f   
  d   
   d   
   h   
   i   
   l   
   k   
   j   
   n   
   m      $     9   :   ;   <   =   >   ?   @   A                  power-domain@14                      ;   
      
     
   o   
   p           B   C   D                  power-domain@16                     ;   
      
      
   @           E                        syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    K   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain         	  ldisabled          reboot-mode           syscon-reboot-mode                     RB         RB        'RB	        7RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 ;   F        Bxin24m          <   -                    C               
      syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     -   io-domains        "    rockchip,rk3368-io-voltage-domain         	  ldisabled             watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               ;   
  p                O           lokay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           ;   
  a   
   U        Bpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           ;   
   S   
        
  Bmclk hclk           P   G           Utx          default            H      	  ldisabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           Bi2s_clk i2s_hclk            ;   
   T   
          P   G      G           Utx rx         	  ldisabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           Bi2s_clk i2s_hclk            ;   
   R   
          P   G       G           Utx rx           default            I      	  ldisabled          iommu@ff900800            rockchip,iommu                                                  ;   
      
          Baclk iface          _   J           m          	  ldisabled          iommu@ff914000            rockchip,iommu                @            P                                   ;   
      
          Baclk iface          m            _   J            z      	  ldisabled          iommu@ff930300            rockchip,iommu                                                  ;   
      
          Baclk iface          _   J           m          	  ldisabled          iommu@ff9a0440            rockchip,iommu                @       @           @                           ;   
      
          Baclk iface          m          	  ldisabled          iommu@ff9a0800            rockchip,iommu                                       	          
           ;   
      
          Baclk iface          m          	  ldisabled          qos@ffad0000              rockchip,rk3368-qos syscon                                     9      qos@ffad0080              rockchip,rk3368-qos syscon                                    :      qos@ffad0100              rockchip,rk3368-qos syscon                                    ;      qos@ffad0180              rockchip,rk3368-qos syscon                                   <      qos@ffad0200              rockchip,rk3368-qos syscon                                    =      qos@ffad0280              rockchip,rk3368-qos syscon                                   >      qos@ffad0300              rockchip,rk3368-qos syscon                                    ?      qos@ffad0380              rockchip,rk3368-qos syscon                                   @      qos@ffad0400              rockchip,rk3368-qos syscon                                    A      qos@ffae0000              rockchip,rk3368-qos syscon                                     B      qos@ffae0100              rockchip,rk3368-qos syscon                                    C      qos@ffae0180              rockchip,rk3368-qos syscon                                   D      qos@ffaf0000              rockchip,rk3368-qos syscon                                     E      efuse@ffb00000            rockchip,rk3368-efuse                                               +           ;   
  q        Bpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl         <   -           K                     +               gpio@ff750000             rockchip,gpio-bank               u                 ;   
  @                Q                                                       U      gpio@ff780000             rockchip,gpio-bank               x                 ;   
  A                R                                                 gpio@ff790000             rockchip,gpio-bank               y                 ;   
  B                S                                                       S      gpio@ff7a0000             rockchip,gpio-bank               z                 ;   
  C                T                                                       1      pcfg-pull-up                         N      pcfg-pull-down                       Q      pcfg-pull-none                       O      pcfg-pull-none-12ma                                 P      emmc       emmc-clk            #            L                  emmc-cmd            #            M                  emmc-pwr            #            N      emmc-bus1           #            N      emmc-bus4         @  #            N            N            N            N      emmc-bus8           #            M            M            M            M            M            M            M            M                  emmc-reset          #             O            R         gmac       rgmii-pins          #            O            O            O            P      	      P      
      P            P            P            P            O            O            O            O            O            O            0      rmii-pins           #            O            O            O            P      	      P            P            O            O            O            O         i2c0       i2c0-xfer            #             O             O            2         i2c1       i2c1-xfer            #            O            O            4         i2c2       i2c2-xfer            #       	      O            O            "         i2c3       i2c3-xfer            #            O            O            #         i2c4       i2c4-xfer            #            O            O            $         i2c5       i2c5-xfer            #            O            O            %         i2s    i2s-8ch-bus         #            O            O            O            O            O            O            O            O            O            I         pwm0       pwm0-pin            #            O            5         pwm1       pwm1-pin            #             O            6         pwm3       pwm3-pin            #            O            7         sdio0      sdio0-bus1          #            N      sdio0-bus4        @  #            N            N            N            N      sdio0-cmd           #             N      sdio0-clk           #            O      sdio0-cd            #            N      sdio0-wp            #            N      sdio0-pwr           #            N      sdio0-bkpwr         #            N      sdio0-int           #            N         sdmmc      sdmmc-clk           #      	      L                  sdmmc-cmd           #      
      M                  sdmmc-cd            #            M                  sdmmc-bus1          #            M      sdmmc-bus4        @  #            M            M            M            M                     spdif      spdif-tx            #            O            H         spi0       spi0-clk            #            N                  spi0-cs0            #            N                  spi0-cs1            #            N      spi0-tx         #            N                  spi0-rx         #            N                     spi1       spi1-clk            #            N                  spi1-cs0            #            N                  spi1-cs1            #            N      spi1-rx         #            N                  spi1-tx         #            N                     spi2       spi2-clk            #             N                  spi2-cs0            #             N            !      spi2-rx         #       
      N                   spi2-tx         #             N                     tsadc      otp-pin         #              O            +      otp-out         #             O            ,         uart0      uart0-xfer           #            N            O      uart0-cts           #            O      uart0-rts           #            O         uart1      uart1-xfer           #             N             O      uart1-cts           #             O      uart1-rts           #             O         uart2      uart2-xfer           #            N            O            8         uart3      uart3-xfer           #            N            O      uart3-cts           #            O      uart3-rts           #            O         uart4      uart4-xfer           #             N             O            &      uart4-cts           #             O      uart4-rts           #             O         pcfg-pull-none-drv-8ma                                  L      pcfg-pull-up-drv-8ma                                    M      keys       pwr-key         #              Q            T         leds       stby-pwren          #              O            W      led-ctl         #             O            V         usb    host-vbus-drv           #              O            X            chosen          1serial2:115200n8          memory           memory                                emmc-pwrseq           mmc-pwrseq-emmc            R        default         =   S                         external-gmac-clock           fixed-clock                       sY@      	  ext_gmac                .      gpio-keys         
    gpio-keys           default            T   key-power            I        C   U               WGPIO Power          ]   t         gpio-leds         
    gpio-leds      led-0           C   1               Worion:red:led           default            V        hon        led-1           C   U               Worion:blue:led          default            W        hoff          vcc18-regulator           regulator-fixed         3vcc_18          ^ w@        v w@                             3                  vcc-host-regulator            regulator-fixed            U              default            X      	  3vcc_host                                 3      vcc-io-regulator              regulator-fixed         3vcc_io          ^ 2Z        v 2Z                             3            Y      vcc-lan-regulator             regulator-fixed         3vcc_lan         ^ 2Z        v 2Z                             Y            /      vcc-sd-regulator              regulator-fixed         3vcc_sd             1              ^ w@        v 2Z           Y                  vcc-sys-regulator             regulator-fixed         3vcc_sys         ^ LK@        v LK@                              3      vcc-io-sd-regulator           regulator-fixed       	  3vccio_sd            ^ w@        v 2Z                             Y                  vccio-wl-regulator            regulator-fixed       	  3vccio_wl            ^ 2Z        v 2Z                             Y      vdd-10-regulator              regulator-fixed         3vdd_10          ^ B@        v B@                             3         	compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 cpu device_type reg enable-method #cooling-cells phandle interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names status bus-width cap-sd-highspeed card-detect-delay pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-mmc-highspeed mmc-pwrseq mmc-hs200-1_2v mmc-hs200-1_8v non-removable #io-channel-cells vref-supply reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp interrupt-names rockchip,grf assigned-clocks assigned-clock-parents clock_in_out phy-supply phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-enable-ramp-delay regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply #pwm-cells #mbox-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells dmas dma-names power-domains #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path reset-gpios wakeup-source label linux,code default-state 